bus.h revision 1.22
1 /* $NetBSD: bus.h,v 1.22 2019/09/23 16:17:56 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Per Fogelstrom. All rights reserved. 35 * Copyright (c) 1996 Niklas Hallqvist. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Christopher G. Demetriou 48 * for the NetBSD Project. 49 * 4. The name of the author may not be used to endorse or promote products 50 * derived from this software without specific prior written permission 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #ifndef _MIPSCO_BUS_H_ 65 #define _MIPSCO_BUS_H_ 66 #ifdef _KERNEL 67 68 #include <mips/locore.h> 69 70 #ifdef BUS_SPACE_DEBUG 71 #include <sys/systm.h> /* for printf() prototype */ 72 /* 73 * Macros for checking the aligned-ness of pointers passed to bus 74 * space ops. Strict alignment is required by the MIPS architecture, 75 * and a trap will occur if unaligned access is performed. These 76 * may aid in the debugging of a broken device driver by displaying 77 * useful information about the problem. 78 */ 79 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 80 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 81 82 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 83 ({ \ 84 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 85 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ 86 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ 87 } \ 88 (void) 0; \ 89 }) 90 91 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 92 #else 93 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 94 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 95 #endif /* BUS_SPACE_DEBUG */ 96 97 /* 98 * Utility macro; do not use outside this file. 99 */ 100 #ifdef __STDC__ 101 #define __CONCAT3(a,b,c) a##b##c 102 #else 103 #define __CONCAT3(a,b,c) a/**/b/**/c 104 #endif 105 106 /* 107 * Bus address and size types 108 */ 109 typedef u_long bus_addr_t; 110 typedef u_long bus_size_t; 111 112 #define PRIxBUSADDR "lx" 113 #define PRIxBUSSIZE "lx" 114 #define PRIuBUSSIZE "lu" 115 116 /* 117 * Access methods for bus resources and address space. 118 */ 119 typedef u_int32_t bus_space_handle_t; 120 121 #define PRIxBSH "lx" 122 123 typedef struct mipsco_bus_space *bus_space_tag_t; 124 125 struct mipsco_bus_space { 126 const char *bs_name; 127 struct extent *bs_extent; 128 bus_addr_t bs_start; 129 bus_size_t bs_size; 130 131 paddr_t bs_pbase; 132 vaddr_t bs_vbase; 133 134 u_int8_t bs_stride; /* log2(stride) */ 135 u_int8_t bs_bswap; /* byte swap in stream methods */ 136 137 u_int8_t bs_offset_1; 138 u_int8_t bs_offset_2; 139 u_int8_t bs_offset_4; 140 u_int8_t bs_offset_8; 141 142 /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */ 143 int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t, 144 bus_size_t, int, bus_space_handle_t *); 145 146 /* dispose a bus_space handle (MD) */ 147 int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t, 148 bus_size_t); 149 150 /* convert bus_space tag/handle to physical address (MD) */ 151 int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t, 152 paddr_t *); 153 154 /* mapping/unmapping */ 155 int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int, 156 bus_space_handle_t *); 157 void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t, 158 bus_size_t); 159 int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t, 160 bus_size_t, bus_size_t, bus_space_handle_t *); 161 paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int); 162 163 164 /* allocation/deallocation */ 165 int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, 166 bus_size_t, bus_size_t, bus_size_t, int, 167 bus_addr_t *, bus_space_handle_t *); 168 void (*bs_free)(bus_space_tag_t, bus_space_handle_t, 169 bus_size_t); 170 171 /* interrupt attach */ 172 void (*bs_intr_establish)( 173 bus_space_tag_t, 174 int, /*bus-specific intr*/ 175 int, /*priority/class*/ 176 int, /*flags*/ 177 int (*)(void *), /*handler*/ 178 void *); /*handler arg*/ 179 180 void *bs_aux; 181 }; 182 183 /* vaddr_t argument of mipsco_bus_space_init() */ 184 #define MIPSCO_BUS_SPACE_UNMAPPED ((vaddr_t)0) 185 186 /* machine dependent utility function for bus_space users */ 187 void mipsco_bus_space_malloc_set_safe(void); 188 void mipsco_bus_space_init(bus_space_tag_t, const char *, 189 paddr_t, vaddr_t, bus_addr_t, bus_size_t); 190 void mipsco_bus_space_init_extent(bus_space_tag_t, void *, size_t); 191 void mipsco_bus_space_set_aligned_stride(bus_space_tag_t, unsigned int); 192 void mipsco_sparse_bus_space_init(bus_space_tag_t, const char *, 193 paddr_t, bus_addr_t, bus_size_t); 194 void mipsco_large_bus_space_init(bus_space_tag_t, const char *, 195 paddr_t, bus_addr_t, bus_size_t); 196 197 /* machine dependent utility function for bus_space implementations */ 198 int mipsco_bus_space_extent_malloc_flag(void); 199 200 /* these are provided for subclasses which override base bus_space. */ 201 202 int mipsco_bus_space_compose_handle(bus_space_tag_t, 203 bus_addr_t, bus_size_t, int, bus_space_handle_t *); 204 int mipsco_bus_space_dispose_handle(bus_space_tag_t, 205 bus_space_handle_t, bus_size_t); 206 int mipsco_bus_space_paddr(bus_space_tag_t, 207 bus_space_handle_t, paddr_t *); 208 209 int mipsco_sparse_bus_space_compose_handle(bus_space_tag_t, 210 bus_addr_t, bus_size_t, int, bus_space_handle_t *); 211 int mipsco_sparse_bus_space_dispose_handle(bus_space_tag_t, 212 bus_space_handle_t, bus_size_t); 213 int mipsco_sparse_bus_space_paddr(bus_space_tag_t, 214 bus_space_handle_t, paddr_t *); 215 216 int mipsco_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 217 bus_space_handle_t *); 218 void mipsco_bus_space_unmap(bus_space_tag_t, bus_space_handle_t, 219 bus_size_t); 220 int mipsco_bus_space_subregion(bus_space_tag_t, bus_space_handle_t, 221 bus_size_t, bus_size_t, bus_space_handle_t *); 222 paddr_t mipsco_bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t, 223 int, int); 224 int mipsco_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t, 225 bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, 226 bus_space_handle_t *); 227 #define mipsco_bus_space_free mipsco_bus_space_unmap 228 229 /* 230 * int bus_space_compose_handle(bus_space_tag_t t, bus_addr_t addr, 231 * bus_size_t size, int flags, bus_space_handle_t *bshp); 232 * 233 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 234 * Compose a bus_space handle from tag/handle/addr/size/flags. 235 * A helper function for bus_space_map()/bus_space_alloc() implementation. 236 */ 237 #define bus_space_compose_handle(bst, addr, size, flags, bshp) \ 238 (*(bst)->bs_compose_handle)(bst, addr, size, flags, bshp) 239 240 /* 241 * int bus_space_dispose_handle(bus_space_tag_t t, bus_addr_t addr, 242 * bus_space_handle_t bsh, bus_size_t size); 243 * 244 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 245 * Dispose a bus_space handle. 246 * A helper function for bus_space_unmap()/bus_space_free() implementation. 247 */ 248 #define bus_space_dispose_handle(bst, bsh, size) \ 249 (*(bst)->bs_dispose_handle)(bst, bsh, size) 250 251 /* 252 * int bus_space_paddr(bus_space_tag_t tag, 253 * bus_space_handle_t bsh, paddr_t *pap); 254 * 255 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 256 * (cannot be implemented on e.g. I/O space on i386, non-linear space on alpha) 257 * Return physical address of a region. 258 * A helper function for device mmap entry. 259 */ 260 #define bus_space_paddr(bst, bsh, pap) \ 261 (*(bst)->bs_paddr)(bst, bsh, pap) 262 263 /* 264 * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t); 265 * 266 * Get the kernel virtual address for the mapped bus space. 267 * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR. 268 * (XXX not enforced) 269 */ 270 #define bus_space_vaddr(bst, bsh) \ 271 ((void *)(bsh)) 272 273 /* 274 * paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t, 275 * int, int); 276 * 277 * Mmap bus space on behalf of the user. 278 */ 279 #define bus_space_mmap(bst, addr, off, prot, flags) \ 280 (*(bst)->bs_mmap)((bst), (addr), (off), (prot), (flags)) 281 282 /* 283 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 284 * bus_size_t size, int flags, bus_space_handle_t *bshp); 285 * 286 * Map a region of bus space. 287 */ 288 289 #define BUS_SPACE_MAP_CACHEABLE 0x01 290 #define BUS_SPACE_MAP_LINEAR 0x02 291 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 292 293 #define bus_space_map(t, a, s, f, hp) \ 294 (*(t)->bs_map)((t), (a), (s), (f), (hp)) 295 296 /* 297 * void bus_space_unmap(bus_space_tag_t t, 298 * bus_space_handle_t bsh, bus_size_t size); 299 * 300 * Unmap a region of bus space. 301 */ 302 303 #define bus_space_unmap(t, h, s) \ 304 (*(t)->bs_unmap)((t), (h), (s)) 305 306 /* 307 * int bus_space_subregion(bus_space_tag_t t, 308 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 309 * bus_space_handle_t *nbshp); 310 * 311 * Get a new handle for a subregion of an already-mapped area of bus space. 312 */ 313 314 #define bus_space_subregion(t, h, o, s, hp) \ 315 (*(t)->bs_subregion)((t), (h), (o), (s), (hp)) 316 317 /* 318 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 319 * bus_addr_t rend, bus_size_t size, bus_size_t align, 320 * bus_size_t boundary, int flags, bus_addr_t *addrp, 321 * bus_space_handle_t *bshp); 322 * 323 * Allocate a region of bus space. 324 */ 325 326 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 327 (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), (f), (ap), (hp)) 328 329 /* 330 * int bus_space_free(bus_space_tag_t t, 331 * bus_space_handle_t bsh, bus_size_t size); 332 * 333 * Free a region of bus space. 334 */ 335 336 #define bus_space_free(t, h, s) \ 337 (*(t)->bs_free)((t), (h), (s)) 338 339 /* 340 * void bus_intr_establish(bus_space_tag_t bst, 341 * int level, int pri, int flags, int (*func)(void *) 342 * void *arg); 343 * 344 * Attach interrupt handler and softc argument 345 */ 346 347 #define bus_intr_establish(t, i, c, f, ihf, iha) \ 348 (*(t)->bs_intr_establish)((t), (i), (c), (f), (ihf), (iha)) 349 350 351 /* 352 * Utility macros; do not use outside this file. 353 */ 354 #define __BS_TYPENAME(BITS) __CONCAT3(u_int,BITS,_t) 355 #define __BS_OFFSET(t, o, BYTES) ((o) << (t)->bs_stride) 356 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_,BYTES) 357 358 /* 359 * Calculate the target address using the bus_space parameters 360 */ 361 #define __BS_ADDR(t, h, offset, BITS, BYTES) \ 362 ((volatile __CONCAT3(u_int,BITS,_t) *) \ 363 ((h) + __BS_OFFSET(t, offset, BYTES) + \ 364 (t)->__CONCAT(bs_offset_,BYTES))) 365 366 /* 367 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 368 * bus_space_handle_t bsh, bus_size_t offset); 369 * 370 * Read a 1, 2, 4, or 8 byte quantity from bus space 371 * described by tag/handle/offset. 372 */ 373 374 #define __bus_space_read(BYTES,BITS) \ 375 static __inline __CONCAT3(u_int,BITS,_t) \ 376 __CONCAT(bus_space_read_,BYTES)(bus_space_tag_t bst, \ 377 bus_space_handle_t bsh, bus_size_t offset) \ 378 { \ 379 return (*__BS_ADDR(bst, bsh, offset, BITS, BYTES)); \ 380 } 381 382 __bus_space_read(1,8) 383 __bus_space_read(2,16) 384 __bus_space_read(4,32) 385 __bus_space_read(8,64) 386 387 /* 388 * void bus_space_read_multi_N(bus_space_tag_t tag, 389 * bus_space_handle_t bsh, bus_size_t offset, 390 * u_intN_t *addr, size_t count); 391 * 392 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 393 * described by tag/handle/offset and copy into buffer provided. 394 */ 395 396 #define __bus_space_read_multi(BYTES,BITS) \ 397 static __inline void __BS_FUNCTION(bus_space_read_multi,BYTES) \ 398 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 399 __BS_TYPENAME(BITS) *, size_t); \ 400 \ 401 static __inline void \ 402 __BS_FUNCTION(bus_space_read_multi,BYTES)( \ 403 bus_space_tag_t t, \ 404 bus_space_handle_t h, \ 405 bus_size_t o, \ 406 __BS_TYPENAME(BITS) *a, \ 407 size_t c) \ 408 { \ 409 \ 410 while (c--) \ 411 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \ 412 } 413 414 __bus_space_read_multi(1,8) 415 __bus_space_read_multi(2,16) 416 __bus_space_read_multi(4,32) 417 __bus_space_read_multi(8,64) 418 419 420 /* 421 * void bus_space_read_region_N(bus_space_tag_t tag, 422 * bus_space_handle_t bsh, bus_size_t offset, 423 * u_intN_t *addr, size_t count); 424 * 425 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 426 * described by tag/handle and starting at `offset' and copy into 427 * buffer provided. 428 */ 429 430 #define __bus_space_read_region(BYTES,BITS) \ 431 static __inline void __BS_FUNCTION(bus_space_read_region,BYTES) \ 432 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 433 __BS_TYPENAME(BITS) *, size_t); \ 434 \ 435 static __inline void \ 436 __BS_FUNCTION(bus_space_read_region,BYTES)( \ 437 bus_space_tag_t t, \ 438 bus_space_handle_t h, \ 439 bus_size_t o, \ 440 __BS_TYPENAME(BITS) *a, \ 441 size_t c) \ 442 { \ 443 \ 444 while (c--) { \ 445 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \ 446 o += BYTES; \ 447 } \ 448 } 449 450 __bus_space_read_region(1,8) 451 __bus_space_read_region(2,16) 452 __bus_space_read_region(4,32) 453 __bus_space_read_region(8,64) 454 455 456 /* 457 * void bus_space_write_N(bus_space_tag_t tag, 458 * bus_space_handle_t bsh, bus_size_t offset, 459 * u_intN_t value); 460 * 461 * Write the 1, 2, 4, or 8 byte value `value' to bus space 462 * described by tag/handle/offset. 463 */ 464 465 #define __bus_space_write(BYTES,BITS) \ 466 static __inline void \ 467 __CONCAT(bus_space_write_,BYTES)(bus_space_tag_t bst, \ 468 bus_space_handle_t bsh, \ 469 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \ 470 { \ 471 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = data; \ 472 wbflush(); \ 473 } 474 475 __bus_space_write(1,8) 476 __bus_space_write(2,16) 477 __bus_space_write(4,32) 478 __bus_space_write(8,64) 479 480 /* 481 * void bus_space_write_multi_N(bus_space_tag_t tag, 482 * bus_space_handle_t bsh, bus_size_t offset, 483 * const u_intN_t *addr, size_t count); 484 * 485 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 486 * provided to bus space described by tag/handle/offset. 487 */ 488 489 #define __bus_space_write_multi(BYTES,BITS) \ 490 static __inline void __BS_FUNCTION(bus_space_write_multi,BYTES) \ 491 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 492 __BS_TYPENAME(BITS) *, size_t); \ 493 \ 494 static __inline void \ 495 __BS_FUNCTION(bus_space_write_multi,BYTES)( \ 496 bus_space_tag_t t, \ 497 bus_space_handle_t h, \ 498 bus_size_t o, \ 499 __BS_TYPENAME(BITS) *a, \ 500 size_t c) \ 501 { \ 502 \ 503 while (c--) \ 504 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \ 505 } 506 507 __bus_space_write_multi(1,8) 508 __bus_space_write_multi(2,16) 509 __bus_space_write_multi(4,32) 510 __bus_space_write_multi(8,64) 511 512 513 /* 514 * void bus_space_write_region_N(bus_space_tag_t tag, 515 * bus_space_handle_t bsh, bus_size_t offset, 516 * const u_intN_t *addr, size_t count); 517 * 518 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 519 * to bus space described by tag/handle starting at `offset'. 520 */ 521 522 #define __bus_space_write_region(BYTES,BITS) \ 523 static __inline void __BS_FUNCTION(bus_space_write_region,BYTES) \ 524 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 525 const __BS_TYPENAME(BITS) *, size_t); \ 526 \ 527 static __inline void \ 528 __BS_FUNCTION(bus_space_write_region,BYTES)( \ 529 bus_space_tag_t t, \ 530 bus_space_handle_t h, \ 531 bus_size_t o, \ 532 const __BS_TYPENAME(BITS) *a, \ 533 size_t c) \ 534 { \ 535 \ 536 while (c--) { \ 537 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \ 538 o += BYTES; \ 539 } \ 540 } 541 542 __bus_space_write_region(1,8) 543 __bus_space_write_region(2,16) 544 __bus_space_write_region(4,32) 545 __bus_space_write_region(8,64) 546 547 548 /* 549 * void bus_space_set_multi_N(bus_space_tag_t tag, 550 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 551 * size_t count); 552 * 553 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 554 * by tag/handle/offset `count' times. 555 */ 556 557 #define __bus_space_set_multi(BYTES,BITS) \ 558 static __inline void __BS_FUNCTION(bus_space_set_multi,BYTES) \ 559 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 560 __BS_TYPENAME(BITS), size_t); \ 561 \ 562 static __inline void \ 563 __BS_FUNCTION(bus_space_set_multi,BYTES)( \ 564 bus_space_tag_t t, \ 565 bus_space_handle_t h, \ 566 bus_size_t o, \ 567 __BS_TYPENAME(BITS) v, \ 568 size_t c) \ 569 { \ 570 \ 571 while (c--) \ 572 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \ 573 } 574 575 __bus_space_set_multi(1,8) 576 __bus_space_set_multi(2,16) 577 __bus_space_set_multi(4,32) 578 __bus_space_set_multi(8,64) 579 580 581 /* 582 * void bus_space_set_region_N(bus_space_tag_t tag, 583 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 584 * size_t count); 585 * 586 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 587 * by tag/handle starting at `offset'. 588 */ 589 590 #define __bus_space_set_region(BYTES,BITS) \ 591 static __inline void __BS_FUNCTION(bus_space_set_region,BYTES) \ 592 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 593 __BS_TYPENAME(BITS), size_t); \ 594 \ 595 static __inline void \ 596 __BS_FUNCTION(bus_space_set_region,BYTES)( \ 597 bus_space_tag_t t, \ 598 bus_space_handle_t h, \ 599 bus_size_t o, \ 600 __BS_TYPENAME(BITS) v, \ 601 size_t c) \ 602 { \ 603 \ 604 while (c--) { \ 605 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \ 606 o += BYTES; \ 607 } \ 608 } 609 610 __bus_space_set_region(1,8) 611 __bus_space_set_region(2,16) 612 __bus_space_set_region(4,32) 613 __bus_space_set_region(8,64) 614 615 616 /* 617 * void bus_space_copy_region_N(bus_space_tag_t tag, 618 * bus_space_handle_t bsh1, bus_size_t off1, 619 * bus_space_handle_t bsh2, bus_size_t off2, 620 * bus_size_t count); 621 * 622 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 623 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 624 */ 625 626 #define __bus_space_copy_region(BYTES) \ 627 static __inline void __BS_FUNCTION(bus_space_copy_region,BYTES) \ 628 (bus_space_tag_t, \ 629 bus_space_handle_t bsh1, bus_size_t off1, \ 630 bus_space_handle_t bsh2, bus_size_t off2, \ 631 bus_size_t count); \ 632 \ 633 static __inline void \ 634 __BS_FUNCTION(bus_space_copy_region,BYTES)( \ 635 bus_space_tag_t t, \ 636 bus_space_handle_t h1, \ 637 bus_size_t o1, \ 638 bus_space_handle_t h2, \ 639 bus_size_t o2, \ 640 bus_size_t c) \ 641 { \ 642 bus_size_t o; \ 643 \ 644 if ((h1 + o1) >= (h2 + o2)) { \ 645 /* src after dest: copy forward */ \ 646 for (o = 0; c != 0; c--, o += BYTES) \ 647 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \ 648 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \ 649 } else { \ 650 /* dest after src: copy backwards */ \ 651 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 652 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \ 653 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \ 654 } \ 655 } 656 657 __bus_space_copy_region(1) 658 __bus_space_copy_region(2) 659 __bus_space_copy_region(4) 660 __bus_space_copy_region(8) 661 662 663 /* 664 * Operations which handle byte stream data on word access. 665 * 666 * These functions are defined to resolve endian mismatch, by either 667 * - When normal (i.e. stream-less) operations perform byte swap 668 * to resolve endian mismatch, these functions bypass the byte swap. 669 * or 670 * - When bus bridge performs automatic byte swap, these functions 671 * perform byte swap once more, to cancel the bridge's behavior. 672 * 673 * Mips Computer Systems platforms perform harware byte swapping - 674 * therefore the streaming methods can byte swap as determined from 675 * the bus space tag settings 676 * 677 */ 678 #define __BUS_SPACE_HAS_STREAM_METHODS 679 680 /* Force creation of stream methods using the standard template macros */ 681 #undef __BS_FUNCTION 682 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_stream_,BYTES) 683 684 #define __BS_BSWAP(bst, val, BITS) \ 685 ((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val)) 686 687 688 #define __bus_space_read_stream(BYTES,BITS) \ 689 static __inline __BS_TYPENAME(BITS) \ 690 __CONCAT(bus_space_read_stream_,BYTES)(bus_space_tag_t bst, \ 691 bus_space_handle_t bsh, bus_size_t offset) \ 692 { \ 693 register __BS_TYPENAME(BITS) val = \ 694 __CONCAT(bus_space_read_,BYTES)(bst, bsh, offset); \ 695 \ 696 return __BS_BSWAP(bst, val, BITS); \ 697 } 698 699 __bus_space_read_stream(2, 16) /* bus_space_read_stream_2 */ 700 __bus_space_read_stream(4, 32) /* bus_space_read_stream_4 */ 701 __bus_space_read_stream(8, 64) /* bus_space_read_stream_8 */ 702 703 704 #define __bus_space_write_stream(BYTES,BITS) \ 705 static __inline void \ 706 __CONCAT(bus_space_write_stream_,BYTES)(bus_space_tag_t bst, \ 707 bus_space_handle_t bsh, \ 708 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \ 709 { \ 710 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = \ 711 __BS_BSWAP(bst, data, BITS); \ 712 wbflush(); \ 713 } 714 715 __bus_space_write_stream(2,16) /* bus_space_write_stream_2 */ 716 __bus_space_write_stream(4,32) /* bus_space_write_stream_4 */ 717 __bus_space_write_stream(8,64) /* bus_space_write_stream_8 */ 718 719 __bus_space_read_multi(2,16) /* bus_space_read_multi_stream_2 */ 720 __bus_space_read_multi(4,32) /* bus_space_read_multi_stream_4 */ 721 __bus_space_read_multi(8,64) /* bus_space_read_multi_stream_8 */ 722 723 __bus_space_read_region(2,16) /* bus_space_read_region_stream_2 */ 724 __bus_space_read_region(4,32) /* bus_space_read_region_stream_4 */ 725 __bus_space_read_region(8,64) /* bus_space_read_region_stream_8 */ 726 727 __bus_space_write_multi(2,16) /* bus_space_write_multi_stream_2 */ 728 __bus_space_write_multi(4,32) /* bus_space_write_multi_stream_4 */ 729 __bus_space_write_multi(8,64) /* bus_space_write_multi_stream_8 */ 730 731 __bus_space_write_region(2,16) /* bus_space_write_region_stream_2 */ 732 __bus_space_write_region(4,32) /* bus_space_write_region_stream_4 */ 733 __bus_space_write_region(8,64) /* bus_space_write_region_stream_8 */ 734 735 __bus_space_set_multi(2,16) /* bus_space_set_multi_stream_2 */ 736 __bus_space_set_multi(4,32) /* bus_space_set_multi_stream_4 */ 737 __bus_space_set_multi(8,64) /* bus_space_set_multi_stream_8 */ 738 739 __bus_space_set_region(2,16) /* bus_space_set_region_stream_2 */ 740 __bus_space_set_region(4,32) /* bus_space_set_region_stream_4 */ 741 __bus_space_set_region(8, 64) /* bus_space_set_region_stream_8 */ 742 743 #undef __bus_space_read 744 #undef __bus_space_write 745 #undef __bus_space_read_stream 746 #undef __bus_space_write_stream 747 #undef __bus_space_read_multi 748 #undef __bus_space_read_region 749 #undef __bus_space_write_multi 750 #undef __bus_space_write_region 751 #undef __bus_space_set_multi 752 #undef __bus_space_set_region 753 #undef __bus_space_copy_region 754 755 #undef __BS_TYPENAME 756 #undef __BS_OFFSET 757 #undef __BS_FUNCTION 758 #undef __BS_ADDR 759 760 /* 761 * Bus read/write barrier methods. 762 * 763 * void bus_space_barrier(bus_space_tag_t tag, 764 * bus_space_handle_t bsh, bus_size_t offset, 765 * bus_size_t len, int flags); 766 * 767 * On the MIPS, we just flush the write buffer. 768 */ 769 #define bus_space_barrier(t, h, o, l, f) \ 770 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \ 771 wbflush())) 772 773 #define BUS_SPACE_BARRIER_READ 0x01 774 #define BUS_SPACE_BARRIER_WRITE 0x02 775 776 /* 777 * Flags used in various bus DMA methods. 778 */ 779 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 780 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 781 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 782 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 783 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 784 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 785 #define BUS_DMA_BUS2 0x020 786 #define BUS_DMA_BUS3 0x040 787 #define BUS_DMA_BUS4 0x080 788 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 789 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 790 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 791 792 #define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 793 794 /* Forwards needed by prototypes below. */ 795 struct mbuf; 796 struct uio; 797 798 /* 799 * Operations performed by bus_dmamap_sync(). 800 */ 801 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 802 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 803 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 804 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 805 806 typedef struct mipsco_bus_dma_tag *bus_dma_tag_t; 807 typedef struct mipsco_bus_dmamap *bus_dmamap_t; 808 809 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 810 811 /* 812 * bus_dma_segment_t 813 * 814 * Describes a single contiguous DMA transaction. Values 815 * are suitable for programming into DMA registers. 816 */ 817 struct mipsco_bus_dma_segment { 818 /* 819 * PUBLIC MEMBERS: these are used by device drivers. 820 */ 821 bus_addr_t ds_addr; /* DMA address */ 822 bus_size_t ds_len; /* length of transfer */ 823 /* 824 * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers. 825 */ 826 vaddr_t _ds_paddr; /* CPU physical address */ 827 vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */ 828 }; 829 typedef struct mipsco_bus_dma_segment bus_dma_segment_t; 830 831 /* 832 * bus_dma_tag_t 833 * 834 * A machine-dependent opaque type describing the implementation of 835 * DMA for a given bus. 836 */ 837 838 struct mipsco_bus_dma_tag { 839 bus_addr_t dma_offset; 840 841 /* 842 * DMA mapping methods. 843 */ 844 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 845 bus_size_t, bus_size_t, int, bus_dmamap_t *); 846 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 847 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 848 bus_size_t, struct proc *, int); 849 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 850 struct mbuf *, int); 851 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 852 struct uio *, int); 853 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 854 bus_dma_segment_t *, int, bus_size_t, int); 855 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 856 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 857 bus_addr_t, bus_size_t, int); 858 859 /* 860 * DMA memory utility functions. 861 */ 862 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 863 bus_size_t, bus_dma_segment_t *, int, int *, int); 864 void (*_dmamem_free)(bus_dma_tag_t, 865 bus_dma_segment_t *, int); 866 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 867 int, size_t, void **, int); 868 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 869 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 870 int, off_t, int, int); 871 }; 872 873 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 874 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 875 #define bus_dmamap_destroy(t, p) \ 876 (*(t)->_dmamap_destroy)((t), (p)) 877 #define bus_dmamap_load(t, m, b, s, p, f) \ 878 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 879 #define bus_dmamap_load_mbuf(t, m, b, f) \ 880 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 881 #define bus_dmamap_load_uio(t, m, u, f) \ 882 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 883 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 884 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 885 #define bus_dmamap_unload(t, p) \ 886 (*(t)->_dmamap_unload)((t), (p)) 887 #define bus_dmamap_sync(t, p, o, l, ops) \ 888 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 889 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 890 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 891 #define bus_dmamem_free(t, sg, n) \ 892 (*(t)->_dmamem_free)((t), (sg), (n)) 893 #define bus_dmamem_map(t, sg, n, s, k, f) \ 894 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 895 #define bus_dmamem_unmap(t, k, s) \ 896 (*(t)->_dmamem_unmap)((t), (k), (s)) 897 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 898 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 899 900 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 901 #define bus_dmatag_destroy(t) 902 903 /* 904 * bus_dmamap_t 905 * 906 * Describes a DMA mapping. 907 */ 908 struct mipsco_bus_dmamap { 909 /* 910 * PRIVATE MEMBERS: not for use by machine-independent code. 911 */ 912 bus_size_t _dm_size; /* largest DMA transfer mappable */ 913 int _dm_segcnt; /* number of segs this map can map */ 914 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 915 bus_size_t _dm_boundary; /* don't cross this */ 916 int _dm_flags; /* misc. flags */ 917 918 /* 919 * Private cookie to be used by the DMA back-end. 920 */ 921 void *_dm_cookie; 922 923 /* 924 * PUBLIC MEMBERS: these are used by machine-independent code. 925 */ 926 bus_size_t dm_maxsegsz; /* largest possible segment */ 927 bus_size_t dm_mapsize; /* size of the mapping */ 928 int dm_nsegs; /* # valid segments in mapping */ 929 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 930 }; 931 932 #ifdef _MIPSCO_BUS_DMA_PRIVATE 933 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 934 bus_size_t, int, bus_dmamap_t *); 935 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 936 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 937 bus_size_t, struct proc *, int); 938 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 939 struct mbuf *, int); 940 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 941 struct uio *, int); 942 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 943 bus_dma_segment_t *, int, bus_size_t, int); 944 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 945 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 946 bus_size_t, int); 947 948 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 949 bus_size_t alignment, bus_size_t boundary, 950 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 951 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 952 bus_size_t alignment, bus_size_t boundary, 953 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 954 paddr_t low, paddr_t high); 955 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 956 int nsegs); 957 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 958 int nsegs, size_t size, void **kvap, int flags); 959 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 960 size_t size); 961 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 962 int nsegs, off_t off, int prot, int flags); 963 964 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 965 bus_size_t alignment, bus_size_t boundary, 966 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 967 paddr_t low, paddr_t high); 968 #endif /* _MIPSCO_BUS_DMA_PRIVATE */ 969 970 void _bus_dma_tag_init(bus_dma_tag_t tag); 971 972 #endif /* _KERNEL */ 973 #endif /* _MIPSCO_BUS_H_ */ 974
Indexes created Thu Oct 02 14:10:14 GMT 2025