bus.h revision 1.26
1 /* $NetBSD: bus.h,v 1.26 2024/07/20 20:36:33 andvar Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Per Fogelstrom. All rights reserved. 35 * Copyright (c) 1996 Niklas Hallqvist. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Christopher G. Demetriou 48 * for the NetBSD Project. 49 * 4. The name of the author may not be used to endorse or promote products 50 * derived from this software without specific prior written permission 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #ifndef _MIPSCO_BUS_H_ 65 #define _MIPSCO_BUS_H_ 66 #ifdef _KERNEL 67 68 #include <mips/locore.h> 69 70 #ifdef BUS_SPACE_DEBUG 71 #include <sys/systm.h> /* for printf() prototype */ 72 /* 73 * Macros for checking the aligned-ness of pointers passed to bus 74 * space ops. Strict alignment is required by the MIPS architecture, 75 * and a trap will occur if unaligned access is performed. These 76 * may aid in the debugging of a broken device driver by displaying 77 * useful information about the problem. 78 */ 79 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 80 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 81 82 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 83 ({ \ 84 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 85 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ 86 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ 87 } \ 88 (void) 0; \ 89 }) 90 91 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 92 #else 93 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 94 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 95 #endif /* BUS_SPACE_DEBUG */ 96 97 /* 98 * Bus address and size types 99 */ 100 typedef u_long bus_addr_t; 101 typedef u_long bus_size_t; 102 103 #define PRIxBUSADDR "lx" 104 #define PRIxBUSSIZE "lx" 105 #define PRIuBUSSIZE "lu" 106 107 /* 108 * Access methods for bus resources and address space. 109 */ 110 typedef u_int32_t bus_space_handle_t; 111 112 #define PRIxBSH "lx" 113 114 typedef struct mipsco_bus_space *bus_space_tag_t; 115 116 struct mipsco_bus_space { 117 const char *bs_name; 118 void *bs_spare; /* (was previously unused extent map) */ 119 bus_addr_t bs_start; 120 bus_size_t bs_size; 121 122 paddr_t bs_pbase; 123 vaddr_t bs_vbase; 124 125 u_int8_t bs_stride; /* log2(stride) */ 126 u_int8_t bs_bswap; /* byte swap in stream methods */ 127 128 u_int8_t bs_offset_1; 129 u_int8_t bs_offset_2; 130 u_int8_t bs_offset_4; 131 u_int8_t bs_offset_8; 132 133 /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */ 134 int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t, 135 bus_size_t, int, bus_space_handle_t *); 136 137 /* dispose a bus_space handle (MD) */ 138 int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t, 139 bus_size_t); 140 141 /* convert bus_space tag/handle to physical address (MD) */ 142 int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t, 143 paddr_t *); 144 145 /* mapping/unmapping */ 146 int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int, 147 bus_space_handle_t *); 148 void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t, 149 bus_size_t); 150 int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t, 151 bus_size_t, bus_size_t, bus_space_handle_t *); 152 paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int); 153 154 155 /* allocation/deallocation */ 156 int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, 157 bus_size_t, bus_size_t, bus_size_t, int, 158 bus_addr_t *, bus_space_handle_t *); 159 void (*bs_free)(bus_space_tag_t, bus_space_handle_t, 160 bus_size_t); 161 162 /* interrupt attach */ 163 void (*bs_intr_establish)( 164 bus_space_tag_t, 165 int, /*bus-specific intr*/ 166 int, /*priority/class*/ 167 int, /*flags*/ 168 int (*)(void *), /*handler*/ 169 void *); /*handler arg*/ 170 171 void *bs_aux; 172 }; 173 174 /* vaddr_t argument of mipsco_bus_space_init() */ 175 #define MIPSCO_BUS_SPACE_UNMAPPED ((vaddr_t)0) 176 177 /* machine dependent utility function for bus_space users */ 178 void mipsco_bus_space_init(bus_space_tag_t, const char *, 179 paddr_t, vaddr_t, bus_addr_t, bus_size_t); 180 void mipsco_bus_space_set_aligned_stride(bus_space_tag_t, unsigned int); 181 void mipsco_sparse_bus_space_init(bus_space_tag_t, const char *, 182 paddr_t, bus_addr_t, bus_size_t); 183 void mipsco_large_bus_space_init(bus_space_tag_t, const char *, 184 paddr_t, bus_addr_t, bus_size_t); 185 186 /* these are provided for subclasses which override base bus_space. */ 187 188 int mipsco_bus_space_compose_handle(bus_space_tag_t, 189 bus_addr_t, bus_size_t, int, bus_space_handle_t *); 190 int mipsco_bus_space_dispose_handle(bus_space_tag_t, 191 bus_space_handle_t, bus_size_t); 192 int mipsco_bus_space_paddr(bus_space_tag_t, 193 bus_space_handle_t, paddr_t *); 194 195 int mipsco_sparse_bus_space_compose_handle(bus_space_tag_t, 196 bus_addr_t, bus_size_t, int, bus_space_handle_t *); 197 int mipsco_sparse_bus_space_dispose_handle(bus_space_tag_t, 198 bus_space_handle_t, bus_size_t); 199 int mipsco_sparse_bus_space_paddr(bus_space_tag_t, 200 bus_space_handle_t, paddr_t *); 201 202 int mipsco_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 203 bus_space_handle_t *); 204 void mipsco_bus_space_unmap(bus_space_tag_t, bus_space_handle_t, 205 bus_size_t); 206 int mipsco_bus_space_subregion(bus_space_tag_t, bus_space_handle_t, 207 bus_size_t, bus_size_t, bus_space_handle_t *); 208 paddr_t mipsco_bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t, 209 int, int); 210 int mipsco_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t, 211 bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, 212 bus_space_handle_t *); 213 #define mipsco_bus_space_free mipsco_bus_space_unmap 214 215 /* 216 * int bus_space_compose_handle(bus_space_tag_t t, bus_addr_t addr, 217 * bus_size_t size, int flags, bus_space_handle_t *bshp); 218 * 219 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 220 * Compose a bus_space handle from tag/handle/addr/size/flags. 221 * A helper function for bus_space_map()/bus_space_alloc() implementation. 222 */ 223 #define bus_space_compose_handle(bst, addr, size, flags, bshp) \ 224 (*(bst)->bs_compose_handle)(bst, addr, size, flags, bshp) 225 226 /* 227 * int bus_space_dispose_handle(bus_space_tag_t t, bus_addr_t addr, 228 * bus_space_handle_t bsh, bus_size_t size); 229 * 230 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 231 * Dispose a bus_space handle. 232 * A helper function for bus_space_unmap()/bus_space_free() implementation. 233 */ 234 #define bus_space_dispose_handle(bst, bsh, size) \ 235 (*(bst)->bs_dispose_handle)(bst, bsh, size) 236 237 /* 238 * int bus_space_paddr(bus_space_tag_t tag, 239 * bus_space_handle_t bsh, paddr_t *pap); 240 * 241 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 242 * (cannot be implemented on e.g. I/O space on i386, non-linear space on alpha) 243 * Return physical address of a region. 244 * A helper function for device mmap entry. 245 */ 246 #define bus_space_paddr(bst, bsh, pap) \ 247 (*(bst)->bs_paddr)(bst, bsh, pap) 248 249 /* 250 * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t); 251 * 252 * Get the kernel virtual address for the mapped bus space. 253 * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR. 254 * (XXX not enforced) 255 */ 256 #define bus_space_vaddr(bst, bsh) \ 257 ((void *)(bsh)) 258 259 /* 260 * paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t, 261 * int, int); 262 * 263 * Mmap bus space on behalf of the user. 264 */ 265 #define bus_space_mmap(bst, addr, off, prot, flags) \ 266 (*(bst)->bs_mmap)((bst), (addr), (off), (prot), (flags)) 267 268 /* 269 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 270 * bus_size_t size, int flags, bus_space_handle_t *bshp); 271 * 272 * Map a region of bus space. 273 */ 274 275 #define BUS_SPACE_MAP_CACHEABLE 0x01 276 #define BUS_SPACE_MAP_LINEAR 0x02 277 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 278 279 #define bus_space_map(t, a, s, f, hp) \ 280 (*(t)->bs_map)((t), (a), (s), (f), (hp)) 281 282 /* 283 * void bus_space_unmap(bus_space_tag_t t, 284 * bus_space_handle_t bsh, bus_size_t size); 285 * 286 * Unmap a region of bus space. 287 */ 288 289 #define bus_space_unmap(t, h, s) \ 290 (*(t)->bs_unmap)((t), (h), (s)) 291 292 /* 293 * int bus_space_subregion(bus_space_tag_t t, 294 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 295 * bus_space_handle_t *nbshp); 296 * 297 * Get a new handle for a subregion of an already-mapped area of bus space. 298 */ 299 300 #define bus_space_subregion(t, h, o, s, hp) \ 301 (*(t)->bs_subregion)((t), (h), (o), (s), (hp)) 302 303 /* 304 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 305 * bus_addr_t rend, bus_size_t size, bus_size_t align, 306 * bus_size_t boundary, int flags, bus_addr_t *addrp, 307 * bus_space_handle_t *bshp); 308 * 309 * Allocate a region of bus space. 310 */ 311 312 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 313 (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), (f), (ap), (hp)) 314 315 /* 316 * int bus_space_free(bus_space_tag_t t, 317 * bus_space_handle_t bsh, bus_size_t size); 318 * 319 * Free a region of bus space. 320 */ 321 322 #define bus_space_free(t, h, s) \ 323 (*(t)->bs_free)((t), (h), (s)) 324 325 /* 326 * void bus_intr_establish(bus_space_tag_t bst, 327 * int level, int pri, int flags, int (*func)(void *) 328 * void *arg); 329 * 330 * Attach interrupt handler and softc argument 331 */ 332 333 #define bus_intr_establish(t, i, c, f, ihf, iha) \ 334 (*(t)->bs_intr_establish)((t), (i), (c), (f), (ihf), (iha)) 335 336 337 /* 338 * Utility macros; do not use outside this file. 339 */ 340 #define __BS_TYPENAME(BITS) __CONCAT3(uint,BITS,_t) 341 #define __BS_OFFSET(t, o, BYTES) ((o) << (t)->bs_stride) 342 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_,BYTES) 343 344 /* 345 * Calculate the target address using the bus_space parameters 346 */ 347 #define __BS_ADDR(t, h, offset, BITS, BYTES) \ 348 ((volatile __CONCAT3(u_int,BITS,_t) *) \ 349 ((h) + __BS_OFFSET(t, offset, BYTES) + \ 350 (t)->__CONCAT(bs_offset_,BYTES))) 351 352 /* 353 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 354 * bus_space_handle_t bsh, bus_size_t offset); 355 * 356 * Read a 1, 2, 4, or 8 byte quantity from bus space 357 * described by tag/handle/offset. 358 */ 359 360 #define __bus_space_read(BYTES,BITS) \ 361 static __inline __CONCAT3(u_int,BITS,_t) \ 362 __CONCAT(bus_space_read_,BYTES)(bus_space_tag_t bst, \ 363 bus_space_handle_t bsh, bus_size_t offset) \ 364 { \ 365 return (*__BS_ADDR(bst, bsh, offset, BITS, BYTES)); \ 366 } 367 368 __bus_space_read(1,8) 369 __bus_space_read(2,16) 370 __bus_space_read(4,32) 371 __bus_space_read(8,64) 372 373 /* 374 * void bus_space_read_multi_N(bus_space_tag_t tag, 375 * bus_space_handle_t bsh, bus_size_t offset, 376 * u_intN_t *addr, size_t count); 377 * 378 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 379 * described by tag/handle/offset and copy into buffer provided. 380 */ 381 382 #define __bus_space_read_multi(BYTES,BITS) \ 383 static __inline void __BS_FUNCTION(bus_space_read_multi,BYTES) \ 384 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 385 __BS_TYPENAME(BITS) *, size_t); \ 386 \ 387 static __inline void \ 388 __BS_FUNCTION(bus_space_read_multi,BYTES)( \ 389 bus_space_tag_t t, \ 390 bus_space_handle_t h, \ 391 bus_size_t o, \ 392 __BS_TYPENAME(BITS) *a, \ 393 size_t c) \ 394 { \ 395 \ 396 while (c--) \ 397 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \ 398 } 399 400 __bus_space_read_multi(1,8) 401 __bus_space_read_multi(2,16) 402 __bus_space_read_multi(4,32) 403 __bus_space_read_multi(8,64) 404 405 406 /* 407 * void bus_space_read_region_N(bus_space_tag_t tag, 408 * bus_space_handle_t bsh, bus_size_t offset, 409 * u_intN_t *addr, size_t count); 410 * 411 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 412 * described by tag/handle and starting at `offset' and copy into 413 * buffer provided. 414 */ 415 416 #define __bus_space_read_region(BYTES,BITS) \ 417 static __inline void __BS_FUNCTION(bus_space_read_region,BYTES) \ 418 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 419 __BS_TYPENAME(BITS) *, size_t); \ 420 \ 421 static __inline void \ 422 __BS_FUNCTION(bus_space_read_region,BYTES)( \ 423 bus_space_tag_t t, \ 424 bus_space_handle_t h, \ 425 bus_size_t o, \ 426 __BS_TYPENAME(BITS) *a, \ 427 size_t c) \ 428 { \ 429 \ 430 while (c--) { \ 431 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \ 432 o += BYTES; \ 433 } \ 434 } 435 436 __bus_space_read_region(1,8) 437 __bus_space_read_region(2,16) 438 __bus_space_read_region(4,32) 439 __bus_space_read_region(8,64) 440 441 442 /* 443 * void bus_space_write_N(bus_space_tag_t tag, 444 * bus_space_handle_t bsh, bus_size_t offset, 445 * u_intN_t value); 446 * 447 * Write the 1, 2, 4, or 8 byte value `value' to bus space 448 * described by tag/handle/offset. 449 */ 450 451 #define __bus_space_write(BYTES,BITS) \ 452 static __inline void \ 453 __CONCAT(bus_space_write_,BYTES)(bus_space_tag_t bst, \ 454 bus_space_handle_t bsh, \ 455 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \ 456 { \ 457 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = data; \ 458 wbflush(); \ 459 } 460 461 __bus_space_write(1,8) 462 __bus_space_write(2,16) 463 __bus_space_write(4,32) 464 __bus_space_write(8,64) 465 466 /* 467 * void bus_space_write_multi_N(bus_space_tag_t tag, 468 * bus_space_handle_t bsh, bus_size_t offset, 469 * const u_intN_t *addr, size_t count); 470 * 471 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 472 * provided to bus space described by tag/handle/offset. 473 */ 474 475 #define __bus_space_write_multi(BYTES,BITS) \ 476 static __inline void __BS_FUNCTION(bus_space_write_multi,BYTES) \ 477 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 478 const __BS_TYPENAME(BITS) *, size_t); \ 479 \ 480 static __inline void \ 481 __BS_FUNCTION(bus_space_write_multi,BYTES)( \ 482 bus_space_tag_t t, \ 483 bus_space_handle_t h, \ 484 bus_size_t o, \ 485 const __BS_TYPENAME(BITS) *a, \ 486 size_t c) \ 487 { \ 488 \ 489 while (c--) \ 490 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \ 491 } 492 493 __bus_space_write_multi(1,8) 494 __bus_space_write_multi(2,16) 495 __bus_space_write_multi(4,32) 496 __bus_space_write_multi(8,64) 497 498 499 /* 500 * void bus_space_write_region_N(bus_space_tag_t tag, 501 * bus_space_handle_t bsh, bus_size_t offset, 502 * const u_intN_t *addr, size_t count); 503 * 504 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 505 * to bus space described by tag/handle starting at `offset'. 506 */ 507 508 #define __bus_space_write_region(BYTES,BITS) \ 509 static __inline void __BS_FUNCTION(bus_space_write_region,BYTES) \ 510 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 511 const __BS_TYPENAME(BITS) *, size_t); \ 512 \ 513 static __inline void \ 514 __BS_FUNCTION(bus_space_write_region,BYTES)( \ 515 bus_space_tag_t t, \ 516 bus_space_handle_t h, \ 517 bus_size_t o, \ 518 const __BS_TYPENAME(BITS) *a, \ 519 size_t c) \ 520 { \ 521 \ 522 while (c--) { \ 523 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \ 524 o += BYTES; \ 525 } \ 526 } 527 528 __bus_space_write_region(1,8) 529 __bus_space_write_region(2,16) 530 __bus_space_write_region(4,32) 531 __bus_space_write_region(8,64) 532 533 534 /* 535 * void bus_space_set_multi_N(bus_space_tag_t tag, 536 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 537 * size_t count); 538 * 539 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 540 * by tag/handle/offset `count' times. 541 */ 542 543 #define __bus_space_set_multi(BYTES,BITS) \ 544 static __inline void __BS_FUNCTION(bus_space_set_multi,BYTES) \ 545 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 546 __BS_TYPENAME(BITS), size_t); \ 547 \ 548 static __inline void \ 549 __BS_FUNCTION(bus_space_set_multi,BYTES)( \ 550 bus_space_tag_t t, \ 551 bus_space_handle_t h, \ 552 bus_size_t o, \ 553 __BS_TYPENAME(BITS) v, \ 554 size_t c) \ 555 { \ 556 \ 557 while (c--) \ 558 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \ 559 } 560 561 __bus_space_set_multi(1,8) 562 __bus_space_set_multi(2,16) 563 __bus_space_set_multi(4,32) 564 __bus_space_set_multi(8,64) 565 566 567 /* 568 * void bus_space_set_region_N(bus_space_tag_t tag, 569 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 570 * size_t count); 571 * 572 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 573 * by tag/handle starting at `offset'. 574 */ 575 576 #define __bus_space_set_region(BYTES,BITS) \ 577 static __inline void __BS_FUNCTION(bus_space_set_region,BYTES) \ 578 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 579 __BS_TYPENAME(BITS), size_t); \ 580 \ 581 static __inline void \ 582 __BS_FUNCTION(bus_space_set_region,BYTES)( \ 583 bus_space_tag_t t, \ 584 bus_space_handle_t h, \ 585 bus_size_t o, \ 586 __BS_TYPENAME(BITS) v, \ 587 size_t c) \ 588 { \ 589 \ 590 while (c--) { \ 591 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \ 592 o += BYTES; \ 593 } \ 594 } 595 596 __bus_space_set_region(1,8) 597 __bus_space_set_region(2,16) 598 __bus_space_set_region(4,32) 599 __bus_space_set_region(8,64) 600 601 602 /* 603 * void bus_space_copy_region_N(bus_space_tag_t tag, 604 * bus_space_handle_t bsh1, bus_size_t off1, 605 * bus_space_handle_t bsh2, bus_size_t off2, 606 * bus_size_t count); 607 * 608 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 609 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 610 */ 611 612 #define __bus_space_copy_region(BYTES) \ 613 static __inline void __BS_FUNCTION(bus_space_copy_region,BYTES) \ 614 (bus_space_tag_t, \ 615 bus_space_handle_t bsh1, bus_size_t off1, \ 616 bus_space_handle_t bsh2, bus_size_t off2, \ 617 bus_size_t count); \ 618 \ 619 static __inline void \ 620 __BS_FUNCTION(bus_space_copy_region,BYTES)( \ 621 bus_space_tag_t t, \ 622 bus_space_handle_t h1, \ 623 bus_size_t o1, \ 624 bus_space_handle_t h2, \ 625 bus_size_t o2, \ 626 bus_size_t c) \ 627 { \ 628 bus_size_t o; \ 629 \ 630 if ((h1 + o1) >= (h2 + o2)) { \ 631 /* src after dest: copy forward */ \ 632 for (o = 0; c != 0; c--, o += BYTES) \ 633 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \ 634 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \ 635 } else { \ 636 /* dest after src: copy backwards */ \ 637 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 638 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \ 639 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \ 640 } \ 641 } 642 643 __bus_space_copy_region(1) 644 __bus_space_copy_region(2) 645 __bus_space_copy_region(4) 646 __bus_space_copy_region(8) 647 648 649 /* 650 * Operations which handle byte stream data on word access. 651 * 652 * These functions are defined to resolve endian mismatch, by either 653 * - When normal (i.e. stream-less) operations perform byte swap 654 * to resolve endian mismatch, these functions bypass the byte swap. 655 * or 656 * - When bus bridge performs automatic byte swap, these functions 657 * perform byte swap once more, to cancel the bridge's behavior. 658 * 659 * Mips Computer Systems platforms perform hardware byte swapping - 660 * therefore the streaming methods can byte swap as determined from 661 * the bus space tag settings 662 * 663 */ 664 #define __BUS_SPACE_HAS_STREAM_METHODS 665 666 /* Force creation of stream methods using the standard template macros */ 667 #undef __BS_FUNCTION 668 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_stream_,BYTES) 669 670 #define __BS_BSWAP(bst, val, BITS) \ 671 ((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val)) 672 673 674 #define __bus_space_read_stream(BYTES,BITS) \ 675 static __inline __BS_TYPENAME(BITS) \ 676 __CONCAT(bus_space_read_stream_,BYTES)(bus_space_tag_t bst, \ 677 bus_space_handle_t bsh, bus_size_t offset) \ 678 { \ 679 register __BS_TYPENAME(BITS) val = \ 680 __CONCAT(bus_space_read_,BYTES)(bst, bsh, offset); \ 681 \ 682 return __BS_BSWAP(bst, val, BITS); \ 683 } 684 685 __bus_space_read_stream(2, 16) /* bus_space_read_stream_2 */ 686 __bus_space_read_stream(4, 32) /* bus_space_read_stream_4 */ 687 __bus_space_read_stream(8, 64) /* bus_space_read_stream_8 */ 688 689 690 #define __bus_space_write_stream(BYTES,BITS) \ 691 static __inline void \ 692 __CONCAT(bus_space_write_stream_,BYTES)(bus_space_tag_t bst, \ 693 bus_space_handle_t bsh, \ 694 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \ 695 { \ 696 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = \ 697 __BS_BSWAP(bst, data, BITS); \ 698 wbflush(); \ 699 } 700 701 __bus_space_write_stream(2,16) /* bus_space_write_stream_2 */ 702 __bus_space_write_stream(4,32) /* bus_space_write_stream_4 */ 703 __bus_space_write_stream(8,64) /* bus_space_write_stream_8 */ 704 705 __bus_space_read_multi(2,16) /* bus_space_read_multi_stream_2 */ 706 __bus_space_read_multi(4,32) /* bus_space_read_multi_stream_4 */ 707 __bus_space_read_multi(8,64) /* bus_space_read_multi_stream_8 */ 708 709 __bus_space_read_region(2,16) /* bus_space_read_region_stream_2 */ 710 __bus_space_read_region(4,32) /* bus_space_read_region_stream_4 */ 711 __bus_space_read_region(8,64) /* bus_space_read_region_stream_8 */ 712 713 __bus_space_write_multi(2,16) /* bus_space_write_multi_stream_2 */ 714 __bus_space_write_multi(4,32) /* bus_space_write_multi_stream_4 */ 715 __bus_space_write_multi(8,64) /* bus_space_write_multi_stream_8 */ 716 717 __bus_space_write_region(2,16) /* bus_space_write_region_stream_2 */ 718 __bus_space_write_region(4,32) /* bus_space_write_region_stream_4 */ 719 __bus_space_write_region(8,64) /* bus_space_write_region_stream_8 */ 720 721 __bus_space_set_multi(2,16) /* bus_space_set_multi_stream_2 */ 722 __bus_space_set_multi(4,32) /* bus_space_set_multi_stream_4 */ 723 __bus_space_set_multi(8,64) /* bus_space_set_multi_stream_8 */ 724 725 __bus_space_set_region(2,16) /* bus_space_set_region_stream_2 */ 726 __bus_space_set_region(4,32) /* bus_space_set_region_stream_4 */ 727 __bus_space_set_region(8, 64) /* bus_space_set_region_stream_8 */ 728 729 #undef __bus_space_read 730 #undef __bus_space_write 731 #undef __bus_space_read_stream 732 #undef __bus_space_write_stream 733 #undef __bus_space_read_multi 734 #undef __bus_space_read_region 735 #undef __bus_space_write_multi 736 #undef __bus_space_write_region 737 #undef __bus_space_set_multi 738 #undef __bus_space_set_region 739 #undef __bus_space_copy_region 740 741 #undef __BS_TYPENAME 742 #undef __BS_OFFSET 743 #undef __BS_FUNCTION 744 #undef __BS_ADDR 745 746 /* 747 * Bus read/write barrier methods. 748 * 749 * void bus_space_barrier(bus_space_tag_t tag, 750 * bus_space_handle_t bsh, bus_size_t offset, 751 * bus_size_t len, int flags); 752 * 753 * On the MIPS, we just flush the write buffer. 754 */ 755 #define bus_space_barrier(t, h, o, l, f) \ 756 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \ 757 wbflush())) 758 759 #define BUS_SPACE_BARRIER_READ 0x01 760 #define BUS_SPACE_BARRIER_WRITE 0x02 761 762 /* 763 * Flags used in various bus DMA methods. 764 */ 765 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 766 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 767 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 768 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 769 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 770 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 771 #define BUS_DMA_BUS2 0x020 772 #define BUS_DMA_BUS3 0x040 773 #define BUS_DMA_BUS4 0x080 774 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 775 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 776 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 777 778 #define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 779 780 /* Forwards needed by prototypes below. */ 781 struct mbuf; 782 struct uio; 783 784 /* 785 * Operations performed by bus_dmamap_sync(). 786 */ 787 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 788 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 789 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 790 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 791 792 typedef struct mipsco_bus_dma_tag *bus_dma_tag_t; 793 typedef struct mipsco_bus_dmamap *bus_dmamap_t; 794 795 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 796 797 /* 798 * bus_dma_segment_t 799 * 800 * Describes a single contiguous DMA transaction. Values 801 * are suitable for programming into DMA registers. 802 */ 803 struct mipsco_bus_dma_segment { 804 /* 805 * PUBLIC MEMBERS: these are used by device drivers. 806 */ 807 bus_addr_t ds_addr; /* DMA address */ 808 bus_size_t ds_len; /* length of transfer */ 809 /* 810 * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers. 811 */ 812 vaddr_t _ds_paddr; /* CPU physical address */ 813 vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */ 814 }; 815 typedef struct mipsco_bus_dma_segment bus_dma_segment_t; 816 817 /* 818 * bus_dma_tag_t 819 * 820 * A machine-dependent opaque type describing the implementation of 821 * DMA for a given bus. 822 */ 823 824 struct mipsco_bus_dma_tag { 825 bus_addr_t dma_offset; 826 827 /* 828 * DMA mapping methods. 829 */ 830 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 831 bus_size_t, bus_size_t, int, bus_dmamap_t *); 832 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 833 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 834 bus_size_t, struct proc *, int); 835 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 836 struct mbuf *, int); 837 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 838 struct uio *, int); 839 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 840 bus_dma_segment_t *, int, bus_size_t, int); 841 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 842 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 843 bus_addr_t, bus_size_t, int); 844 845 /* 846 * DMA memory utility functions. 847 */ 848 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 849 bus_size_t, bus_dma_segment_t *, int, int *, int); 850 void (*_dmamem_free)(bus_dma_tag_t, 851 bus_dma_segment_t *, int); 852 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 853 int, size_t, void **, int); 854 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 855 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 856 int, off_t, int, int); 857 }; 858 859 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 860 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 861 #define bus_dmamap_destroy(t, p) \ 862 (*(t)->_dmamap_destroy)((t), (p)) 863 #define bus_dmamap_load(t, m, b, s, p, f) \ 864 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 865 #define bus_dmamap_load_mbuf(t, m, b, f) \ 866 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 867 #define bus_dmamap_load_uio(t, m, u, f) \ 868 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 869 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 870 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 871 #define bus_dmamap_unload(t, p) \ 872 (*(t)->_dmamap_unload)((t), (p)) 873 #define bus_dmamap_sync(t, p, o, l, ops) \ 874 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 875 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 876 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 877 #define bus_dmamem_free(t, sg, n) \ 878 (*(t)->_dmamem_free)((t), (sg), (n)) 879 #define bus_dmamem_map(t, sg, n, s, k, f) \ 880 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 881 #define bus_dmamem_unmap(t, k, s) \ 882 (*(t)->_dmamem_unmap)((t), (k), (s)) 883 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 884 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 885 886 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 887 #define bus_dmatag_destroy(t) 888 889 /* 890 * bus_dmamap_t 891 * 892 * Describes a DMA mapping. 893 */ 894 struct mipsco_bus_dmamap { 895 /* 896 * PRIVATE MEMBERS: not for use by machine-independent code. 897 */ 898 bus_size_t _dm_size; /* largest DMA transfer mappable */ 899 int _dm_segcnt; /* number of segs this map can map */ 900 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 901 bus_size_t _dm_boundary; /* don't cross this */ 902 int _dm_flags; /* misc. flags */ 903 904 /* 905 * Private cookie to be used by the DMA back-end. 906 */ 907 void *_dm_cookie; 908 909 /* 910 * PUBLIC MEMBERS: these are used by machine-independent code. 911 */ 912 bus_size_t dm_maxsegsz; /* largest possible segment */ 913 bus_size_t dm_mapsize; /* size of the mapping */ 914 int dm_nsegs; /* # valid segments in mapping */ 915 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 916 }; 917 918 #ifdef _MIPSCO_BUS_DMA_PRIVATE 919 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 920 bus_size_t, int, bus_dmamap_t *); 921 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 922 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 923 bus_size_t, struct proc *, int); 924 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 925 struct mbuf *, int); 926 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 927 struct uio *, int); 928 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 929 bus_dma_segment_t *, int, bus_size_t, int); 930 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 931 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 932 bus_size_t, int); 933 934 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 935 bus_size_t alignment, bus_size_t boundary, 936 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 937 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 938 bus_size_t alignment, bus_size_t boundary, 939 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 940 paddr_t low, paddr_t high); 941 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 942 int nsegs); 943 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 944 int nsegs, size_t size, void **kvap, int flags); 945 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 946 size_t size); 947 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 948 int nsegs, off_t off, int prot, int flags); 949 950 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 951 bus_size_t alignment, bus_size_t boundary, 952 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 953 paddr_t low, paddr_t high); 954 #endif /* _MIPSCO_BUS_DMA_PRIVATE */ 955 956 void _bus_dma_tag_init(bus_dma_tag_t tag); 957 958 #endif /* _KERNEL */ 959 #endif /* _MIPSCO_BUS_H_ */ 960
Indexes created Thu Oct 02 14:10:14 GMT 2025