intr.h revision 1.11.20.1 1 /* $NetBSD: intr.h,v 1.11.20.1 2007/01/12 01:00:54 ad Exp $ */
2
3 /*
4 * Copyright (c) 1998 Jonathan Stone. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Jonathan Stone for
17 * the NetBSD Project.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _MACHINE_INTR_H_
34 #define _MACHINE_INTR_H_
35
36 #define IPL_NONE 0 /* disable only this interrupt */
37 #define IPL_SOFT 1 /* generic software interrupts */
38 #define IPL_SOFTCLOCK 2 /* clock software interrupts */
39 #define IPL_SOFTNET 3 /* network software interrupts */
40 #define IPL_SOFTSERIAL 4 /* serial software interrupts */
41 #define IPL_BIO 5 /* disable block I/O interrupts */
42 #define IPL_NET 6 /* disable network interrupts */
43 #define IPL_TTY 7 /* disable terminal interrupts */
44 #define IPL_SERIAL IPL_TTY
45 #define IPL_LPT IPL_TTY
46 #define IPL_VM IPL_TTY
47 #define IPL_CLOCK 8 /* disable clock interrupts */
48 #define IPL_STATCLOCK 9 /* disable profiling interrupts */
49 #define IPL_SCHED IPL_CLOCK
50 #define IPL_HIGH 10 /* disable all interrupts */
51 #define IPL_LOCK IPL_HIGH
52
53 #define IPL_N 11
54
55 /* Interrupt sharing types. */
56 #define IST_NONE 0 /* none */
57 #define IST_PULSE 1 /* pulsed */
58 #define IST_EDGE 2 /* edge-triggered */
59 #define IST_LEVEL 3 /* level-triggered */
60
61 #define SI_SOFT 0
62 #define SI_SOFTCLOCK 1
63 #define SI_SOFTNET 2
64 #define SI_SOFTSERIAL 3
65
66 #define SI_NQUEUES 4
67
68 #define SI_QUEUENAMES { \
69 "misc", \
70 "clock", \
71 "net", \
72 "serial", \
73 }
74
75 #ifdef _KERNEL
76 #ifndef _LOCORE
77 #include <sys/types.h>
78 #include <sys/device.h>
79 #include <sys/queue.h>
80
81 extern int _splraise __P((int));
82 extern int _spllower __P((int));
83 extern int _splset __P((int));
84 extern int _splget __P((void));
85 extern void _splnone __P((void));
86 extern void _setsoftintr __P((int));
87 extern void _clrsoftintr __P((int));
88
89 /*
90 * software simulated interrupt
91 */
92 #define setsoft(x) do { \
93 extern u_int ssir; \
94 int _s; \
95 \
96 _s = splhigh(); \
97 ssir |= 1 << (x); \
98 _setsoftintr(MIPS_SOFT_INT_MASK_1); \
99 splx(_s); \
100 } while (0)
101
102 #define softintr_schedule(arg) \
103 do { \
104 struct mipsco_intrhand *__ih = (arg); \
105 __ih->ih_pending = 1; \
106 setsoft(__ih->ih_intrhead->intr_siq); \
107 } while (0)
108
109 extern struct mipsco_intrhand *softnet_intrhand;
110
111 #define setsoftnet() softintr_schedule(softnet_intrhand)
112
113 /*
114 * nesting interrupt masks.
115 */
116 #define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0
117 #define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0)
118 #define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1)
119 #define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0)
120 #define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1)
121 #define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2)
122 #define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
123 #define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4)
124
125 #define spl0() (void)_spllower(0)
126 #define splx(s) (void)_splset(s)
127 #define splbio() _splraise(MIPS_INT_MASK_SPL1)
128 #define splnet() _splraise(MIPS_INT_MASK_SPL0)
129 #define spltty() _splraise(MIPS_INT_MASK_SPL0)
130 #define splvm() _splraise(MIPS_INT_MASK_SPL2)
131 #define splclock() _splraise(MIPS_INT_MASK_SPL2)
132 #define splstatclock() _splraise(MIPS_INT_MASK_SPL2)
133 #define splhigh() _splraise(MIPS_INT_MASK_SPL2)
134 #define splsched() splhigh()
135 #define spllock() splhigh()
136 #define splserial() spltty()
137 #define spllpt() spltty()
138
139 #define splsoft() _splraise(MIPS_INT_MASK_SPL_SOFT1)
140 #define splsoftclock() _splraise(MIPS_INT_MASK_SPL_SOFT0)
141 #define splsoftnet() splsoft()
142 #define splsoftserial() splsoft()
143 #define spllowersoftclock() _spllower(MIPS_INT_MASK_SPL_SOFT0)
144
145 typedef int ipl_t;
146 typedef struct {
147 int _sr;
148 } ipl_cookie_t;
149
150 ipl_cookie_t makeiplcookie(ipl_t ipl);
151
152 static inline int
153 splraiseipl(ipl_cookie_t icookie)
154 {
155
156 return _splraise(icookie._sr);
157 }
158
159 struct mipsco_intrhand {
160 LIST_ENTRY(mipsco_intrhand)
161 ih_q;
162 int (*ih_fun) __P((void *));
163 void *ih_arg;
164 struct mipsco_intr *ih_intrhead;
165 int ih_pending;
166 };
167
168 struct mipsco_intr {
169 LIST_HEAD(,mipsco_intrhand)
170 intr_q;
171 struct evcnt ih_evcnt;
172 unsigned long intr_siq;
173 };
174
175
176 extern struct mipsco_intrhand intrtab[];
177
178 #define SYS_INTR_LEVEL0 0
179 #define SYS_INTR_LEVEL1 1
180 #define SYS_INTR_LEVEL2 2
181 #define SYS_INTR_LEVEL3 3
182 #define SYS_INTR_LEVEL4 4
183 #define SYS_INTR_LEVEL5 5
184 #define SYS_INTR_SCSI 6
185 #define SYS_INTR_TIMER 7
186 #define SYS_INTR_ETHER 8
187 #define SYS_INTR_SCC0 9
188 #define SYS_INTR_FDC 10
189 #define SYS_INTR_ATBUS 11
190
191 #define MAX_INTR_COOKIES 16
192
193 #define CALL_INTR(lev) ((*intrtab[lev].ih_fun)(intrtab[lev].ih_arg))
194
195 void *softintr_establish(int, void (*)(void *), void *);
196 void softintr_disestablish(void *);
197 void softintr_init(void);
198 void softintr_dispatch(void);
199
200 #endif /* !_LOCORE */
201 #endif /* _KERNEL */
202 #endif /* _MACHINE_INTR_H_ */
203