intr.h revision 1.6
1 /* $NetBSD: intr.h,v 1.6 2001/03/30 23:23:37 wdk Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Jonathan Stone. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Jonathan Stone for 17 * the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _MACHINE_INTR_H_ 34 #define _MACHINE_INTR_H_ 35 36 #define IPL_NONE 0 /* disable only this interrupt */ 37 #define IPL_BIO 1 /* disable block I/O interrupts */ 38 #define IPL_NET 2 /* disable network interrupts */ 39 #define IPL_TTY 3 /* disable terminal interrupts */ 40 #define IPL_CLOCK 4 /* disable clock interrupts */ 41 #define IPL_STATCLOCK 5 /* disable profiling interrupts */ 42 #define IPL_SERIAL 6 /* disable serial hardware interrupts */ 43 #define IPL_HIGH 7 /* disable all interrupts */ 44 #define NIPL 8 45 46 /* Interrupt sharing types. */ 47 #define IST_NONE 0 /* none */ 48 #define IST_PULSE 1 /* pulsed */ 49 #define IST_EDGE 2 /* edge-triggered */ 50 #define IST_LEVEL 3 /* level-triggered */ 51 52 #define IPL_SOFTSERIAL 0 /* serial software interrupts */ 53 #define IPL_SOFTNET 1 /* network software interrupts */ 54 #define IPL_SOFTCLOCK 2 /* clock software interrupts */ 55 #define IPL_NSOFT 3 56 57 #define IPL_SOFTNAMES { \ 58 "serial", \ 59 "net", \ 60 "clock", \ 61 } 62 63 #ifdef _KERNEL 64 #ifndef _LOCORE 65 #include <sys/types.h> 66 #include <sys/device.h> 67 #include <sys/queue.h> 68 69 extern int _splraise __P((int)); 70 extern int _spllower __P((int)); 71 extern int _splset __P((int)); 72 extern int _splget __P((void)); 73 extern void _splnone __P((void)); 74 extern void _setsoftintr __P((int)); 75 extern void _clrsoftintr __P((int)); 76 77 /* 78 * software simulated interrupt 79 */ 80 #define setsoft(x) do { \ 81 extern u_int ssir; \ 82 int s; \ 83 \ 84 s = splhigh(); \ 85 ssir |= 1 << (x); \ 86 _setsoftintr(MIPS_SOFT_INT_MASK_1); \ 87 splx(s); \ 88 } while (0) 89 90 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 91 92 #define softintr_schedule(arg) \ 93 do { \ 94 struct mipsco_intrhand *__ih = (arg); \ 95 __ih->ih_pending = 1; \ 96 setsoft(__ih->ih_intrhead->intr_ipl); \ 97 } while (0) 98 99 extern struct mipsco_intrhand *softnet_intrhand; 100 101 #define setsoftnet() softintr_schedule(softnet_intrhand) 102 103 #else /* ! __HAVE_GENERIC_SOFT_INTERRUPTS */ 104 105 #define SIR_NET 0x01 106 #define SIR_SERIAL 0x02 107 108 # define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0) 109 # define setsoftnet() setsoft(SIR_NET) 110 # define setsoftserial() setsoft(SIR_SERIAL) 111 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */ 112 113 /* 114 * nesting interrupt masks. 115 */ 116 #define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0 117 #define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0) 118 #define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1) 119 #define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0) 120 #define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1) 121 #define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2) 122 #define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3) 123 #define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4) 124 125 #define spl0() (void)_spllower(0) 126 #define splx(s) (void)_splset(s) 127 #define splbio() _splraise(MIPS_INT_MASK_SPL1) 128 #define splnet() _splraise(MIPS_INT_MASK_SPL0) 129 #define spltty() _splraise(MIPS_INT_MASK_SPL0) 130 #define splimp() _splraise(MIPS_INT_MASK_SPL2) 131 #define splvm() _splraise(MIPS_INT_MASK_SPL2) 132 #define splclock() _splraise(MIPS_INT_MASK_SPL2) 133 #define splstatclock() _splraise(MIPS_INT_MASK_SPL2) 134 #define splhigh() _splraise(MIPS_INT_MASK_SPL2) 135 #define splsched() splhigh() 136 #define spllock() splhigh() 137 #define splserial() spltty() 138 139 #define splsoftclock() _splraise(MIPS_INT_MASK_SPL_SOFT0) 140 #define splsoft() _splraise(MIPS_INT_MASK_SPL_SOFT1) 141 #define spllowersoftclock() _spllower(MIPS_INT_MASK_SPL_SOFT0) 142 #define splsoftnet() splsoft() 143 144 struct mipsco_intrhand { 145 LIST_ENTRY(mipsco_intrhand) 146 ih_q; 147 int (*ih_fun) __P((void *)); 148 void *ih_arg; 149 struct mipsco_intr *ih_intrhead; 150 int ih_pending; 151 }; 152 153 struct mipsco_intr { 154 LIST_HEAD(,mipsco_intrhand) 155 intr_q; 156 struct evcnt ih_evcnt; 157 unsigned long intr_ipl; 158 }; 159 160 161 extern struct mipsco_intrhand intrtab[]; 162 163 #define SYS_INTR_LEVEL0 0 164 #define SYS_INTR_LEVEL1 1 165 #define SYS_INTR_LEVEL2 2 166 #define SYS_INTR_LEVEL3 3 167 #define SYS_INTR_LEVEL4 4 168 #define SYS_INTR_LEVEL5 5 169 #define SYS_INTR_SCSI 6 170 #define SYS_INTR_TIMER 7 171 #define SYS_INTR_ETHER 8 172 #define SYS_INTR_SCC0 9 173 #define SYS_INTR_FDC 10 174 #define SYS_INTR_ATBUS 11 175 176 #define MAX_INTR_COOKIES 16 177 178 #define CALL_INTR(lev) ((*intrtab[lev].ih_fun)(intrtab[lev].ih_arg)) 179 180 void *softintr_establish(int, void (*)(void *), void *); 181 void softintr_disestablish(void *); 182 void softintr_init(void); 183 void softintr_dispatch(void); 184 185 #endif /* !_LOCORE */ 186 #endif /* _KERNEL */ 187 #endif /* _MACHINE_INTR_H_ */ 188
Indexes created Wed Oct 15 03:09:54 GMT 2025