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z8530var.h revision 1.2
      1  1.2  wdk /*	$NetBSD: z8530var.h,v 1.2 2001/02/07 11:40:18 wdk Exp $	*/
      2  1.1  wdk 
      3  1.1  wdk /*
      4  1.1  wdk  * Copyright (c) 1994 Gordon W. Ross
      5  1.1  wdk  * Copyright (c) 1992, 1993
      6  1.1  wdk  *	The Regents of the University of California.  All rights reserved.
      7  1.1  wdk  *
      8  1.1  wdk  * This software was developed by the Computer Systems Engineering group
      9  1.1  wdk  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
     10  1.1  wdk  * contributed to Berkeley.
     11  1.1  wdk  *
     12  1.1  wdk  * All advertising materials mentioning features or use of this software
     13  1.1  wdk  * must display the following acknowledgement:
     14  1.1  wdk  *	This product includes software developed by the University of
     15  1.1  wdk  *	California, Lawrence Berkeley Laboratory.
     16  1.1  wdk  *
     17  1.1  wdk  * Redistribution and use in source and binary forms, with or without
     18  1.1  wdk  * modification, are permitted provided that the following conditions
     19  1.1  wdk  * are met:
     20  1.1  wdk  * 1. Redistributions of source code must retain the above copyright
     21  1.1  wdk  *    notice, this list of conditions and the following disclaimer.
     22  1.1  wdk  * 2. Redistributions in binary form must reproduce the above copyright
     23  1.1  wdk  *    notice, this list of conditions and the following disclaimer in the
     24  1.1  wdk  *    documentation and/or other materials provided with the distribution.
     25  1.1  wdk  * 3. All advertising materials mentioning features or use of this software
     26  1.1  wdk  *    must display the following acknowledgement:
     27  1.1  wdk  *	This product includes software developed by the University of
     28  1.1  wdk  *	California, Berkeley and its contributors.
     29  1.1  wdk  * 4. Neither the name of the University nor the names of its contributors
     30  1.1  wdk  *    may be used to endorse or promote products derived from this software
     31  1.1  wdk  *    without specific prior written permission.
     32  1.1  wdk  *
     33  1.1  wdk  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     34  1.1  wdk  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     35  1.1  wdk  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     36  1.1  wdk  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     37  1.1  wdk  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     38  1.1  wdk  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     39  1.1  wdk  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     40  1.1  wdk  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     41  1.1  wdk  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     42  1.1  wdk  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     43  1.1  wdk  * SUCH DAMAGE.
     44  1.1  wdk  *
     45  1.1  wdk  *	@(#)zsvar.h	8.1 (Berkeley) 6/11/93
     46  1.1  wdk  */
     47  1.1  wdk 
     48  1.1  wdk #include <machine/bus.h>
     49  1.1  wdk #include <dev/ic/z8530sc.h>
     50  1.1  wdk 
     51  1.2  wdk struct zs_channel {
     52  1.2  wdk 	struct zs_chanstate	cs_zscs; 	/* Required: soft state */
     53  1.2  wdk 	bus_space_tag_t		cs_bustag;	/* Machine-dependent */
     54  1.2  wdk 	bus_space_handle_t	cs_regs;
     55  1.2  wdk };
     56  1.2  wdk 
     57  1.1  wdk struct zsc_softc {
     58  1.2  wdk 	struct	device		zsc_dev;	/* required: base device */
     59  1.2  wdk 	struct	zs_chanstate   *zsc_cs[2];	/* channel soft state */
     60  1.2  wdk 	struct  zs_channel	zsc_cs_store[2];
     61  1.1  wdk 	/* Machine-dependent part follows... */
     62  1.2  wdk 	bus_space_tag_t		zsc_bustag;	/* Bus type */
     63  1.2  wdk 	bus_space_handle_t	zsc_base; 	/* Device base address */
     64  1.2  wdk         struct  evcnt		zs_intrcnt; 	/* Interrupt counter */
     65  1.1  wdk };
     66  1.1  wdk 
     67  1.1  wdk /*
     68  1.1  wdk  * Functions to read and write individual registers in a channel.
     69  1.2  wdk  * The SCC chip requires 3-4 PCLK cycles recovery time between accesses
     70  1.1  wdk  */
     71  1.1  wdk 
     72  1.1  wdk u_char zs_read_reg __P((struct zs_chanstate *cs, u_char reg));
     73  1.1  wdk u_char zs_read_csr __P((struct zs_chanstate *cs));
     74  1.1  wdk u_char zs_read_data __P((struct zs_chanstate *cs));
     75  1.1  wdk 
     76  1.1  wdk void  zs_write_reg __P((struct zs_chanstate *cs, u_char reg, u_char val));
     77  1.1  wdk void  zs_write_csr __P((struct zs_chanstate *cs, u_char val));
     78  1.1  wdk void  zs_write_data __P((struct zs_chanstate *cs, u_char val));
     79  1.1  wdk 
     80  1.2  wdk /* Zilog Serial hardware interrupts (level 0) */
     81  1.1  wdk #define splzs()		spltty()
     82