isa_machdep.c revision 1.2.10.2 1 1.2.10.2 nathanw /* $NetBSD: isa_machdep.c,v 1.2.10.2 2002/10/18 02:38:52 nathanw Exp $ */
2 1.2.10.2 nathanw
3 1.2.10.2 nathanw /*
4 1.2.10.2 nathanw * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.2.10.2 nathanw * All rights reserved.
6 1.2.10.2 nathanw *
7 1.2.10.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.2.10.2 nathanw * by Wayne Knowles
9 1.2.10.2 nathanw *
10 1.2.10.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.2.10.2 nathanw * modification, are permitted provided that the following conditions
12 1.2.10.2 nathanw * are met:
13 1.2.10.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.2.10.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.2.10.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.2.10.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.2.10.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.2.10.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.2.10.2 nathanw * must display the following acknowledgement:
20 1.2.10.2 nathanw * This product includes software developed by the NetBSD
21 1.2.10.2 nathanw * Foundation, Inc. and its contributors.
22 1.2.10.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.2.10.2 nathanw * contributors may be used to endorse or promote products derived
24 1.2.10.2 nathanw * from this software without specific prior written permission.
25 1.2.10.2 nathanw *
26 1.2.10.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.2.10.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.2.10.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.2.10.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.2.10.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.2.10.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.2.10.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.2.10.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.2.10.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.2.10.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.2.10.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.2.10.2 nathanw */
38 1.2.10.2 nathanw
39 1.2.10.2 nathanw #include <sys/param.h>
40 1.2.10.2 nathanw #include <sys/systm.h>
41 1.2.10.2 nathanw #include <sys/device.h>
42 1.2.10.2 nathanw #include <sys/malloc.h>
43 1.2.10.2 nathanw #include <sys/queue.h>
44 1.2.10.2 nathanw
45 1.2.10.2 nathanw #include <machine/sysconf.h>
46 1.2.10.2 nathanw #include <machine/autoconf.h>
47 1.2.10.2 nathanw #include <machine/mainboard.h>
48 1.2.10.2 nathanw #include <machine/bus.h>
49 1.2.10.2 nathanw
50 1.2.10.2 nathanw #include <dev/isa/isavar.h>
51 1.2.10.2 nathanw #include <dev/isa/isareg.h>
52 1.2.10.2 nathanw
53 1.2.10.2 nathanw static int isabusprint __P((void *auxp, const char *));
54 1.2.10.2 nathanw static int isabusmatch __P((struct device *, struct cfdata *, void *));
55 1.2.10.2 nathanw static void isabusattach __P((struct device *, struct device *, void *));
56 1.2.10.2 nathanw
57 1.2.10.2 nathanw struct isabus_softc {
58 1.2.10.2 nathanw struct device sc_dev;
59 1.2.10.2 nathanw struct mipsco_isa_chipset sc_isa_ic;
60 1.2.10.2 nathanw };
61 1.2.10.2 nathanw
62 1.2.10.2 nathanw CFATTACH_DECL(isabus, sizeof(struct isabus_softc),
63 1.2.10.2 nathanw isabusmatch, isabusattach, NULL, NULL);
64 1.2.10.2 nathanw
65 1.2.10.2 nathanw extern struct cfdriver isabus_cd;
66 1.2.10.2 nathanw
67 1.2.10.2 nathanw static struct mipsco_bus_space isa_io_bst, isa_mem_bst, isa_ctl_bst;
68 1.2.10.2 nathanw static struct mipsco_bus_dma_tag isa_dmatag;
69 1.2.10.2 nathanw
70 1.2.10.2 nathanw static void isa_bus_space_init __P((struct mipsco_bus_space *, const char *,
71 1.2.10.2 nathanw paddr_t, size_t));
72 1.2.10.2 nathanw int isa_intr __P((void *));
73 1.2.10.2 nathanw
74 1.2.10.2 nathanw
75 1.2.10.2 nathanw int
76 1.2.10.2 nathanw isabusmatch(pdp, cfp, aux)
77 1.2.10.2 nathanw struct device *pdp;
78 1.2.10.2 nathanw struct cfdata *cfp;
79 1.2.10.2 nathanw void *aux;
80 1.2.10.2 nathanw {
81 1.2.10.2 nathanw struct confargs *ca = aux;
82 1.2.10.2 nathanw
83 1.2.10.2 nathanw if (strcmp(ca->ca_name, isabus_cd.cd_name) != 0)
84 1.2.10.2 nathanw return 0;
85 1.2.10.2 nathanw return 1;
86 1.2.10.2 nathanw }
87 1.2.10.2 nathanw
88 1.2.10.2 nathanw static void
89 1.2.10.2 nathanw isa_bus_space_init(bst, type, paddr, len)
90 1.2.10.2 nathanw struct mipsco_bus_space *bst;
91 1.2.10.2 nathanw const char *type;
92 1.2.10.2 nathanw paddr_t paddr;
93 1.2.10.2 nathanw size_t len;
94 1.2.10.2 nathanw {
95 1.2.10.2 nathanw vaddr_t vaddr = MIPS_PHYS_TO_KSEG1(paddr); /* XXX */
96 1.2.10.2 nathanw
97 1.2.10.2 nathanw /* Setup default bus_space */
98 1.2.10.2 nathanw mipsco_bus_space_init(bst, type, paddr, vaddr, 0x0, len);
99 1.2.10.2 nathanw
100 1.2.10.2 nathanw /* ISA bus maps 1 word for every byte, therefore stride = 2 */
101 1.2.10.2 nathanw mipsco_bus_space_set_aligned_stride(bst, 2);
102 1.2.10.2 nathanw
103 1.2.10.2 nathanw /*
104 1.2.10.2 nathanw * ISA bus will do an automatic byte swap, but when accessing
105 1.2.10.2 nathanw * memory using bus_space_stream functions we need to byte swap
106 1.2.10.2 nathanw * to reverse the one performed in hardware
107 1.2.10.2 nathanw */
108 1.2.10.2 nathanw bst->bs_bswap = 1;
109 1.2.10.2 nathanw
110 1.2.10.2 nathanw bst->bs_intr_establish = (void *)isa_intr_establish;
111 1.2.10.2 nathanw
112 1.2.10.2 nathanw printf(" %s %p", type, (void *)vaddr);
113 1.2.10.2 nathanw }
114 1.2.10.2 nathanw
115 1.2.10.2 nathanw
116 1.2.10.2 nathanw void
117 1.2.10.2 nathanw isabusattach(pdp, dp, aux)
118 1.2.10.2 nathanw struct device *pdp, *dp;
119 1.2.10.2 nathanw void *aux;
120 1.2.10.2 nathanw {
121 1.2.10.2 nathanw struct isabus_softc *sc = (struct isabus_softc *)dp;
122 1.2.10.2 nathanw struct mipsco_isa_chipset *ic = &sc->sc_isa_ic;
123 1.2.10.2 nathanw struct isabus_attach_args iba;
124 1.2.10.2 nathanw
125 1.2.10.2 nathanw printf(":");
126 1.2.10.2 nathanw
127 1.2.10.2 nathanw iba.iba_busname = "isa";
128 1.2.10.2 nathanw iba.iba_iot = &isa_io_bst;
129 1.2.10.2 nathanw iba.iba_memt = &isa_mem_bst;
130 1.2.10.2 nathanw iba.iba_dmat = &isa_dmatag;
131 1.2.10.2 nathanw iba.iba_ic = ic;
132 1.2.10.2 nathanw
133 1.2.10.2 nathanw isa_bus_space_init(&isa_io_bst, "isa_io", PIZAZZ_ISA_IOBASE,
134 1.2.10.2 nathanw PIZAZZ_ISA_IOSIZE);
135 1.2.10.2 nathanw
136 1.2.10.2 nathanw isa_bus_space_init(&isa_mem_bst, "isa_mem", PIZAZZ_ISA_MEMBASE,
137 1.2.10.2 nathanw PIZAZZ_ISA_MEMSIZE);
138 1.2.10.2 nathanw
139 1.2.10.2 nathanw isa_bus_space_init(&isa_ctl_bst, "isa_intr", PIZAZZ_ISA_INTRLATCH,
140 1.2.10.2 nathanw sizeof(u_int32_t));
141 1.2.10.2 nathanw
142 1.2.10.2 nathanw _bus_dma_tag_init(&isa_dmatag);
143 1.2.10.2 nathanw
144 1.2.10.2 nathanw ic->ic_bst = &isa_ctl_bst;
145 1.2.10.2 nathanw
146 1.2.10.2 nathanw if (bus_space_map(ic->ic_bst, 0x00000, sizeof(u_int32_t),
147 1.2.10.2 nathanw BUS_SPACE_MAP_LINEAR, &ic->ic_bsh) != 0) {
148 1.2.10.2 nathanw printf(": can't map intrreg\n");
149 1.2.10.2 nathanw return;
150 1.2.10.2 nathanw }
151 1.2.10.2 nathanw
152 1.2.10.2 nathanw /* Clear ISA interrupt latch */
153 1.2.10.2 nathanw bus_space_write_4(ic->ic_bst, ic->ic_bsh, 0, 0);
154 1.2.10.2 nathanw
155 1.2.10.2 nathanw evcnt_attach_dynamic(&ic->ic_intrcnt, EVCNT_TYPE_INTR, NULL,
156 1.2.10.2 nathanw dp->dv_xname, "intr");
157 1.2.10.2 nathanw
158 1.2.10.2 nathanw LIST_INIT(&ic->intr_q);
159 1.2.10.2 nathanw (*platform.intr_establish)(SYS_INTR_ATBUS, isa_intr, ic);
160 1.2.10.2 nathanw
161 1.2.10.2 nathanw printf("\n");
162 1.2.10.2 nathanw config_found(dp, &iba, isabusprint);
163 1.2.10.2 nathanw }
164 1.2.10.2 nathanw
165 1.2.10.2 nathanw int
166 1.2.10.2 nathanw isabusprint(auxp, name)
167 1.2.10.2 nathanw void *auxp;
168 1.2.10.2 nathanw const char *name;
169 1.2.10.2 nathanw {
170 1.2.10.2 nathanw if(name == NULL)
171 1.2.10.2 nathanw return(UNCONF);
172 1.2.10.2 nathanw return(QUIET);
173 1.2.10.2 nathanw }
174 1.2.10.2 nathanw
175 1.2.10.2 nathanw void
176 1.2.10.2 nathanw isa_attach_hook(parent, self, iba)
177 1.2.10.2 nathanw struct device *parent, *self;
178 1.2.10.2 nathanw struct isabus_attach_args *iba;
179 1.2.10.2 nathanw {
180 1.2.10.2 nathanw }
181 1.2.10.2 nathanw
182 1.2.10.2 nathanw const struct evcnt *
183 1.2.10.2 nathanw isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
184 1.2.10.2 nathanw {
185 1.2.10.2 nathanw /* XXX for now, no evcnt parent reported */
186 1.2.10.2 nathanw return NULL;
187 1.2.10.2 nathanw }
188 1.2.10.2 nathanw
189 1.2.10.2 nathanw void *
190 1.2.10.2 nathanw isa_intr_establish(ic, intr, type, level, ih_fun, ih_arg)
191 1.2.10.2 nathanw isa_chipset_tag_t ic;
192 1.2.10.2 nathanw int intr;
193 1.2.10.2 nathanw int type; /* XXX not yet */
194 1.2.10.2 nathanw int level; /* XXX not yet */
195 1.2.10.2 nathanw int (*ih_fun) __P((void*));
196 1.2.10.2 nathanw void *ih_arg;
197 1.2.10.2 nathanw {
198 1.2.10.2 nathanw struct mipsco_intrhand *ih;
199 1.2.10.2 nathanw
200 1.2.10.2 nathanw ih = malloc(sizeof *ih, M_DEVBUF, M_NOWAIT);
201 1.2.10.2 nathanw if (ih == NULL)
202 1.2.10.2 nathanw panic("isa_intr_establish: malloc failed");
203 1.2.10.2 nathanw
204 1.2.10.2 nathanw ih->ih_fun = ih_fun;
205 1.2.10.2 nathanw ih->ih_arg = ih_arg;
206 1.2.10.2 nathanw LIST_INSERT_HEAD(&ic->intr_q, ih, ih_q);
207 1.2.10.2 nathanw return ih;
208 1.2.10.2 nathanw }
209 1.2.10.2 nathanw
210 1.2.10.2 nathanw void
211 1.2.10.2 nathanw isa_intr_disestablish(ic, cookie)
212 1.2.10.2 nathanw isa_chipset_tag_t ic;
213 1.2.10.2 nathanw void *cookie;
214 1.2.10.2 nathanw {
215 1.2.10.2 nathanw struct mipsco_intrhand *ih = cookie;
216 1.2.10.2 nathanw
217 1.2.10.2 nathanw LIST_REMOVE(ih, ih_q);
218 1.2.10.2 nathanw free(ih, M_DEVBUF);
219 1.2.10.2 nathanw }
220 1.2.10.2 nathanw
221 1.2.10.2 nathanw int
222 1.2.10.2 nathanw isa_intr_alloc(ic, mask, type, irq)
223 1.2.10.2 nathanw isa_chipset_tag_t ic;
224 1.2.10.2 nathanw int mask;
225 1.2.10.2 nathanw int type;
226 1.2.10.2 nathanw int *irq;
227 1.2.10.2 nathanw {
228 1.2.10.2 nathanw return 0;
229 1.2.10.2 nathanw }
230 1.2.10.2 nathanw
231 1.2.10.2 nathanw int
232 1.2.10.2 nathanw isa_intr(arg)
233 1.2.10.2 nathanw void *arg;
234 1.2.10.2 nathanw {
235 1.2.10.2 nathanw struct mipsco_isa_chipset *ic = (struct mipsco_isa_chipset *)arg;
236 1.2.10.2 nathanw struct mipsco_intrhand *ih;
237 1.2.10.2 nathanw int rv, handled;
238 1.2.10.2 nathanw
239 1.2.10.2 nathanw ic->ic_intrcnt.ev_count++;
240 1.2.10.2 nathanw
241 1.2.10.2 nathanw handled = 0;
242 1.2.10.2 nathanw LIST_FOREACH(ih, &ic->intr_q, ih_q) {
243 1.2.10.2 nathanw /*
244 1.2.10.2 nathanw * The handler returns one of three values:
245 1.2.10.2 nathanw * 0: This interrupt wasn't for me.
246 1.2.10.2 nathanw * 1: This interrupt was for me.
247 1.2.10.2 nathanw * -1: This interrupt might have been for me, but I can't say
248 1.2.10.2 nathanw * for sure.
249 1.2.10.2 nathanw */
250 1.2.10.2 nathanw rv = (*ih->ih_fun)(ih->ih_arg);
251 1.2.10.2 nathanw handled |= (rv != 0);
252 1.2.10.2 nathanw }
253 1.2.10.2 nathanw
254 1.2.10.2 nathanw /* Clear ISA interrupt latch */
255 1.2.10.2 nathanw bus_space_write_4(ic->ic_bst, ic->ic_bsh, 0, 0);
256 1.2.10.2 nathanw
257 1.2.10.2 nathanw return handled;
258 1.2.10.2 nathanw }
259