rambo.h revision 1.3.2.2
1 1.3.2.2 bouyer /* $NetBSD: rambo.h,v 1.3.2.2 2000/11/20 20:14:11 bouyer Exp $ */ 2 1.3.2.2 bouyer /*- 3 1.3.2.2 bouyer * Copyright (c) 2000 The NetBSD Foundation, Inc. 4 1.3.2.2 bouyer * All rights reserved. 5 1.3.2.2 bouyer * 6 1.3.2.2 bouyer * This code is derived from software contributed to The NetBSD Foundation 7 1.3.2.2 bouyer * by Wayne Knowles 8 1.3.2.2 bouyer * 9 1.3.2.2 bouyer * Redistribution and use in source and binary forms, with or without 10 1.3.2.2 bouyer * modification, are permitted provided that the following conditions 11 1.3.2.2 bouyer * are met: 12 1.3.2.2 bouyer * 1. Redistributions of source code must retain the above copyright 13 1.3.2.2 bouyer * notice, this list of conditions and the following disclaimer. 14 1.3.2.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright 15 1.3.2.2 bouyer * notice, this list of conditions and the following disclaimer in the 16 1.3.2.2 bouyer * documentation and/or other materials provided with the distribution. 17 1.3.2.2 bouyer * 3. All advertising materials mentioning features or use of this software 18 1.3.2.2 bouyer * must display the following acknowledgement: 19 1.3.2.2 bouyer * This product includes software developed by the NetBSD 20 1.3.2.2 bouyer * Foundation, Inc. and its contributors. 21 1.3.2.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its 22 1.3.2.2 bouyer * contributors may be used to endorse or promote products derived 23 1.3.2.2 bouyer * from this software without specific prior written permission. 24 1.3.2.2 bouyer * 25 1.3.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 1.3.2.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.3.2.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.3.2.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 1.3.2.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.3.2.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.3.2.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.3.2.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.3.2.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.3.2.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.3.2.2 bouyer * POSSIBILITY OF SUCH DAMAGE. 36 1.3.2.2 bouyer */ 37 1.3.2.2 bouyer 38 1.3.2.2 bouyer /* 39 1.3.2.2 bouyer * RAMBO DMA controller/timer asic used on the Mips 3230 (Pizazz) 40 1.3.2.2 bouyer */ 41 1.3.2.2 bouyer 42 1.3.2.2 bouyer #ifndef _MACHINE_RAMBO_H 43 1.3.2.2 bouyer #define _MACHINE_RAMBO_H 1 44 1.3.2.2 bouyer 45 1.3.2.2 bouyer /* Register laytout of a single RAMBO DMA channel */ 46 1.3.2.2 bouyer struct rambo_ch { 47 1.3.2.2 bouyer u_long dma_laddr; /* DMA load address reg 32b R/W */ 48 1.3.2.2 bouyer u_long __0[63]; 49 1.3.2.2 bouyer u_long dma_diag; /* DMA Diagnostic reg 32b R */ 50 1.3.2.2 bouyer u_long __1[63]; 51 1.3.2.2 bouyer u_short __2; 52 1.3.2.2 bouyer u_short dma_fifo; /* FIFO Buffer 16 bits 16b R/W */ 53 1.3.2.2 bouyer u_long __3[63]; 54 1.3.2.2 bouyer u_long dma_mode; /* DMA Mode Register 32b R/W */ 55 1.3.2.2 bouyer u_long __4[63]; 56 1.3.2.2 bouyer u_short __5; 57 1.3.2.2 bouyer u_short dma_block; /* DMA Block Count 16b R/W */ 58 1.3.2.2 bouyer u_long __6[63]; 59 1.3.2.2 bouyer u_long dma_caddr; /* DMA Current Address 32b R */ 60 1.3.2.2 bouyer u_long __7[63]; 61 1.3.2.2 bouyer }; 62 1.3.2.2 bouyer 63 1.3.2.2 bouyer #define RAMBO_LADDR 0x0000 64 1.3.2.2 bouyer #define RAMBO_DIAG 0x0100 65 1.3.2.2 bouyer #define RAMBO_FIFO 0x0202 66 1.3.2.2 bouyer #define RAMBO_MODE 0x0300 67 1.3.2.2 bouyer #define RAMBO_BLKCNT 0x0402 68 1.3.2.2 bouyer #define RAMBO_CADDR 0x0500 69 1.3.2.2 bouyer 70 1.3.2.2 bouyer /* DMA mode register (dma_mode) (R/W) */ 71 1.3.2.2 bouyer 72 1.3.2.2 bouyer #define RB_CLRFIFO 0x80000000 /* Clear DMA FIFO */ 73 1.3.2.2 bouyer #define RB_DMA_ENABLE 0x40000000 /* Enable DMA Transfer */ 74 1.3.2.2 bouyer #define RB_AUTORELOAD 0x20000000 /* Auto restart DMA */ 75 1.3.2.2 bouyer #define RB_INT_ENABLE 0X10000000 /* INterrupt on terminal count */ 76 1.3.2.2 bouyer 77 1.3.2.2 bouyer #define RB_DMA_WR 0x08000000 /* Xfer into memory */ 78 1.3.2.2 bouyer #define RB_DMA_RD 0x00000000 /* Xfer from memory */ 79 1.3.2.2 bouyer 80 1.3.2.2 bouyer #define RB_CLRERROR 0x04000000 /* Clear DMA Error register */ 81 1.3.2.2 bouyer 82 1.3.2.2 bouyer /* status bits of mode register (R) */ 83 1.3.2.2 bouyer 84 1.3.2.2 bouyer #define RB_FIFO_FULL 0x00000800 /* FIFO Buffer is full */ 85 1.3.2.2 bouyer #define RB_FIFO_EMPTY 0x00000400 /* FIFO Buffer is empty */ 86 1.3.2.2 bouyer #define RB_DMA_ERROR 0x00000200 /* Error has occured */ 87 1.3.2.2 bouyer #define RB_INTR_PEND 0x00000100 /* Interrupt is pending */ 88 1.3.2.2 bouyer 89 1.3.2.2 bouyer #define RB_CNT_MASK 0x000000ff /* half-words left in FIFO */ 90 1.3.2.2 bouyer 91 1.3.2.2 bouyer /* Offsets to other registers in the RAMBO asic */ 92 1.3.2.2 bouyer #define RB_TCOUNT 0x0c00 93 1.3.2.2 bouyer #define RB_TBREAK 0x0d00 94 1.3.2.2 bouyer #define RB_ERRREG 0x0e00 95 1.3.2.2 bouyer #define RB_CTLREG 0x0f00 96 1.3.2.2 bouyer 97 1.3.2.2 bouyer /* Hardware Register */ 98 1.3.2.2 bouyer 99 1.3.2.2 bouyer #define RB_BUZZ0 0x00 /* 1524 Hz */ 100 1.3.2.2 bouyer #define RB_BUZZ1 0x10 /* 762 Hz */ 101 1.3.2.2 bouyer #define RB_BUZZ2 0x20 /* 381 Hz */ 102 1.3.2.2 bouyer #define RB_BUZZ3 0x30 /* 190 Hz */ 103 1.3.2.2 bouyer #define RB_BUZZOFF 0x08 /* Buzzer Enable - Active Low */ 104 1.3.2.2 bouyer #define RB_PARITY_EN 0x04 /* Enable Parity - Active High */ 105 1.3.2.2 bouyer #define RB_CLR_PAR 0x02 /* Clear SysParErr - Active High */ 106 1.3.2.2 bouyer #define RB_CLR_IOERR 0x01 /* Clear ErrIntB - Active Low */ 107 1.3.2.2 bouyer 108 1.3.2.2 bouyer #define RB_BLK_SHIFT 6 109 1.3.2.2 bouyer #define RB_BLK_CNT 32 /* half-word byte count */ 110 1.3.2.2 bouyer #define RB_BLK_MASK 0x3f /* Alignment mask */ 111 1.3.2.2 bouyer #define RB_BLK_SIZE 64 /* Bytes in a DMA Block */ 112 1.3.2.2 bouyer 113 1.3.2.2 bouyer /* DMA cannot cross 512k boundry (2^19 == 512k) */ 114 1.3.2.2 bouyer #define RB_BSIZE 19 115 1.3.2.2 bouyer #define RB_BMASK ((1<<RB_BSIZE)-1) 116 1.3.2.2 bouyer #define RB_BOUNDRY (1<<RB_BSIZE) 117 1.3.2.2 bouyer 118 1.3.2.2 bouyer /* Rambo cycle counter is fed by 25MHz clock then divided by 4 */ 119 1.3.2.2 bouyer #define HZ_TO_TICKS(hz) (6250000L/(hz)) 120 1.3.2.2 bouyer #define TICKS_TO_USECS(t) (((t)*4)/25) 121 1.3.2.2 bouyer #endif 122
Indexes created Fri Oct 31 09:09:54 GMT 2025