mmeyepcmcia.c revision 1.2.2.2
1 1.2.2.2 nathanw /* $NetBSD: mmeyepcmcia.c,v 1.2.2.2 2002/10/18 02:38:56 nathanw Exp $ */ 2 1.2.2.2 nathanw 3 1.2.2.2 nathanw /* 4 1.2.2.2 nathanw * Copyright (c) 1997 Marc Horowitz. All rights reserved. 5 1.2.2.2 nathanw * 6 1.2.2.2 nathanw * Redistribution and use in source and binary forms, with or without 7 1.2.2.2 nathanw * modification, are permitted provided that the following conditions 8 1.2.2.2 nathanw * are met: 9 1.2.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 10 1.2.2.2 nathanw * notice, this list of conditions and the following disclaimer. 11 1.2.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 13 1.2.2.2 nathanw * documentation and/or other materials provided with the distribution. 14 1.2.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 15 1.2.2.2 nathanw * must display the following acknowledgement: 16 1.2.2.2 nathanw * This product includes software developed by Marc Horowitz. 17 1.2.2.2 nathanw * 4. The name of the author may not be used to endorse or promote products 18 1.2.2.2 nathanw * derived from this software without specific prior written permission. 19 1.2.2.2 nathanw * 20 1.2.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.2.2.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.2.2.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.2.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.2.2.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.2.2.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.2.2.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.2.2.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.2.2.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.2.2.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.2.2.2 nathanw */ 31 1.2.2.2 nathanw 32 1.2.2.2 nathanw /* 33 1.2.2.2 nathanw * PCMCIA I/F for MMEYE 34 1.2.2.2 nathanw * 35 1.2.2.2 nathanw * T.Horiuichi 36 1.2.2.2 nathanw * Brains Corp. 1998.8.25 37 1.2.2.2 nathanw */ 38 1.2.2.2 nathanw 39 1.2.2.2 nathanw #include <sys/types.h> 40 1.2.2.2 nathanw #include <sys/param.h> 41 1.2.2.2 nathanw #include <sys/systm.h> 42 1.2.2.2 nathanw #include <sys/kernel.h> 43 1.2.2.2 nathanw #include <sys/proc.h> 44 1.2.2.2 nathanw #include <sys/device.h> 45 1.2.2.2 nathanw #include <sys/extent.h> 46 1.2.2.2 nathanw #include <sys/malloc.h> 47 1.2.2.2 nathanw #include <sys/kthread.h> 48 1.2.2.2 nathanw 49 1.2.2.2 nathanw #include <uvm/uvm_extern.h> 50 1.2.2.2 nathanw 51 1.2.2.2 nathanw #include <machine/autoconf.h> 52 1.2.2.2 nathanw #include <machine/bus.h> 53 1.2.2.2 nathanw #include <machine/intr.h> 54 1.2.2.2 nathanw #include <machine/mmeye.h> 55 1.2.2.2 nathanw 56 1.2.2.2 nathanw #include <dev/pcmcia/pcmciareg.h> 57 1.2.2.2 nathanw #include <dev/pcmcia/pcmciavar.h> 58 1.2.2.2 nathanw #include <dev/pcmcia/pcmciachip.h> 59 1.2.2.2 nathanw 60 1.2.2.2 nathanw #include <mmeye/dev/mmeyepcmciareg.h> 61 1.2.2.2 nathanw 62 1.2.2.2 nathanw #ifdef MMEYEPCMCIADEBUG 63 1.2.2.2 nathanw int mmeyepcmcia_debug = 1; 64 1.2.2.2 nathanw #define DPRINTF(arg) if (mmeyepcmcia_debug) printf arg; 65 1.2.2.2 nathanw #else 66 1.2.2.2 nathanw #define DPRINTF(arg) 67 1.2.2.2 nathanw #endif 68 1.2.2.2 nathanw 69 1.2.2.2 nathanw struct mmeyepcmcia_event { 70 1.2.2.2 nathanw SIMPLEQ_ENTRY(mmeyepcmcia_event) pe_q; 71 1.2.2.2 nathanw int pe_type; 72 1.2.2.2 nathanw }; 73 1.2.2.2 nathanw 74 1.2.2.2 nathanw /* pe_type */ 75 1.2.2.2 nathanw #define MMEYEPCMCIA_EVENT_INSERTION 0 76 1.2.2.2 nathanw #define MMEYEPCMCIA_EVENT_REMOVAL 1 77 1.2.2.2 nathanw 78 1.2.2.2 nathanw struct mmeyepcmcia_handle { 79 1.2.2.2 nathanw struct mmeyepcmcia_softc *sc; 80 1.2.2.2 nathanw int flags; 81 1.2.2.2 nathanw int laststate; 82 1.2.2.2 nathanw int memalloc; 83 1.2.2.2 nathanw struct { 84 1.2.2.2 nathanw bus_addr_t addr; 85 1.2.2.2 nathanw bus_size_t size; 86 1.2.2.2 nathanw long offset; 87 1.2.2.2 nathanw int kind; 88 1.2.2.2 nathanw } mem[MMEYEPCMCIA_MEM_WINS]; 89 1.2.2.2 nathanw int ioalloc; 90 1.2.2.2 nathanw struct { 91 1.2.2.2 nathanw bus_addr_t addr; 92 1.2.2.2 nathanw bus_size_t size; 93 1.2.2.2 nathanw int width; 94 1.2.2.2 nathanw } io[MMEYEPCMCIA_IO_WINS]; 95 1.2.2.2 nathanw int ih_irq; 96 1.2.2.2 nathanw struct device *pcmcia; 97 1.2.2.2 nathanw 98 1.2.2.2 nathanw int shutdown; 99 1.2.2.2 nathanw struct proc *event_thread; 100 1.2.2.2 nathanw SIMPLEQ_HEAD(, mmeyepcmcia_event) events; 101 1.2.2.2 nathanw }; 102 1.2.2.2 nathanw 103 1.2.2.2 nathanw /* These four lines are MMTA specific */ 104 1.2.2.2 nathanw #define MMEYEPCMCIA_IRQ1 10 105 1.2.2.2 nathanw #define MMEYEPCMCIA_IRQ2 9 106 1.2.2.2 nathanw #define MMEYEPCMCIA_SLOT1_ADDR 0xb8000000 107 1.2.2.2 nathanw #define MMEYEPCMCIA_SLOT2_ADDR 0xb9000000 108 1.2.2.2 nathanw 109 1.2.2.2 nathanw #define MMEYEPCMCIA_FLAG_SOCKETP 0x0001 110 1.2.2.2 nathanw #define MMEYEPCMCIA_FLAG_CARDP 0x0002 111 1.2.2.2 nathanw 112 1.2.2.2 nathanw #define MMEYEPCMCIA_LASTSTATE_PRESENT 0x0002 113 1.2.2.2 nathanw #define MMEYEPCMCIA_LASTSTATE_HALF 0x0001 114 1.2.2.2 nathanw #define MMEYEPCMCIA_LASTSTATE_EMPTY 0x0000 115 1.2.2.2 nathanw 116 1.2.2.2 nathanw /* 117 1.2.2.2 nathanw * This is sort of arbitrary. It merely needs to be "enough". It can be 118 1.2.2.2 nathanw * overridden in the conf file, anyway. 119 1.2.2.2 nathanw */ 120 1.2.2.2 nathanw 121 1.2.2.2 nathanw #define MMEYEPCMCIA_MEM_PAGES 4 122 1.2.2.2 nathanw #define MMEYEPCMCIA_MEMSIZE MMEYEPCMCIA_MEM_PAGES*MMEYEPCMCIA_MEM_PAGESIZE 123 1.2.2.2 nathanw 124 1.2.2.2 nathanw #define MMEYEPCMCIA_NSLOTS 1 125 1.2.2.2 nathanw 126 1.2.2.2 nathanw #define MMEYEPCMCIA_WINS 5 127 1.2.2.2 nathanw #define MMEYEPCMCIA_IOWINS 2 128 1.2.2.2 nathanw 129 1.2.2.2 nathanw struct mmeyepcmcia_softc { 130 1.2.2.2 nathanw struct device dev; 131 1.2.2.2 nathanw 132 1.2.2.2 nathanw bus_space_tag_t memt; 133 1.2.2.2 nathanw bus_space_handle_t memh; 134 1.2.2.2 nathanw bus_space_tag_t iot; 135 1.2.2.2 nathanw bus_space_handle_t ioh; 136 1.2.2.2 nathanw 137 1.2.2.2 nathanw /* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */ 138 1.2.2.2 nathanw void *intr_est; 139 1.2.2.2 nathanw 140 1.2.2.2 nathanw pcmcia_chipset_tag_t pct; 141 1.2.2.2 nathanw 142 1.2.2.2 nathanw /* this needs to be large enough to hold PCIC_MEM_PAGES bits */ 143 1.2.2.2 nathanw int subregionmask; 144 1.2.2.2 nathanw #define MMEYEPCMCIA_MAX_MEM_PAGES (8 * sizeof(int)) 145 1.2.2.2 nathanw 146 1.2.2.2 nathanw /* used by memory window mapping functions */ 147 1.2.2.2 nathanw bus_addr_t membase; 148 1.2.2.2 nathanw 149 1.2.2.2 nathanw /* 150 1.2.2.2 nathanw * used by io window mapping functions. These can actually overlap 151 1.2.2.2 nathanw * with another pcic, since the underlying extent mapper will deal 152 1.2.2.2 nathanw * with individual allocations. This is here to deal with the fact 153 1.2.2.2 nathanw * that different busses have different real widths (different pc 154 1.2.2.2 nathanw * hardware seems to use 10 or 12 bits for the I/O bus). 155 1.2.2.2 nathanw */ 156 1.2.2.2 nathanw bus_addr_t iobase; 157 1.2.2.2 nathanw bus_addr_t iosize; 158 1.2.2.2 nathanw 159 1.2.2.2 nathanw int controller_irq; 160 1.2.2.2 nathanw int card_irq; 161 1.2.2.2 nathanw 162 1.2.2.2 nathanw void *ih; 163 1.2.2.2 nathanw 164 1.2.2.2 nathanw struct mmeyepcmcia_handle handle[MMEYEPCMCIA_NSLOTS]; 165 1.2.2.2 nathanw }; 166 1.2.2.2 nathanw 167 1.2.2.2 nathanw void mmeyepcmcia_attach_sockets(struct mmeyepcmcia_softc *); 168 1.2.2.2 nathanw int mmeyepcmcia_intr(void *arg); 169 1.2.2.2 nathanw 170 1.2.2.2 nathanw static inline int mmeyepcmcia_read(struct mmeyepcmcia_handle *, int); 171 1.2.2.2 nathanw static inline void mmeyepcmcia_write(struct mmeyepcmcia_handle *, int, int); 172 1.2.2.2 nathanw 173 1.2.2.2 nathanw int mmeyepcmcia_chip_mem_alloc(pcmcia_chipset_handle_t, bus_size_t, 174 1.2.2.2 nathanw struct pcmcia_mem_handle *); 175 1.2.2.2 nathanw void mmeyepcmcia_chip_mem_free(pcmcia_chipset_handle_t, 176 1.2.2.2 nathanw struct pcmcia_mem_handle *); 177 1.2.2.2 nathanw int mmeyepcmcia_chip_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t, 178 1.2.2.2 nathanw bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *); 179 1.2.2.2 nathanw void mmeyepcmcia_chip_mem_unmap(pcmcia_chipset_handle_t, int); 180 1.2.2.2 nathanw 181 1.2.2.2 nathanw int mmeyepcmcia_chip_io_alloc(pcmcia_chipset_handle_t, bus_addr_t, 182 1.2.2.2 nathanw bus_size_t, bus_size_t, struct pcmcia_io_handle *); 183 1.2.2.2 nathanw void mmeyepcmcia_chip_io_free(pcmcia_chipset_handle_t, 184 1.2.2.2 nathanw struct pcmcia_io_handle *); 185 1.2.2.2 nathanw int mmeyepcmcia_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, 186 1.2.2.2 nathanw bus_size_t, struct pcmcia_io_handle *, int *); 187 1.2.2.2 nathanw void mmeyepcmcia_chip_io_unmap(pcmcia_chipset_handle_t, int); 188 1.2.2.2 nathanw 189 1.2.2.2 nathanw void mmeyepcmcia_chip_socket_enable(pcmcia_chipset_handle_t); 190 1.2.2.2 nathanw void mmeyepcmcia_chip_socket_disable(pcmcia_chipset_handle_t); 191 1.2.2.2 nathanw 192 1.2.2.2 nathanw static __inline int mmeyepcmcia_read(struct mmeyepcmcia_handle *, int); 193 1.2.2.2 nathanw static __inline int 194 1.2.2.2 nathanw mmeyepcmcia_read(struct mmeyepcmcia_handle *h, int idx) 195 1.2.2.2 nathanw { 196 1.2.2.2 nathanw static int prev_idx = 0; 197 1.2.2.2 nathanw 198 1.2.2.2 nathanw if (idx == -1){ 199 1.2.2.2 nathanw idx = prev_idx; 200 1.2.2.2 nathanw } 201 1.2.2.2 nathanw prev_idx = idx; 202 1.2.2.2 nathanw return (bus_space_read_stream_2(h->sc->iot, h->sc->ioh, idx)); 203 1.2.2.2 nathanw } 204 1.2.2.2 nathanw 205 1.2.2.2 nathanw static __inline void mmeyepcmcia_write(struct mmeyepcmcia_handle *, int, int); 206 1.2.2.2 nathanw static __inline void 207 1.2.2.2 nathanw mmeyepcmcia_write(struct mmeyepcmcia_handle *h, int idx, int data) 208 1.2.2.2 nathanw { 209 1.2.2.2 nathanw static int prev_idx; 210 1.2.2.2 nathanw if (idx == -1){ 211 1.2.2.2 nathanw idx = prev_idx; 212 1.2.2.2 nathanw } 213 1.2.2.2 nathanw prev_idx = idx; 214 1.2.2.2 nathanw bus_space_write_stream_2(h->sc->iot, h->sc->ioh, idx, (data)); 215 1.2.2.2 nathanw } 216 1.2.2.2 nathanw 217 1.2.2.2 nathanw void *mmeyepcmcia_chip_intr_establish(pcmcia_chipset_handle_t, 218 1.2.2.2 nathanw struct pcmcia_function *, int, int (*) (void *), void *); 219 1.2.2.2 nathanw void mmeyepcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t, void *); 220 1.2.2.2 nathanw void *mmeyepcmcia_chip_intr_establish(pcmcia_chipset_handle_t, 221 1.2.2.2 nathanw struct pcmcia_function *, int, int (*) (void *), void *); 222 1.2.2.2 nathanw void mmeyepcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t, 223 1.2.2.2 nathanw void *); 224 1.2.2.2 nathanw 225 1.2.2.2 nathanw void mmeyepcmcia_attach_socket(struct mmeyepcmcia_handle *); 226 1.2.2.2 nathanw void mmeyepcmcia_init_socket(struct mmeyepcmcia_handle *); 227 1.2.2.2 nathanw int mmeyepcmcia_submatch(struct device *, struct cfdata *, void *); 228 1.2.2.2 nathanw int mmeyepcmcia_print (void *, const char *); 229 1.2.2.2 nathanw int mmeyepcmcia_intr_socket(struct mmeyepcmcia_handle *); 230 1.2.2.2 nathanw void mmeyepcmcia_attach_card(struct mmeyepcmcia_handle *); 231 1.2.2.2 nathanw void mmeyepcmcia_detach_card(struct mmeyepcmcia_handle *, int); 232 1.2.2.2 nathanw void mmeyepcmcia_deactivate_card(struct mmeyepcmcia_handle *); 233 1.2.2.2 nathanw void mmeyepcmcia_create_event_thread(void *); 234 1.2.2.2 nathanw void mmeyepcmcia_event_thread(void *); 235 1.2.2.2 nathanw void mmeyepcmcia_queue_event(struct mmeyepcmcia_handle *, int); 236 1.2.2.2 nathanw 237 1.2.2.2 nathanw int mmeyepcmcia_match(struct device *, struct cfdata *, void *); 238 1.2.2.2 nathanw void mmeyepcmcia_attach(struct device *, struct device *, void *); 239 1.2.2.2 nathanw 240 1.2.2.2 nathanw CFATTACH_DECL(mmeyepcmcia, sizeof(struct mmeyepcmcia_softc), 241 1.2.2.2 nathanw mmeyepcmcia_match, mmeyepcmcia_attach, NULL, NULL); 242 1.2.2.2 nathanw 243 1.2.2.2 nathanw static struct pcmcia_chip_functions mmeyepcmcia_functions = { 244 1.2.2.2 nathanw mmeyepcmcia_chip_mem_alloc, 245 1.2.2.2 nathanw mmeyepcmcia_chip_mem_free, 246 1.2.2.2 nathanw mmeyepcmcia_chip_mem_map, 247 1.2.2.2 nathanw mmeyepcmcia_chip_mem_unmap, 248 1.2.2.2 nathanw 249 1.2.2.2 nathanw mmeyepcmcia_chip_io_alloc, 250 1.2.2.2 nathanw mmeyepcmcia_chip_io_free, 251 1.2.2.2 nathanw mmeyepcmcia_chip_io_map, 252 1.2.2.2 nathanw mmeyepcmcia_chip_io_unmap, 253 1.2.2.2 nathanw 254 1.2.2.2 nathanw mmeyepcmcia_chip_intr_establish, 255 1.2.2.2 nathanw mmeyepcmcia_chip_intr_disestablish, 256 1.2.2.2 nathanw 257 1.2.2.2 nathanw mmeyepcmcia_chip_socket_enable, 258 1.2.2.2 nathanw mmeyepcmcia_chip_socket_disable, 259 1.2.2.2 nathanw }; 260 1.2.2.2 nathanw 261 1.2.2.2 nathanw int 262 1.2.2.2 nathanw mmeyepcmcia_match(struct device *parent, struct cfdata *match, void *aux) 263 1.2.2.2 nathanw { 264 1.2.2.2 nathanw extern struct cfdriver mmeyepcmcia_cd; 265 1.2.2.2 nathanw struct mainbus_attach_args *ma = aux; 266 1.2.2.2 nathanw 267 1.2.2.2 nathanw if (strcmp(ma->ma_name, mmeyepcmcia_cd.cd_name) == 0) 268 1.2.2.2 nathanw return (1); 269 1.2.2.2 nathanw 270 1.2.2.2 nathanw return (0); 271 1.2.2.2 nathanw } 272 1.2.2.2 nathanw 273 1.2.2.2 nathanw void 274 1.2.2.2 nathanw mmeyepcmcia_attach(struct device *parent, struct device *self, void *aux) 275 1.2.2.2 nathanw { 276 1.2.2.2 nathanw struct mainbus_attach_args *ma = aux; 277 1.2.2.2 nathanw struct mmeyepcmcia_softc *sc = (void *)self; 278 1.2.2.2 nathanw 279 1.2.2.2 nathanw sc->subregionmask = 1; /* 1999.05.17 T.Horiuchi for R1.4 */ 280 1.2.2.2 nathanw 281 1.2.2.2 nathanw sc->pct = (pcmcia_chipset_tag_t)&mmeyepcmcia_functions; 282 1.2.2.2 nathanw sc->iot = 0; 283 1.2.2.2 nathanw sc->ioh = ma->ma_addr1; 284 1.2.2.2 nathanw sc->memt = 0; 285 1.2.2.2 nathanw sc->memh = ma->ma_addr2; 286 1.2.2.2 nathanw sc->controller_irq = ma->ma_irq1; 287 1.2.2.2 nathanw sc->card_irq = ma->ma_irq2; 288 1.2.2.2 nathanw 289 1.2.2.2 nathanw printf(": using MMTA irq %d\n", sc->controller_irq); 290 1.2.2.2 nathanw 291 1.2.2.2 nathanw sc->handle[0].sc = sc; 292 1.2.2.2 nathanw sc->handle[0].flags = MMEYEPCMCIA_FLAG_SOCKETP; 293 1.2.2.2 nathanw sc->handle[0].laststate = MMEYEPCMCIA_LASTSTATE_EMPTY; 294 1.2.2.2 nathanw 295 1.2.2.2 nathanw SIMPLEQ_INIT(&sc->handle[0].events); 296 1.2.2.2 nathanw 297 1.2.2.2 nathanw mmeye_intr_establish(sc->controller_irq, 298 1.2.2.2 nathanw IST_LEVEL, IPL_TTY, mmeyepcmcia_intr, sc); 299 1.2.2.2 nathanw 300 1.2.2.2 nathanw mmeyepcmcia_attach_sockets(sc); 301 1.2.2.2 nathanw } 302 1.2.2.2 nathanw 303 1.2.2.2 nathanw void * 304 1.2.2.2 nathanw mmeyepcmcia_chip_intr_establish(pch, pf, ipl, fct, arg) 305 1.2.2.2 nathanw pcmcia_chipset_handle_t pch; 306 1.2.2.2 nathanw struct pcmcia_function *pf; 307 1.2.2.2 nathanw int ipl; 308 1.2.2.2 nathanw int (*fct)(void *); 309 1.2.2.2 nathanw void *arg; 310 1.2.2.2 nathanw { 311 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 312 1.2.2.2 nathanw int irq = h->sc->card_irq; 313 1.2.2.2 nathanw void *ih; 314 1.2.2.2 nathanw 315 1.2.2.2 nathanw ih = mmeye_intr_establish(irq, IST_LEVEL, ipl, fct, arg); 316 1.2.2.2 nathanw h->ih_irq = irq; 317 1.2.2.2 nathanw 318 1.2.2.2 nathanw printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq); 319 1.2.2.2 nathanw 320 1.2.2.2 nathanw return (ih); 321 1.2.2.2 nathanw } 322 1.2.2.2 nathanw 323 1.2.2.2 nathanw void 324 1.2.2.2 nathanw mmeyepcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih) 325 1.2.2.2 nathanw { 326 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 327 1.2.2.2 nathanw 328 1.2.2.2 nathanw h->ih_irq = 0; 329 1.2.2.2 nathanw mmeye_intr_disestablish(ih); 330 1.2.2.2 nathanw } 331 1.2.2.2 nathanw 332 1.2.2.2 nathanw 333 1.2.2.2 nathanw void 334 1.2.2.2 nathanw mmeyepcmcia_attach_sockets(struct mmeyepcmcia_softc *sc) 335 1.2.2.2 nathanw { 336 1.2.2.2 nathanw 337 1.2.2.2 nathanw mmeyepcmcia_attach_socket(&sc->handle[0]); 338 1.2.2.2 nathanw } 339 1.2.2.2 nathanw 340 1.2.2.2 nathanw void 341 1.2.2.2 nathanw mmeyepcmcia_attach_socket(struct mmeyepcmcia_handle *h) 342 1.2.2.2 nathanw { 343 1.2.2.2 nathanw struct pcmciabus_attach_args paa; 344 1.2.2.2 nathanw 345 1.2.2.2 nathanw /* initialize the rest of the handle */ 346 1.2.2.2 nathanw 347 1.2.2.2 nathanw h->shutdown = 0; 348 1.2.2.2 nathanw h->memalloc = 0; 349 1.2.2.2 nathanw h->ioalloc = 0; 350 1.2.2.2 nathanw h->ih_irq = 0; 351 1.2.2.2 nathanw 352 1.2.2.2 nathanw /* now, config one pcmcia device per socket */ 353 1.2.2.2 nathanw 354 1.2.2.2 nathanw paa.paa_busname = "pcmcia"; 355 1.2.2.2 nathanw paa.pct = (pcmcia_chipset_tag_t) h->sc->pct; 356 1.2.2.2 nathanw paa.pch = (pcmcia_chipset_handle_t) h; 357 1.2.2.2 nathanw paa.iobase = h->sc->iobase; 358 1.2.2.2 nathanw paa.iosize = h->sc->iosize; 359 1.2.2.2 nathanw 360 1.2.2.2 nathanw h->pcmcia = config_found_sm(&h->sc->dev, &paa, mmeyepcmcia_print, 361 1.2.2.2 nathanw mmeyepcmcia_submatch); 362 1.2.2.2 nathanw 363 1.2.2.2 nathanw /* if there's actually a pcmcia device attached, initialize the slot */ 364 1.2.2.2 nathanw 365 1.2.2.2 nathanw if (h->pcmcia) 366 1.2.2.2 nathanw mmeyepcmcia_init_socket(h); 367 1.2.2.2 nathanw } 368 1.2.2.2 nathanw 369 1.2.2.2 nathanw void 370 1.2.2.2 nathanw mmeyepcmcia_create_event_thread(void *arg) 371 1.2.2.2 nathanw { 372 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = arg; 373 1.2.2.2 nathanw 374 1.2.2.2 nathanw if (kthread_create1(mmeyepcmcia_event_thread, h, &h->event_thread, 375 1.2.2.2 nathanw "%s", h->sc->dev.dv_xname)) { 376 1.2.2.2 nathanw printf("%s: unable to create event thread\n", 377 1.2.2.2 nathanw h->sc->dev.dv_xname); 378 1.2.2.2 nathanw panic("mmeyepcmcia_create_event_thread"); 379 1.2.2.2 nathanw } 380 1.2.2.2 nathanw } 381 1.2.2.2 nathanw 382 1.2.2.2 nathanw void 383 1.2.2.2 nathanw mmeyepcmcia_event_thread(void *arg) 384 1.2.2.2 nathanw { 385 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = arg; 386 1.2.2.2 nathanw struct mmeyepcmcia_event *pe; 387 1.2.2.2 nathanw int s; 388 1.2.2.2 nathanw 389 1.2.2.2 nathanw while (h->shutdown == 0) { 390 1.2.2.2 nathanw s = splhigh(); 391 1.2.2.2 nathanw if ((pe = SIMPLEQ_FIRST(&h->events)) == NULL) { 392 1.2.2.2 nathanw splx(s); 393 1.2.2.2 nathanw (void) tsleep(&h->events, PWAIT, "mmeyepcmciaev", 0); 394 1.2.2.2 nathanw continue; 395 1.2.2.2 nathanw } else { 396 1.2.2.2 nathanw splx(s); 397 1.2.2.2 nathanw /* sleep .25s to be enqueued chatterling interrupts */ 398 1.2.2.2 nathanw (void) tsleep((caddr_t)mmeyepcmcia_event_thread, PWAIT, 399 1.2.2.2 nathanw "mmeyepcmciass", hz/4); 400 1.2.2.2 nathanw } 401 1.2.2.2 nathanw s = splhigh(); 402 1.2.2.2 nathanw SIMPLEQ_REMOVE_HEAD(&h->events, pe_q); 403 1.2.2.2 nathanw splx(s); 404 1.2.2.2 nathanw 405 1.2.2.2 nathanw switch (pe->pe_type) { 406 1.2.2.2 nathanw case MMEYEPCMCIA_EVENT_INSERTION: 407 1.2.2.2 nathanw s = splhigh(); 408 1.2.2.2 nathanw while (1) { 409 1.2.2.2 nathanw struct mmeyepcmcia_event *pe1, *pe2; 410 1.2.2.2 nathanw 411 1.2.2.2 nathanw if ((pe1 = SIMPLEQ_FIRST(&h->events)) == NULL) 412 1.2.2.2 nathanw break; 413 1.2.2.2 nathanw if (pe1->pe_type != MMEYEPCMCIA_EVENT_REMOVAL) 414 1.2.2.2 nathanw break; 415 1.2.2.2 nathanw if ((pe2 = SIMPLEQ_NEXT(pe1, pe_q)) == NULL) 416 1.2.2.2 nathanw break; 417 1.2.2.2 nathanw if (pe2->pe_type == MMEYEPCMCIA_EVENT_INSERTION) { 418 1.2.2.2 nathanw SIMPLEQ_REMOVE_HEAD(&h->events, pe_q); 419 1.2.2.2 nathanw free(pe1, M_TEMP); 420 1.2.2.2 nathanw SIMPLEQ_REMOVE_HEAD(&h->events, pe_q); 421 1.2.2.2 nathanw free(pe2, M_TEMP); 422 1.2.2.2 nathanw } 423 1.2.2.2 nathanw } 424 1.2.2.2 nathanw splx(s); 425 1.2.2.2 nathanw 426 1.2.2.2 nathanw DPRINTF(("%s: insertion event\n", h->sc->dev.dv_xname)); 427 1.2.2.2 nathanw mmeyepcmcia_attach_card(h); 428 1.2.2.2 nathanw break; 429 1.2.2.2 nathanw 430 1.2.2.2 nathanw case MMEYEPCMCIA_EVENT_REMOVAL: 431 1.2.2.2 nathanw s = splhigh(); 432 1.2.2.2 nathanw while (1) { 433 1.2.2.2 nathanw struct mmeyepcmcia_event *pe1, *pe2; 434 1.2.2.2 nathanw 435 1.2.2.2 nathanw if ((pe1 = SIMPLEQ_FIRST(&h->events)) == NULL) 436 1.2.2.2 nathanw break; 437 1.2.2.2 nathanw if (pe1->pe_type != MMEYEPCMCIA_EVENT_INSERTION) 438 1.2.2.2 nathanw break; 439 1.2.2.2 nathanw if ((pe2 = SIMPLEQ_NEXT(pe1, pe_q)) == NULL) 440 1.2.2.2 nathanw break; 441 1.2.2.2 nathanw if (pe2->pe_type == MMEYEPCMCIA_EVENT_REMOVAL) { 442 1.2.2.2 nathanw SIMPLEQ_REMOVE_HEAD(&h->events, pe_q); 443 1.2.2.2 nathanw free(pe1, M_TEMP); 444 1.2.2.2 nathanw SIMPLEQ_REMOVE_HEAD(&h->events, pe_q); 445 1.2.2.2 nathanw free(pe2, M_TEMP); 446 1.2.2.2 nathanw } 447 1.2.2.2 nathanw } 448 1.2.2.2 nathanw splx(s); 449 1.2.2.2 nathanw 450 1.2.2.2 nathanw DPRINTF(("%s: removal event\n", h->sc->dev.dv_xname)); 451 1.2.2.2 nathanw mmeyepcmcia_detach_card(h, DETACH_FORCE); 452 1.2.2.2 nathanw break; 453 1.2.2.2 nathanw 454 1.2.2.2 nathanw default: 455 1.2.2.2 nathanw panic("mmeyepcmcia_event_thread: unknown event %d", 456 1.2.2.2 nathanw pe->pe_type); 457 1.2.2.2 nathanw } 458 1.2.2.2 nathanw free(pe, M_TEMP); 459 1.2.2.2 nathanw } 460 1.2.2.2 nathanw 461 1.2.2.2 nathanw h->event_thread = NULL; 462 1.2.2.2 nathanw 463 1.2.2.2 nathanw /* In case parent is waiting for us to exit. */ 464 1.2.2.2 nathanw wakeup(h->sc); 465 1.2.2.2 nathanw 466 1.2.2.2 nathanw kthread_exit(0); 467 1.2.2.2 nathanw } 468 1.2.2.2 nathanw 469 1.2.2.2 nathanw void 470 1.2.2.2 nathanw mmeyepcmcia_init_socket(struct mmeyepcmcia_handle *h) 471 1.2.2.2 nathanw { 472 1.2.2.2 nathanw int reg; 473 1.2.2.2 nathanw 474 1.2.2.2 nathanw /* 475 1.2.2.2 nathanw * queue creation of a kernel thread to handle insert/removal events. 476 1.2.2.2 nathanw */ 477 1.2.2.2 nathanw #ifdef DIAGNOSTIC 478 1.2.2.2 nathanw if (h->event_thread != NULL) 479 1.2.2.2 nathanw panic("mmeyepcmcia_attach_socket: event thread"); 480 1.2.2.2 nathanw #endif 481 1.2.2.2 nathanw kthread_create(mmeyepcmcia_create_event_thread, h); 482 1.2.2.2 nathanw 483 1.2.2.2 nathanw /* if there's a card there, then attach it. */ 484 1.2.2.2 nathanw 485 1.2.2.2 nathanw reg = mmeyepcmcia_read(h, MMEYEPCMCIA_IF_STATUS); 486 1.2.2.2 nathanw reg &= ~MMEYEPCMCIA_IF_STATUS_BUSWIDTH; /* Set bus width to 16bit */ 487 1.2.2.2 nathanw 488 1.2.2.2 nathanw if ((reg & MMEYEPCMCIA_IF_STATUS_CARDDETECT_MASK) == 489 1.2.2.2 nathanw MMEYEPCMCIA_IF_STATUS_CARDDETECT_PRESENT) { 490 1.2.2.2 nathanw int i; 491 1.2.2.2 nathanw 492 1.2.2.2 nathanw /* reset the card */ 493 1.2.2.2 nathanw mmeyepcmcia_write(h, MMEYEPCMCIA_IF_STATUS, reg|MMEYEPCMCIA_IF_STATUS_RESET); 494 1.2.2.2 nathanw delay(1000); /* wait 1000 uSec */ 495 1.2.2.2 nathanw mmeyepcmcia_write(h, MMEYEPCMCIA_IF_STATUS, 496 1.2.2.2 nathanw reg & ~MMEYEPCMCIA_IF_STATUS_RESET); 497 1.2.2.2 nathanw for (i = 0; i < 10000; i++) 498 1.2.2.2 nathanw delay(1000); /* wait 1 mSec */ 499 1.2.2.2 nathanw 500 1.2.2.2 nathanw mmeyepcmcia_attach_card(h); 501 1.2.2.2 nathanw h->laststate = MMEYEPCMCIA_LASTSTATE_PRESENT; 502 1.2.2.2 nathanw } else { 503 1.2.2.2 nathanw h->laststate = MMEYEPCMCIA_LASTSTATE_EMPTY; 504 1.2.2.2 nathanw } 505 1.2.2.2 nathanw } 506 1.2.2.2 nathanw 507 1.2.2.2 nathanw int 508 1.2.2.2 nathanw mmeyepcmcia_submatch(struct device *parent, struct cfdata *cf, void *aux) 509 1.2.2.2 nathanw { 510 1.2.2.2 nathanw 511 1.2.2.2 nathanw return (config_match(parent, cf, aux)); 512 1.2.2.2 nathanw } 513 1.2.2.2 nathanw 514 1.2.2.2 nathanw int 515 1.2.2.2 nathanw mmeyepcmcia_print(void *arg, const char *pnp) 516 1.2.2.2 nathanw { 517 1.2.2.2 nathanw 518 1.2.2.2 nathanw if (pnp) 519 1.2.2.2 nathanw printf("pcmcia at %s", pnp); 520 1.2.2.2 nathanw 521 1.2.2.2 nathanw return (UNCONF); 522 1.2.2.2 nathanw } 523 1.2.2.2 nathanw 524 1.2.2.2 nathanw int 525 1.2.2.2 nathanw mmeyepcmcia_intr(void *arg) 526 1.2.2.2 nathanw { 527 1.2.2.2 nathanw struct mmeyepcmcia_softc *sc = arg; 528 1.2.2.2 nathanw 529 1.2.2.2 nathanw DPRINTF(("%s: intr\n", sc->dev.dv_xname)); 530 1.2.2.2 nathanw 531 1.2.2.2 nathanw mmeyepcmcia_intr_socket(&sc->handle[0]); 532 1.2.2.2 nathanw 533 1.2.2.2 nathanw return (0); 534 1.2.2.2 nathanw } 535 1.2.2.2 nathanw 536 1.2.2.2 nathanw int 537 1.2.2.2 nathanw mmeyepcmcia_intr_socket(struct mmeyepcmcia_handle *h) 538 1.2.2.2 nathanw { 539 1.2.2.2 nathanw int cscreg; 540 1.2.2.2 nathanw 541 1.2.2.2 nathanw cscreg = mmeyepcmcia_read(h, MMEYEPCMCIA_CSC); 542 1.2.2.2 nathanw 543 1.2.2.2 nathanw cscreg &= (MMEYEPCMCIA_CSC_GPI | 544 1.2.2.2 nathanw MMEYEPCMCIA_CSC_CD | 545 1.2.2.2 nathanw MMEYEPCMCIA_CSC_READY | 546 1.2.2.2 nathanw MMEYEPCMCIA_CSC_BATTWARN | 547 1.2.2.2 nathanw MMEYEPCMCIA_CSC_BATTDEAD); 548 1.2.2.2 nathanw 549 1.2.2.2 nathanw if (cscreg & MMEYEPCMCIA_CSC_GPI) { 550 1.2.2.2 nathanw DPRINTF(("%s: %02x GPI\n", h->sc->dev.dv_xname, h->sock)); 551 1.2.2.2 nathanw } 552 1.2.2.2 nathanw if (cscreg & MMEYEPCMCIA_CSC_CD) { 553 1.2.2.2 nathanw int statreg; 554 1.2.2.2 nathanw 555 1.2.2.2 nathanw statreg = mmeyepcmcia_read(h, MMEYEPCMCIA_IF_STATUS); 556 1.2.2.2 nathanw 557 1.2.2.2 nathanw DPRINTF(("%s: %02x CD %x\n", h->sc->dev.dv_xname, h->sock, 558 1.2.2.2 nathanw statreg)); 559 1.2.2.2 nathanw 560 1.2.2.2 nathanw if ((statreg & MMEYEPCMCIA_IF_STATUS_CARDDETECT_MASK) == 561 1.2.2.2 nathanw MMEYEPCMCIA_IF_STATUS_CARDDETECT_PRESENT) { 562 1.2.2.2 nathanw if (h->laststate != MMEYEPCMCIA_LASTSTATE_PRESENT) { 563 1.2.2.2 nathanw DPRINTF(("%s: enqueing INSERTION event\n", 564 1.2.2.2 nathanw h->sc->dev.dv_xname)); 565 1.2.2.2 nathanw mmeyepcmcia_queue_event(h, MMEYEPCMCIA_EVENT_INSERTION); 566 1.2.2.2 nathanw } 567 1.2.2.2 nathanw h->laststate = MMEYEPCMCIA_LASTSTATE_PRESENT; 568 1.2.2.2 nathanw } else { 569 1.2.2.2 nathanw if (h->laststate == MMEYEPCMCIA_LASTSTATE_PRESENT) { 570 1.2.2.2 nathanw /* Deactivate the card now. */ 571 1.2.2.2 nathanw DPRINTF(("%s: deactivating card\n", 572 1.2.2.2 nathanw h->sc->dev.dv_xname)); 573 1.2.2.2 nathanw mmeyepcmcia_deactivate_card(h); 574 1.2.2.2 nathanw 575 1.2.2.2 nathanw DPRINTF(("%s: enqueing REMOVAL event\n", 576 1.2.2.2 nathanw h->sc->dev.dv_xname)); 577 1.2.2.2 nathanw mmeyepcmcia_queue_event(h, MMEYEPCMCIA_EVENT_REMOVAL); 578 1.2.2.2 nathanw } 579 1.2.2.2 nathanw h->laststate = ((statreg & MMEYEPCMCIA_IF_STATUS_CARDDETECT_MASK) == 0) 580 1.2.2.2 nathanw ? MMEYEPCMCIA_LASTSTATE_EMPTY : MMEYEPCMCIA_LASTSTATE_HALF; 581 1.2.2.2 nathanw } 582 1.2.2.2 nathanw } 583 1.2.2.2 nathanw if (cscreg & MMEYEPCMCIA_CSC_READY) { 584 1.2.2.2 nathanw DPRINTF(("%s: %02x READY\n", h->sc->dev.dv_xname, h->sock)); 585 1.2.2.2 nathanw /* shouldn't happen */ 586 1.2.2.2 nathanw } 587 1.2.2.2 nathanw if (cscreg & MMEYEPCMCIA_CSC_BATTWARN) { 588 1.2.2.2 nathanw DPRINTF(("%s: %02x BATTWARN\n", h->sc->dev.dv_xname, h->sock)); 589 1.2.2.2 nathanw } 590 1.2.2.2 nathanw if (cscreg & MMEYEPCMCIA_CSC_BATTDEAD) { 591 1.2.2.2 nathanw DPRINTF(("%s: %02x BATTDEAD\n", h->sc->dev.dv_xname, h->sock)); 592 1.2.2.2 nathanw } 593 1.2.2.2 nathanw return (cscreg ? 1 : 0); 594 1.2.2.2 nathanw } 595 1.2.2.2 nathanw 596 1.2.2.2 nathanw void 597 1.2.2.2 nathanw mmeyepcmcia_queue_event(struct mmeyepcmcia_handle *h, int event) 598 1.2.2.2 nathanw { 599 1.2.2.2 nathanw struct mmeyepcmcia_event *pe; 600 1.2.2.2 nathanw int s; 601 1.2.2.2 nathanw 602 1.2.2.2 nathanw pe = malloc(sizeof(*pe), M_TEMP, M_NOWAIT); 603 1.2.2.2 nathanw if (pe == NULL) 604 1.2.2.2 nathanw panic("mmeyepcmcia_queue_event: can't allocate event"); 605 1.2.2.2 nathanw 606 1.2.2.2 nathanw pe->pe_type = event; 607 1.2.2.2 nathanw s = splhigh(); 608 1.2.2.2 nathanw SIMPLEQ_INSERT_TAIL(&h->events, pe, pe_q); 609 1.2.2.2 nathanw splx(s); 610 1.2.2.2 nathanw wakeup(&h->events); 611 1.2.2.2 nathanw } 612 1.2.2.2 nathanw 613 1.2.2.2 nathanw void 614 1.2.2.2 nathanw mmeyepcmcia_attach_card(struct mmeyepcmcia_handle *h) 615 1.2.2.2 nathanw { 616 1.2.2.2 nathanw 617 1.2.2.2 nathanw if (!(h->flags & MMEYEPCMCIA_FLAG_CARDP)) { 618 1.2.2.2 nathanw /* call the MI attach function */ 619 1.2.2.2 nathanw pcmcia_card_attach(h->pcmcia); 620 1.2.2.2 nathanw 621 1.2.2.2 nathanw h->flags |= MMEYEPCMCIA_FLAG_CARDP; 622 1.2.2.2 nathanw } else { 623 1.2.2.2 nathanw DPRINTF(("mmeyepcmcia_attach_card: already attached")); 624 1.2.2.2 nathanw } 625 1.2.2.2 nathanw } 626 1.2.2.2 nathanw 627 1.2.2.2 nathanw void 628 1.2.2.2 nathanw mmeyepcmcia_detach_card(struct mmeyepcmcia_handle *h, int flags) 629 1.2.2.2 nathanw { 630 1.2.2.2 nathanw 631 1.2.2.2 nathanw if (h->flags & MMEYEPCMCIA_FLAG_CARDP) { 632 1.2.2.2 nathanw h->flags &= ~MMEYEPCMCIA_FLAG_CARDP; 633 1.2.2.2 nathanw 634 1.2.2.2 nathanw /* call the MI detach function */ 635 1.2.2.2 nathanw pcmcia_card_detach(h->pcmcia, flags); 636 1.2.2.2 nathanw } else { 637 1.2.2.2 nathanw DPRINTF(("mmeyepcmcia_detach_card: already detached")); 638 1.2.2.2 nathanw } 639 1.2.2.2 nathanw } 640 1.2.2.2 nathanw 641 1.2.2.2 nathanw void 642 1.2.2.2 nathanw mmeyepcmcia_deactivate_card(struct mmeyepcmcia_handle *h) 643 1.2.2.2 nathanw { 644 1.2.2.2 nathanw 645 1.2.2.2 nathanw /* call the MI deactivate function */ 646 1.2.2.2 nathanw pcmcia_card_deactivate(h->pcmcia); 647 1.2.2.2 nathanw 648 1.2.2.2 nathanw /* Power down and reset XXX notyet */ 649 1.2.2.2 nathanw } 650 1.2.2.2 nathanw 651 1.2.2.2 nathanw int 652 1.2.2.2 nathanw mmeyepcmcia_chip_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size, 653 1.2.2.2 nathanw struct pcmcia_mem_handle *pcmhp) 654 1.2.2.2 nathanw { 655 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 656 1.2.2.2 nathanw bus_space_handle_t memh = 0; 657 1.2.2.2 nathanw bus_addr_t addr; 658 1.2.2.2 nathanw bus_size_t sizepg; 659 1.2.2.2 nathanw int i, mask, mhandle; 660 1.2.2.2 nathanw 661 1.2.2.2 nathanw /* out of sc->memh, allocate as many pages as necessary */ 662 1.2.2.2 nathanw #define MMEYEPCMCIA_MEM_ALIGN MMEYEPCMCIA_MEM_PAGESIZE 663 1.2.2.2 nathanw /* convert size to PCIC pages */ 664 1.2.2.2 nathanw sizepg = (size + (MMEYEPCMCIA_MEM_ALIGN - 1)) / MMEYEPCMCIA_MEM_ALIGN; 665 1.2.2.2 nathanw if (sizepg > MMEYEPCMCIA_MAX_MEM_PAGES) 666 1.2.2.2 nathanw return (1); 667 1.2.2.2 nathanw 668 1.2.2.2 nathanw mask = (1 << sizepg) - 1; 669 1.2.2.2 nathanw 670 1.2.2.2 nathanw addr = 0; /* XXX gcc -Wuninitialized */ 671 1.2.2.2 nathanw mhandle = 0; /* XXX gcc -Wuninitialized */ 672 1.2.2.2 nathanw 673 1.2.2.2 nathanw for (i = 0; i <= MMEYEPCMCIA_MAX_MEM_PAGES - sizepg; i++) { 674 1.2.2.2 nathanw if ((h->sc->subregionmask & (mask << i)) == (mask << i)) { 675 1.2.2.2 nathanw #if 0 676 1.2.2.2 nathanw if (bus_space_subregion(h->sc->memt, h->sc->memh, 677 1.2.2.2 nathanw i * MMEYEPCMCIA_MEM_PAGESIZE, 678 1.2.2.2 nathanw sizepg * MMEYEPCMCIA_MEM_PAGESIZE, &memh)) 679 1.2.2.2 nathanw return (1); 680 1.2.2.2 nathanw #endif 681 1.2.2.2 nathanw memh = h->sc->memh; 682 1.2.2.2 nathanw mhandle = mask << i; 683 1.2.2.2 nathanw addr = h->sc->membase + (i * MMEYEPCMCIA_MEM_PAGESIZE); 684 1.2.2.2 nathanw h->sc->subregionmask &= ~(mhandle); 685 1.2.2.2 nathanw pcmhp->memt = h->sc->memt; 686 1.2.2.2 nathanw pcmhp->memh = memh; 687 1.2.2.2 nathanw pcmhp->addr = addr; 688 1.2.2.2 nathanw pcmhp->size = size; 689 1.2.2.2 nathanw pcmhp->mhandle = mhandle; 690 1.2.2.2 nathanw pcmhp->realsize = sizepg * MMEYEPCMCIA_MEM_PAGESIZE; 691 1.2.2.2 nathanw return (0); 692 1.2.2.2 nathanw } 693 1.2.2.2 nathanw } 694 1.2.2.2 nathanw 695 1.2.2.2 nathanw return (1); 696 1.2.2.2 nathanw } 697 1.2.2.2 nathanw 698 1.2.2.2 nathanw void 699 1.2.2.2 nathanw mmeyepcmcia_chip_mem_free(pcmcia_chipset_handle_t pch, 700 1.2.2.2 nathanw struct pcmcia_mem_handle *pcmhp) 701 1.2.2.2 nathanw { 702 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 703 1.2.2.2 nathanw 704 1.2.2.2 nathanw h->sc->subregionmask |= pcmhp->mhandle; 705 1.2.2.2 nathanw } 706 1.2.2.2 nathanw 707 1.2.2.2 nathanw int 708 1.2.2.2 nathanw mmeyepcmcia_chip_mem_map(pcmcia_chipset_handle_t pch, int kind, 709 1.2.2.2 nathanw bus_addr_t card_addr, bus_size_t size, struct pcmcia_mem_handle *pcmhp, 710 1.2.2.2 nathanw bus_size_t *offsetp, int *windowp) 711 1.2.2.2 nathanw { 712 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 713 1.2.2.2 nathanw bus_addr_t busaddr; 714 1.2.2.2 nathanw long card_offset; 715 1.2.2.2 nathanw int i, win; 716 1.2.2.2 nathanw 717 1.2.2.2 nathanw win = -1; 718 1.2.2.2 nathanw for (i = 0; i < MMEYEPCMCIA_WINS; 719 1.2.2.2 nathanw i++) { 720 1.2.2.2 nathanw if ((h->memalloc & (1 << i)) == 0) { 721 1.2.2.2 nathanw win = i; 722 1.2.2.2 nathanw h->memalloc |= (1 << i); 723 1.2.2.2 nathanw break; 724 1.2.2.2 nathanw } 725 1.2.2.2 nathanw } 726 1.2.2.2 nathanw 727 1.2.2.2 nathanw if (win == -1) 728 1.2.2.2 nathanw return (1); 729 1.2.2.2 nathanw 730 1.2.2.2 nathanw *windowp = win; 731 1.2.2.2 nathanw 732 1.2.2.2 nathanw /* XXX this is pretty gross */ 733 1.2.2.2 nathanw 734 1.2.2.2 nathanw if (h->sc->memt != pcmhp->memt) 735 1.2.2.2 nathanw panic("mmeyepcmcia_chip_mem_map memt is bogus"); 736 1.2.2.2 nathanw 737 1.2.2.2 nathanw busaddr = pcmhp->addr; 738 1.2.2.2 nathanw 739 1.2.2.2 nathanw /* 740 1.2.2.2 nathanw * compute the address offset to the pcmcia address space for the 741 1.2.2.2 nathanw * pcic. this is intentionally signed. The masks and shifts below 742 1.2.2.2 nathanw * will cause TRT to happen in the pcic registers. Deal with making 743 1.2.2.2 nathanw * sure the address is aligned, and return the alignment offset. 744 1.2.2.2 nathanw */ 745 1.2.2.2 nathanw 746 1.2.2.2 nathanw *offsetp = 0; 747 1.2.2.2 nathanw card_addr -= *offsetp; 748 1.2.2.2 nathanw 749 1.2.2.2 nathanw DPRINTF(("mmeyepcmcia_chip_mem_map window %d bus %lx+%lx+%lx at card addr " 750 1.2.2.2 nathanw "%lx\n", win, (u_long) busaddr, (u_long) * offsetp, (u_long) size, 751 1.2.2.2 nathanw (u_long) card_addr)); 752 1.2.2.2 nathanw 753 1.2.2.2 nathanw /* 754 1.2.2.2 nathanw * include the offset in the size, and decrement size by one, since 755 1.2.2.2 nathanw * the hw wants start/stop 756 1.2.2.2 nathanw */ 757 1.2.2.2 nathanw size += *offsetp - 1; 758 1.2.2.2 nathanw 759 1.2.2.2 nathanw card_offset = (((long) card_addr) - ((long) busaddr)); 760 1.2.2.2 nathanw 761 1.2.2.2 nathanw h->mem[win].addr = busaddr; 762 1.2.2.2 nathanw h->mem[win].size = size; 763 1.2.2.2 nathanw h->mem[win].offset = card_offset; 764 1.2.2.2 nathanw h->mem[win].kind = kind; 765 1.2.2.2 nathanw 766 1.2.2.2 nathanw if (kind == PCMCIA_MEM_ATTR) { 767 1.2.2.2 nathanw pcmhp->memh = h->sc->memh + card_addr; 768 1.2.2.2 nathanw } else { 769 1.2.2.2 nathanw pcmhp->memh = h->sc->memh + card_addr + MMEYEPCMCIA_ATTRMEM_SIZE; 770 1.2.2.2 nathanw } 771 1.2.2.2 nathanw 772 1.2.2.2 nathanw return (0); 773 1.2.2.2 nathanw } 774 1.2.2.2 nathanw 775 1.2.2.2 nathanw void 776 1.2.2.2 nathanw mmeyepcmcia_chip_mem_unmap(pcmcia_chipset_handle_t pch, int window) 777 1.2.2.2 nathanw { 778 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 779 1.2.2.2 nathanw 780 1.2.2.2 nathanw if (window >= MMEYEPCMCIA_WINS) 781 1.2.2.2 nathanw panic("mmeyepcmcia_chip_mem_unmap: window out of range"); 782 1.2.2.2 nathanw 783 1.2.2.2 nathanw h->memalloc &= ~(1 << window); 784 1.2.2.2 nathanw } 785 1.2.2.2 nathanw 786 1.2.2.2 nathanw int 787 1.2.2.2 nathanw mmeyepcmcia_chip_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start, 788 1.2.2.2 nathanw bus_size_t size, bus_size_t align, struct pcmcia_io_handle *pcihp) 789 1.2.2.2 nathanw { 790 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 791 1.2.2.2 nathanw bus_space_tag_t iot; 792 1.2.2.2 nathanw bus_space_handle_t ioh; 793 1.2.2.2 nathanw bus_addr_t ioaddr; 794 1.2.2.2 nathanw int flags = 0; 795 1.2.2.2 nathanw 796 1.2.2.2 nathanw /* 797 1.2.2.2 nathanw * Allocate some arbitrary I/O space. 798 1.2.2.2 nathanw */ 799 1.2.2.2 nathanw 800 1.2.2.2 nathanw iot = h->sc->iot; 801 1.2.2.2 nathanw 802 1.2.2.2 nathanw if (start) { 803 1.2.2.2 nathanw ioaddr = start; 804 1.2.2.2 nathanw ioh = start; 805 1.2.2.2 nathanw DPRINTF(("mmeyepcmcia_chip_io_alloc map port %lx+%lx\n", 806 1.2.2.2 nathanw (u_long) ioaddr, (u_long) size)); 807 1.2.2.2 nathanw } else { 808 1.2.2.2 nathanw flags |= PCMCIA_IO_ALLOCATED; 809 1.2.2.2 nathanw ioaddr = ioh = h->sc->iobase; 810 1.2.2.2 nathanw DPRINTF(("mmeyepcmcia_chip_io_alloc alloc port %lx+%lx\n", 811 1.2.2.2 nathanw (u_long) ioaddr, (u_long) size)); 812 1.2.2.2 nathanw } 813 1.2.2.2 nathanw 814 1.2.2.2 nathanw pcihp->iot = iot; 815 1.2.2.2 nathanw pcihp->ioh = ioh + h->sc->memh + MMEYEPCMCIA_ATTRMEM_SIZE; 816 1.2.2.2 nathanw pcihp->addr = ioaddr; 817 1.2.2.2 nathanw pcihp->size = size; 818 1.2.2.2 nathanw pcihp->flags = flags; 819 1.2.2.2 nathanw 820 1.2.2.2 nathanw return (0); 821 1.2.2.2 nathanw } 822 1.2.2.2 nathanw 823 1.2.2.2 nathanw void 824 1.2.2.2 nathanw mmeyepcmcia_chip_io_free(pcmcia_chipset_handle_t pch, 825 1.2.2.2 nathanw struct pcmcia_io_handle *pcihp) 826 1.2.2.2 nathanw { 827 1.2.2.2 nathanw } 828 1.2.2.2 nathanw 829 1.2.2.2 nathanw int 830 1.2.2.2 nathanw mmeyepcmcia_chip_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset, 831 1.2.2.2 nathanw bus_size_t size, struct pcmcia_io_handle *pcihp, int *windowp) 832 1.2.2.2 nathanw { 833 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 834 1.2.2.2 nathanw bus_addr_t ioaddr = pcihp->addr + offset; 835 1.2.2.2 nathanw int i, win; 836 1.2.2.2 nathanw #ifdef MMEYEPCMCIADEBUG 837 1.2.2.2 nathanw static char *width_names[] = { "auto", "io8", "io16" }; 838 1.2.2.2 nathanw #endif 839 1.2.2.2 nathanw int reg; 840 1.2.2.2 nathanw 841 1.2.2.2 nathanw /* I/O width is hardwired to 16bit mode on mmeye. */ 842 1.2.2.2 nathanw width = PCMCIA_WIDTH_IO16; 843 1.2.2.2 nathanw 844 1.2.2.2 nathanw win = -1; 845 1.2.2.2 nathanw for (i = 0; i < MMEYEPCMCIA_IOWINS; i++) { 846 1.2.2.2 nathanw if ((h->ioalloc & (1 << i)) == 0) { 847 1.2.2.2 nathanw win = i; 848 1.2.2.2 nathanw h->ioalloc |= (1 << i); 849 1.2.2.2 nathanw break; 850 1.2.2.2 nathanw } 851 1.2.2.2 nathanw } 852 1.2.2.2 nathanw 853 1.2.2.2 nathanw if (win == -1) 854 1.2.2.2 nathanw return (1); 855 1.2.2.2 nathanw 856 1.2.2.2 nathanw *windowp = win; 857 1.2.2.2 nathanw 858 1.2.2.2 nathanw /* XXX this is pretty gross */ 859 1.2.2.2 nathanw 860 1.2.2.2 nathanw if (h->sc->iot != pcihp->iot) 861 1.2.2.2 nathanw panic("mmeyepcmcia_chip_io_map iot is bogus"); 862 1.2.2.2 nathanw 863 1.2.2.2 nathanw DPRINTF(("mmeyepcmcia_chip_io_map window %d %s port %lx+%lx\n", 864 1.2.2.2 nathanw win, width_names[width], (u_long) ioaddr, (u_long) size)); 865 1.2.2.2 nathanw 866 1.2.2.2 nathanw /* XXX wtf is this doing here? */ 867 1.2.2.2 nathanw 868 1.2.2.2 nathanw printf(" port 0x%lx", (u_long) ioaddr); 869 1.2.2.2 nathanw if (size > 1) 870 1.2.2.2 nathanw printf("-0x%lx", (u_long) ioaddr + (u_long) size - 1); 871 1.2.2.2 nathanw 872 1.2.2.2 nathanw h->io[win].addr = ioaddr; 873 1.2.2.2 nathanw h->io[win].size = size; 874 1.2.2.2 nathanw h->io[win].width = width; 875 1.2.2.2 nathanw 876 1.2.2.2 nathanw pcihp->ioh = h->sc->memh + MMEYEPCMCIA_ATTRMEM_SIZE; 877 1.2.2.2 nathanw 878 1.2.2.2 nathanw if (width == PCMCIA_WIDTH_IO8) { /* IO8 */ 879 1.2.2.2 nathanw reg = mmeyepcmcia_read(h, MMEYEPCMCIA_IF_STATUS); 880 1.2.2.2 nathanw reg |= MMEYEPCMCIA_IF_STATUS_BUSWIDTH; /* Set bus width to 8bit */ 881 1.2.2.2 nathanw mmeyepcmcia_write(h, MMEYEPCMCIA_IF_STATUS, reg); 882 1.2.2.2 nathanw } 883 1.2.2.2 nathanw 884 1.2.2.2 nathanw return (0); 885 1.2.2.2 nathanw } 886 1.2.2.2 nathanw 887 1.2.2.2 nathanw void 888 1.2.2.2 nathanw mmeyepcmcia_chip_io_unmap(pcmcia_chipset_handle_t pch, int window) 889 1.2.2.2 nathanw { 890 1.2.2.2 nathanw struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch; 891 1.2.2.2 nathanw 892 1.2.2.2 nathanw if (window >= MMEYEPCMCIA_IOWINS) 893 1.2.2.2 nathanw panic("mmeyepcmcia_chip_io_unmap: window out of range"); 894 1.2.2.2 nathanw 895 1.2.2.2 nathanw h->ioalloc &= ~(1 << window); 896 1.2.2.2 nathanw } 897 1.2.2.2 nathanw 898 1.2.2.2 nathanw void 899 1.2.2.2 nathanw mmeyepcmcia_chip_socket_enable(pcmcia_chipset_handle_t pch) 900 1.2.2.2 nathanw { 901 1.2.2.2 nathanw } 902 1.2.2.2 nathanw 903 1.2.2.2 nathanw void 904 1.2.2.2 nathanw mmeyepcmcia_chip_socket_disable(pcmcia_chipset_handle_t pch) 905 1.2.2.2 nathanw { 906 1.2.2.2 nathanw } 907
Indexes created Fri Oct 31 11:10:07 GMT 2025