mmeyepcmcia.c revision 1.5 1 1.5 thorpej /* $NetBSD: mmeyepcmcia.c,v 1.5 2002/10/02 05:39:05 thorpej Exp $ */
2 1.1 uch
3 1.1 uch /*
4 1.1 uch * Copyright (c) 1997 Marc Horowitz. All rights reserved.
5 1.1 uch *
6 1.1 uch * Redistribution and use in source and binary forms, with or without
7 1.1 uch * modification, are permitted provided that the following conditions
8 1.1 uch * are met:
9 1.1 uch * 1. Redistributions of source code must retain the above copyright
10 1.1 uch * notice, this list of conditions and the following disclaimer.
11 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 uch * notice, this list of conditions and the following disclaimer in the
13 1.1 uch * documentation and/or other materials provided with the distribution.
14 1.1 uch * 3. All advertising materials mentioning features or use of this software
15 1.1 uch * must display the following acknowledgement:
16 1.1 uch * This product includes software developed by Marc Horowitz.
17 1.1 uch * 4. The name of the author may not be used to endorse or promote products
18 1.1 uch * derived from this software without specific prior written permission.
19 1.1 uch *
20 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 uch * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 uch * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 uch * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 uch * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 uch * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 uch * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 uch * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 uch * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 uch * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.1 uch
32 1.1 uch /*
33 1.1 uch * PCMCIA I/F for MMEYE
34 1.1 uch *
35 1.1 uch * T.Horiuichi
36 1.1 uch * Brains Corp. 1998.8.25
37 1.1 uch */
38 1.1 uch
39 1.1 uch #include <sys/types.h>
40 1.1 uch #include <sys/param.h>
41 1.1 uch #include <sys/systm.h>
42 1.1 uch #include <sys/kernel.h>
43 1.1 uch #include <sys/proc.h>
44 1.1 uch #include <sys/device.h>
45 1.1 uch #include <sys/extent.h>
46 1.1 uch #include <sys/malloc.h>
47 1.1 uch #include <sys/kthread.h>
48 1.1 uch
49 1.1 uch #include <uvm/uvm_extern.h>
50 1.1 uch
51 1.1 uch #include <machine/autoconf.h>
52 1.1 uch #include <machine/bus.h>
53 1.1 uch #include <machine/intr.h>
54 1.1 uch #include <machine/mmeye.h>
55 1.1 uch
56 1.1 uch #include <dev/pcmcia/pcmciareg.h>
57 1.1 uch #include <dev/pcmcia/pcmciavar.h>
58 1.1 uch #include <dev/pcmcia/pcmciachip.h>
59 1.1 uch
60 1.1 uch #include <mmeye/dev/mmeyepcmciareg.h>
61 1.1 uch
62 1.1 uch #ifdef MMEYEPCMCIADEBUG
63 1.1 uch int mmeyepcmcia_debug = 1;
64 1.1 uch #define DPRINTF(arg) if (mmeyepcmcia_debug) printf arg;
65 1.1 uch #else
66 1.1 uch #define DPRINTF(arg)
67 1.1 uch #endif
68 1.1 uch
69 1.1 uch struct mmeyepcmcia_event {
70 1.1 uch SIMPLEQ_ENTRY(mmeyepcmcia_event) pe_q;
71 1.1 uch int pe_type;
72 1.1 uch };
73 1.1 uch
74 1.1 uch /* pe_type */
75 1.1 uch #define MMEYEPCMCIA_EVENT_INSERTION 0
76 1.1 uch #define MMEYEPCMCIA_EVENT_REMOVAL 1
77 1.1 uch
78 1.1 uch struct mmeyepcmcia_handle {
79 1.1 uch struct mmeyepcmcia_softc *sc;
80 1.1 uch int flags;
81 1.1 uch int laststate;
82 1.1 uch int memalloc;
83 1.1 uch struct {
84 1.1 uch bus_addr_t addr;
85 1.1 uch bus_size_t size;
86 1.1 uch long offset;
87 1.1 uch int kind;
88 1.1 uch } mem[MMEYEPCMCIA_MEM_WINS];
89 1.1 uch int ioalloc;
90 1.1 uch struct {
91 1.1 uch bus_addr_t addr;
92 1.1 uch bus_size_t size;
93 1.1 uch int width;
94 1.1 uch } io[MMEYEPCMCIA_IO_WINS];
95 1.1 uch int ih_irq;
96 1.1 uch struct device *pcmcia;
97 1.1 uch
98 1.1 uch int shutdown;
99 1.1 uch struct proc *event_thread;
100 1.1 uch SIMPLEQ_HEAD(, mmeyepcmcia_event) events;
101 1.1 uch };
102 1.1 uch
103 1.1 uch /* These four lines are MMTA specific */
104 1.1 uch #define MMEYEPCMCIA_IRQ1 10
105 1.1 uch #define MMEYEPCMCIA_IRQ2 9
106 1.1 uch #define MMEYEPCMCIA_SLOT1_ADDR 0xb8000000
107 1.1 uch #define MMEYEPCMCIA_SLOT2_ADDR 0xb9000000
108 1.1 uch
109 1.1 uch #define MMEYEPCMCIA_FLAG_SOCKETP 0x0001
110 1.1 uch #define MMEYEPCMCIA_FLAG_CARDP 0x0002
111 1.1 uch
112 1.1 uch #define MMEYEPCMCIA_LASTSTATE_PRESENT 0x0002
113 1.1 uch #define MMEYEPCMCIA_LASTSTATE_HALF 0x0001
114 1.1 uch #define MMEYEPCMCIA_LASTSTATE_EMPTY 0x0000
115 1.1 uch
116 1.1 uch /*
117 1.1 uch * This is sort of arbitrary. It merely needs to be "enough". It can be
118 1.1 uch * overridden in the conf file, anyway.
119 1.1 uch */
120 1.1 uch
121 1.1 uch #define MMEYEPCMCIA_MEM_PAGES 4
122 1.1 uch #define MMEYEPCMCIA_MEMSIZE MMEYEPCMCIA_MEM_PAGES*MMEYEPCMCIA_MEM_PAGESIZE
123 1.1 uch
124 1.1 uch #define MMEYEPCMCIA_NSLOTS 1
125 1.1 uch
126 1.1 uch #define MMEYEPCMCIA_WINS 5
127 1.1 uch #define MMEYEPCMCIA_IOWINS 2
128 1.1 uch
129 1.1 uch struct mmeyepcmcia_softc {
130 1.1 uch struct device dev;
131 1.1 uch
132 1.1 uch bus_space_tag_t memt;
133 1.1 uch bus_space_handle_t memh;
134 1.1 uch bus_space_tag_t iot;
135 1.1 uch bus_space_handle_t ioh;
136 1.1 uch
137 1.1 uch /* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
138 1.1 uch void *intr_est;
139 1.1 uch
140 1.1 uch pcmcia_chipset_tag_t pct;
141 1.1 uch
142 1.1 uch /* this needs to be large enough to hold PCIC_MEM_PAGES bits */
143 1.1 uch int subregionmask;
144 1.1 uch #define MMEYEPCMCIA_MAX_MEM_PAGES (8 * sizeof(int))
145 1.1 uch
146 1.1 uch /* used by memory window mapping functions */
147 1.1 uch bus_addr_t membase;
148 1.1 uch
149 1.1 uch /*
150 1.1 uch * used by io window mapping functions. These can actually overlap
151 1.1 uch * with another pcic, since the underlying extent mapper will deal
152 1.1 uch * with individual allocations. This is here to deal with the fact
153 1.1 uch * that different busses have different real widths (different pc
154 1.1 uch * hardware seems to use 10 or 12 bits for the I/O bus).
155 1.1 uch */
156 1.1 uch bus_addr_t iobase;
157 1.1 uch bus_addr_t iosize;
158 1.1 uch
159 1.1 uch int controller_irq;
160 1.1 uch int card_irq;
161 1.1 uch
162 1.1 uch void *ih;
163 1.1 uch
164 1.1 uch struct mmeyepcmcia_handle handle[MMEYEPCMCIA_NSLOTS];
165 1.1 uch };
166 1.1 uch
167 1.1 uch void mmeyepcmcia_attach_sockets(struct mmeyepcmcia_softc *);
168 1.1 uch int mmeyepcmcia_intr(void *arg);
169 1.1 uch
170 1.1 uch static inline int mmeyepcmcia_read(struct mmeyepcmcia_handle *, int);
171 1.1 uch static inline void mmeyepcmcia_write(struct mmeyepcmcia_handle *, int, int);
172 1.1 uch
173 1.1 uch int mmeyepcmcia_chip_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
174 1.1 uch struct pcmcia_mem_handle *);
175 1.1 uch void mmeyepcmcia_chip_mem_free(pcmcia_chipset_handle_t,
176 1.1 uch struct pcmcia_mem_handle *);
177 1.1 uch int mmeyepcmcia_chip_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t,
178 1.1 uch bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *);
179 1.1 uch void mmeyepcmcia_chip_mem_unmap(pcmcia_chipset_handle_t, int);
180 1.1 uch
181 1.1 uch int mmeyepcmcia_chip_io_alloc(pcmcia_chipset_handle_t, bus_addr_t,
182 1.1 uch bus_size_t, bus_size_t, struct pcmcia_io_handle *);
183 1.1 uch void mmeyepcmcia_chip_io_free(pcmcia_chipset_handle_t,
184 1.1 uch struct pcmcia_io_handle *);
185 1.1 uch int mmeyepcmcia_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
186 1.1 uch bus_size_t, struct pcmcia_io_handle *, int *);
187 1.1 uch void mmeyepcmcia_chip_io_unmap(pcmcia_chipset_handle_t, int);
188 1.1 uch
189 1.1 uch void mmeyepcmcia_chip_socket_enable(pcmcia_chipset_handle_t);
190 1.1 uch void mmeyepcmcia_chip_socket_disable(pcmcia_chipset_handle_t);
191 1.1 uch
192 1.1 uch static __inline int mmeyepcmcia_read(struct mmeyepcmcia_handle *, int);
193 1.1 uch static __inline int
194 1.1 uch mmeyepcmcia_read(struct mmeyepcmcia_handle *h, int idx)
195 1.1 uch {
196 1.1 uch static int prev_idx = 0;
197 1.1 uch
198 1.1 uch if (idx == -1){
199 1.1 uch idx = prev_idx;
200 1.1 uch }
201 1.1 uch prev_idx = idx;
202 1.1 uch return (bus_space_read_stream_2(h->sc->iot, h->sc->ioh, idx));
203 1.1 uch }
204 1.1 uch
205 1.1 uch static __inline void mmeyepcmcia_write(struct mmeyepcmcia_handle *, int, int);
206 1.1 uch static __inline void
207 1.1 uch mmeyepcmcia_write(struct mmeyepcmcia_handle *h, int idx, int data)
208 1.1 uch {
209 1.1 uch static int prev_idx;
210 1.1 uch if (idx == -1){
211 1.1 uch idx = prev_idx;
212 1.1 uch }
213 1.1 uch prev_idx = idx;
214 1.1 uch bus_space_write_stream_2(h->sc->iot, h->sc->ioh, idx, (data));
215 1.1 uch }
216 1.1 uch
217 1.1 uch void *mmeyepcmcia_chip_intr_establish(pcmcia_chipset_handle_t,
218 1.1 uch struct pcmcia_function *, int, int (*) (void *), void *);
219 1.1 uch void mmeyepcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
220 1.1 uch void *mmeyepcmcia_chip_intr_establish(pcmcia_chipset_handle_t,
221 1.1 uch struct pcmcia_function *, int, int (*) (void *), void *);
222 1.1 uch void mmeyepcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t,
223 1.1 uch void *);
224 1.1 uch
225 1.1 uch void mmeyepcmcia_attach_socket(struct mmeyepcmcia_handle *);
226 1.1 uch void mmeyepcmcia_init_socket(struct mmeyepcmcia_handle *);
227 1.1 uch int mmeyepcmcia_submatch(struct device *, struct cfdata *, void *);
228 1.1 uch int mmeyepcmcia_print (void *, const char *);
229 1.1 uch int mmeyepcmcia_intr_socket(struct mmeyepcmcia_handle *);
230 1.1 uch void mmeyepcmcia_attach_card(struct mmeyepcmcia_handle *);
231 1.1 uch void mmeyepcmcia_detach_card(struct mmeyepcmcia_handle *, int);
232 1.1 uch void mmeyepcmcia_deactivate_card(struct mmeyepcmcia_handle *);
233 1.1 uch void mmeyepcmcia_create_event_thread(void *);
234 1.1 uch void mmeyepcmcia_event_thread(void *);
235 1.1 uch void mmeyepcmcia_queue_event(struct mmeyepcmcia_handle *, int);
236 1.1 uch
237 1.1 uch int mmeyepcmcia_match(struct device *, struct cfdata *, void *);
238 1.1 uch void mmeyepcmcia_attach(struct device *, struct device *, void *);
239 1.1 uch
240 1.5 thorpej CFATTACH_DECL(mmeyepcmcia, sizeof(struct mmeyepcmcia_softc),
241 1.5 thorpej mmeyepcmcia_match, mmeyepcmcia_attach, NULL, NULL);
242 1.1 uch
243 1.1 uch static struct pcmcia_chip_functions mmeyepcmcia_functions = {
244 1.1 uch mmeyepcmcia_chip_mem_alloc,
245 1.1 uch mmeyepcmcia_chip_mem_free,
246 1.1 uch mmeyepcmcia_chip_mem_map,
247 1.1 uch mmeyepcmcia_chip_mem_unmap,
248 1.1 uch
249 1.1 uch mmeyepcmcia_chip_io_alloc,
250 1.1 uch mmeyepcmcia_chip_io_free,
251 1.1 uch mmeyepcmcia_chip_io_map,
252 1.1 uch mmeyepcmcia_chip_io_unmap,
253 1.1 uch
254 1.1 uch mmeyepcmcia_chip_intr_establish,
255 1.1 uch mmeyepcmcia_chip_intr_disestablish,
256 1.1 uch
257 1.1 uch mmeyepcmcia_chip_socket_enable,
258 1.1 uch mmeyepcmcia_chip_socket_disable,
259 1.1 uch };
260 1.1 uch
261 1.1 uch int
262 1.1 uch mmeyepcmcia_match(struct device *parent, struct cfdata *match, void *aux)
263 1.1 uch {
264 1.1 uch extern struct cfdriver mmeyepcmcia_cd;
265 1.1 uch struct mainbus_attach_args *ma = aux;
266 1.1 uch
267 1.1 uch if (strcmp(ma->ma_name, mmeyepcmcia_cd.cd_name) == 0)
268 1.1 uch return (1);
269 1.1 uch
270 1.1 uch return (0);
271 1.1 uch }
272 1.1 uch
273 1.1 uch void
274 1.1 uch mmeyepcmcia_attach(struct device *parent, struct device *self, void *aux)
275 1.1 uch {
276 1.1 uch struct mainbus_attach_args *ma = aux;
277 1.1 uch struct mmeyepcmcia_softc *sc = (void *)self;
278 1.1 uch
279 1.1 uch sc->subregionmask = 1; /* 1999.05.17 T.Horiuchi for R1.4 */
280 1.1 uch
281 1.1 uch sc->pct = (pcmcia_chipset_tag_t)&mmeyepcmcia_functions;
282 1.1 uch sc->iot = 0;
283 1.1 uch sc->ioh = ma->ma_addr1;
284 1.1 uch sc->memt = 0;
285 1.1 uch sc->memh = ma->ma_addr2;
286 1.1 uch sc->controller_irq = ma->ma_irq1;
287 1.1 uch sc->card_irq = ma->ma_irq2;
288 1.1 uch
289 1.1 uch printf(": using MMTA irq %d\n", sc->controller_irq);
290 1.1 uch
291 1.1 uch sc->handle[0].sc = sc;
292 1.1 uch sc->handle[0].flags = MMEYEPCMCIA_FLAG_SOCKETP;
293 1.1 uch sc->handle[0].laststate = MMEYEPCMCIA_LASTSTATE_EMPTY;
294 1.1 uch
295 1.1 uch SIMPLEQ_INIT(&sc->handle[0].events);
296 1.1 uch
297 1.1 uch mmeye_intr_establish(sc->controller_irq,
298 1.1 uch IST_LEVEL, IPL_TTY, mmeyepcmcia_intr, sc);
299 1.1 uch
300 1.1 uch mmeyepcmcia_attach_sockets(sc);
301 1.1 uch }
302 1.1 uch
303 1.1 uch void *
304 1.1 uch mmeyepcmcia_chip_intr_establish(pch, pf, ipl, fct, arg)
305 1.1 uch pcmcia_chipset_handle_t pch;
306 1.1 uch struct pcmcia_function *pf;
307 1.1 uch int ipl;
308 1.1 uch int (*fct)(void *);
309 1.1 uch void *arg;
310 1.1 uch {
311 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
312 1.1 uch int irq = h->sc->card_irq;
313 1.1 uch void *ih;
314 1.1 uch
315 1.1 uch ih = mmeye_intr_establish(irq, IST_LEVEL, ipl, fct, arg);
316 1.1 uch h->ih_irq = irq;
317 1.1 uch
318 1.1 uch printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq);
319 1.1 uch
320 1.1 uch return (ih);
321 1.1 uch }
322 1.1 uch
323 1.1 uch void
324 1.1 uch mmeyepcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
325 1.1 uch {
326 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
327 1.1 uch
328 1.1 uch h->ih_irq = 0;
329 1.1 uch mmeye_intr_disestablish(ih);
330 1.1 uch }
331 1.1 uch
332 1.1 uch
333 1.1 uch void
334 1.1 uch mmeyepcmcia_attach_sockets(struct mmeyepcmcia_softc *sc)
335 1.1 uch {
336 1.1 uch
337 1.1 uch mmeyepcmcia_attach_socket(&sc->handle[0]);
338 1.1 uch }
339 1.1 uch
340 1.1 uch void
341 1.1 uch mmeyepcmcia_attach_socket(struct mmeyepcmcia_handle *h)
342 1.1 uch {
343 1.1 uch struct pcmciabus_attach_args paa;
344 1.1 uch
345 1.1 uch /* initialize the rest of the handle */
346 1.1 uch
347 1.1 uch h->shutdown = 0;
348 1.1 uch h->memalloc = 0;
349 1.1 uch h->ioalloc = 0;
350 1.1 uch h->ih_irq = 0;
351 1.1 uch
352 1.1 uch /* now, config one pcmcia device per socket */
353 1.1 uch
354 1.1 uch paa.paa_busname = "pcmcia";
355 1.1 uch paa.pct = (pcmcia_chipset_tag_t) h->sc->pct;
356 1.1 uch paa.pch = (pcmcia_chipset_handle_t) h;
357 1.1 uch paa.iobase = h->sc->iobase;
358 1.1 uch paa.iosize = h->sc->iosize;
359 1.1 uch
360 1.1 uch h->pcmcia = config_found_sm(&h->sc->dev, &paa, mmeyepcmcia_print,
361 1.1 uch mmeyepcmcia_submatch);
362 1.1 uch
363 1.1 uch /* if there's actually a pcmcia device attached, initialize the slot */
364 1.1 uch
365 1.1 uch if (h->pcmcia)
366 1.1 uch mmeyepcmcia_init_socket(h);
367 1.1 uch }
368 1.1 uch
369 1.1 uch void
370 1.1 uch mmeyepcmcia_create_event_thread(void *arg)
371 1.1 uch {
372 1.1 uch struct mmeyepcmcia_handle *h = arg;
373 1.1 uch
374 1.1 uch if (kthread_create1(mmeyepcmcia_event_thread, h, &h->event_thread,
375 1.1 uch "%s", h->sc->dev.dv_xname)) {
376 1.1 uch printf("%s: unable to create event thread\n",
377 1.1 uch h->sc->dev.dv_xname);
378 1.1 uch panic("mmeyepcmcia_create_event_thread");
379 1.1 uch }
380 1.1 uch }
381 1.1 uch
382 1.1 uch void
383 1.1 uch mmeyepcmcia_event_thread(void *arg)
384 1.1 uch {
385 1.1 uch struct mmeyepcmcia_handle *h = arg;
386 1.1 uch struct mmeyepcmcia_event *pe;
387 1.1 uch int s;
388 1.1 uch
389 1.1 uch while (h->shutdown == 0) {
390 1.1 uch s = splhigh();
391 1.1 uch if ((pe = SIMPLEQ_FIRST(&h->events)) == NULL) {
392 1.1 uch splx(s);
393 1.1 uch (void) tsleep(&h->events, PWAIT, "mmeyepcmciaev", 0);
394 1.1 uch continue;
395 1.1 uch } else {
396 1.1 uch splx(s);
397 1.1 uch /* sleep .25s to be enqueued chatterling interrupts */
398 1.1 uch (void) tsleep((caddr_t)mmeyepcmcia_event_thread, PWAIT,
399 1.1 uch "mmeyepcmciass", hz/4);
400 1.1 uch }
401 1.1 uch s = splhigh();
402 1.2 lukem SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
403 1.1 uch splx(s);
404 1.1 uch
405 1.1 uch switch (pe->pe_type) {
406 1.1 uch case MMEYEPCMCIA_EVENT_INSERTION:
407 1.1 uch s = splhigh();
408 1.1 uch while (1) {
409 1.1 uch struct mmeyepcmcia_event *pe1, *pe2;
410 1.1 uch
411 1.1 uch if ((pe1 = SIMPLEQ_FIRST(&h->events)) == NULL)
412 1.1 uch break;
413 1.1 uch if (pe1->pe_type != MMEYEPCMCIA_EVENT_REMOVAL)
414 1.1 uch break;
415 1.1 uch if ((pe2 = SIMPLEQ_NEXT(pe1, pe_q)) == NULL)
416 1.1 uch break;
417 1.1 uch if (pe2->pe_type == MMEYEPCMCIA_EVENT_INSERTION) {
418 1.2 lukem SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
419 1.1 uch free(pe1, M_TEMP);
420 1.2 lukem SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
421 1.1 uch free(pe2, M_TEMP);
422 1.1 uch }
423 1.1 uch }
424 1.1 uch splx(s);
425 1.1 uch
426 1.1 uch DPRINTF(("%s: insertion event\n", h->sc->dev.dv_xname));
427 1.1 uch mmeyepcmcia_attach_card(h);
428 1.1 uch break;
429 1.1 uch
430 1.1 uch case MMEYEPCMCIA_EVENT_REMOVAL:
431 1.1 uch s = splhigh();
432 1.1 uch while (1) {
433 1.1 uch struct mmeyepcmcia_event *pe1, *pe2;
434 1.1 uch
435 1.1 uch if ((pe1 = SIMPLEQ_FIRST(&h->events)) == NULL)
436 1.1 uch break;
437 1.1 uch if (pe1->pe_type != MMEYEPCMCIA_EVENT_INSERTION)
438 1.1 uch break;
439 1.1 uch if ((pe2 = SIMPLEQ_NEXT(pe1, pe_q)) == NULL)
440 1.1 uch break;
441 1.1 uch if (pe2->pe_type == MMEYEPCMCIA_EVENT_REMOVAL) {
442 1.2 lukem SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
443 1.1 uch free(pe1, M_TEMP);
444 1.2 lukem SIMPLEQ_REMOVE_HEAD(&h->events, pe_q);
445 1.1 uch free(pe2, M_TEMP);
446 1.1 uch }
447 1.1 uch }
448 1.1 uch splx(s);
449 1.1 uch
450 1.1 uch DPRINTF(("%s: removal event\n", h->sc->dev.dv_xname));
451 1.1 uch mmeyepcmcia_detach_card(h, DETACH_FORCE);
452 1.1 uch break;
453 1.1 uch
454 1.1 uch default:
455 1.1 uch panic("mmeyepcmcia_event_thread: unknown event %d",
456 1.1 uch pe->pe_type);
457 1.1 uch }
458 1.1 uch free(pe, M_TEMP);
459 1.1 uch }
460 1.1 uch
461 1.1 uch h->event_thread = NULL;
462 1.1 uch
463 1.1 uch /* In case parent is waiting for us to exit. */
464 1.1 uch wakeup(h->sc);
465 1.1 uch
466 1.1 uch kthread_exit(0);
467 1.1 uch }
468 1.1 uch
469 1.1 uch void
470 1.1 uch mmeyepcmcia_init_socket(struct mmeyepcmcia_handle *h)
471 1.1 uch {
472 1.1 uch int reg;
473 1.1 uch
474 1.1 uch /*
475 1.1 uch * queue creation of a kernel thread to handle insert/removal events.
476 1.1 uch */
477 1.1 uch #ifdef DIAGNOSTIC
478 1.1 uch if (h->event_thread != NULL)
479 1.1 uch panic("mmeyepcmcia_attach_socket: event thread");
480 1.1 uch #endif
481 1.1 uch kthread_create(mmeyepcmcia_create_event_thread, h);
482 1.1 uch
483 1.1 uch /* if there's a card there, then attach it. */
484 1.1 uch
485 1.1 uch reg = mmeyepcmcia_read(h, MMEYEPCMCIA_IF_STATUS);
486 1.1 uch reg &= ~MMEYEPCMCIA_IF_STATUS_BUSWIDTH; /* Set bus width to 16bit */
487 1.1 uch
488 1.1 uch if ((reg & MMEYEPCMCIA_IF_STATUS_CARDDETECT_MASK) ==
489 1.1 uch MMEYEPCMCIA_IF_STATUS_CARDDETECT_PRESENT) {
490 1.1 uch int i;
491 1.1 uch
492 1.1 uch /* reset the card */
493 1.1 uch mmeyepcmcia_write(h, MMEYEPCMCIA_IF_STATUS, reg|MMEYEPCMCIA_IF_STATUS_RESET);
494 1.1 uch delay(1000); /* wait 1000 uSec */
495 1.1 uch mmeyepcmcia_write(h, MMEYEPCMCIA_IF_STATUS,
496 1.1 uch reg & ~MMEYEPCMCIA_IF_STATUS_RESET);
497 1.1 uch for (i = 0; i < 10000; i++)
498 1.1 uch delay(1000); /* wait 1 mSec */
499 1.1 uch
500 1.1 uch mmeyepcmcia_attach_card(h);
501 1.1 uch h->laststate = MMEYEPCMCIA_LASTSTATE_PRESENT;
502 1.1 uch } else {
503 1.1 uch h->laststate = MMEYEPCMCIA_LASTSTATE_EMPTY;
504 1.1 uch }
505 1.1 uch }
506 1.1 uch
507 1.1 uch int
508 1.1 uch mmeyepcmcia_submatch(struct device *parent, struct cfdata *cf, void *aux)
509 1.1 uch {
510 1.1 uch
511 1.3 thorpej return (config_match(parent, cf, aux));
512 1.1 uch }
513 1.1 uch
514 1.1 uch int
515 1.1 uch mmeyepcmcia_print(void *arg, const char *pnp)
516 1.1 uch {
517 1.1 uch
518 1.1 uch if (pnp)
519 1.1 uch printf("pcmcia at %s", pnp);
520 1.1 uch
521 1.1 uch return (UNCONF);
522 1.1 uch }
523 1.1 uch
524 1.1 uch int
525 1.1 uch mmeyepcmcia_intr(void *arg)
526 1.1 uch {
527 1.1 uch struct mmeyepcmcia_softc *sc = arg;
528 1.1 uch
529 1.1 uch DPRINTF(("%s: intr\n", sc->dev.dv_xname));
530 1.1 uch
531 1.1 uch mmeyepcmcia_intr_socket(&sc->handle[0]);
532 1.1 uch
533 1.1 uch return (0);
534 1.1 uch }
535 1.1 uch
536 1.1 uch int
537 1.1 uch mmeyepcmcia_intr_socket(struct mmeyepcmcia_handle *h)
538 1.1 uch {
539 1.1 uch int cscreg;
540 1.1 uch
541 1.1 uch cscreg = mmeyepcmcia_read(h, MMEYEPCMCIA_CSC);
542 1.1 uch
543 1.1 uch cscreg &= (MMEYEPCMCIA_CSC_GPI |
544 1.1 uch MMEYEPCMCIA_CSC_CD |
545 1.1 uch MMEYEPCMCIA_CSC_READY |
546 1.1 uch MMEYEPCMCIA_CSC_BATTWARN |
547 1.1 uch MMEYEPCMCIA_CSC_BATTDEAD);
548 1.1 uch
549 1.1 uch if (cscreg & MMEYEPCMCIA_CSC_GPI) {
550 1.1 uch DPRINTF(("%s: %02x GPI\n", h->sc->dev.dv_xname, h->sock));
551 1.1 uch }
552 1.1 uch if (cscreg & MMEYEPCMCIA_CSC_CD) {
553 1.1 uch int statreg;
554 1.1 uch
555 1.1 uch statreg = mmeyepcmcia_read(h, MMEYEPCMCIA_IF_STATUS);
556 1.1 uch
557 1.1 uch DPRINTF(("%s: %02x CD %x\n", h->sc->dev.dv_xname, h->sock,
558 1.1 uch statreg));
559 1.1 uch
560 1.1 uch if ((statreg & MMEYEPCMCIA_IF_STATUS_CARDDETECT_MASK) ==
561 1.1 uch MMEYEPCMCIA_IF_STATUS_CARDDETECT_PRESENT) {
562 1.1 uch if (h->laststate != MMEYEPCMCIA_LASTSTATE_PRESENT) {
563 1.1 uch DPRINTF(("%s: enqueing INSERTION event\n",
564 1.1 uch h->sc->dev.dv_xname));
565 1.1 uch mmeyepcmcia_queue_event(h, MMEYEPCMCIA_EVENT_INSERTION);
566 1.1 uch }
567 1.1 uch h->laststate = MMEYEPCMCIA_LASTSTATE_PRESENT;
568 1.1 uch } else {
569 1.1 uch if (h->laststate == MMEYEPCMCIA_LASTSTATE_PRESENT) {
570 1.1 uch /* Deactivate the card now. */
571 1.1 uch DPRINTF(("%s: deactivating card\n",
572 1.1 uch h->sc->dev.dv_xname));
573 1.1 uch mmeyepcmcia_deactivate_card(h);
574 1.1 uch
575 1.1 uch DPRINTF(("%s: enqueing REMOVAL event\n",
576 1.1 uch h->sc->dev.dv_xname));
577 1.1 uch mmeyepcmcia_queue_event(h, MMEYEPCMCIA_EVENT_REMOVAL);
578 1.1 uch }
579 1.1 uch h->laststate = ((statreg & MMEYEPCMCIA_IF_STATUS_CARDDETECT_MASK) == 0)
580 1.1 uch ? MMEYEPCMCIA_LASTSTATE_EMPTY : MMEYEPCMCIA_LASTSTATE_HALF;
581 1.1 uch }
582 1.1 uch }
583 1.1 uch if (cscreg & MMEYEPCMCIA_CSC_READY) {
584 1.1 uch DPRINTF(("%s: %02x READY\n", h->sc->dev.dv_xname, h->sock));
585 1.1 uch /* shouldn't happen */
586 1.1 uch }
587 1.1 uch if (cscreg & MMEYEPCMCIA_CSC_BATTWARN) {
588 1.1 uch DPRINTF(("%s: %02x BATTWARN\n", h->sc->dev.dv_xname, h->sock));
589 1.1 uch }
590 1.1 uch if (cscreg & MMEYEPCMCIA_CSC_BATTDEAD) {
591 1.1 uch DPRINTF(("%s: %02x BATTDEAD\n", h->sc->dev.dv_xname, h->sock));
592 1.1 uch }
593 1.1 uch return (cscreg ? 1 : 0);
594 1.1 uch }
595 1.1 uch
596 1.1 uch void
597 1.1 uch mmeyepcmcia_queue_event(struct mmeyepcmcia_handle *h, int event)
598 1.1 uch {
599 1.1 uch struct mmeyepcmcia_event *pe;
600 1.1 uch int s;
601 1.1 uch
602 1.1 uch pe = malloc(sizeof(*pe), M_TEMP, M_NOWAIT);
603 1.1 uch if (pe == NULL)
604 1.1 uch panic("mmeyepcmcia_queue_event: can't allocate event");
605 1.1 uch
606 1.1 uch pe->pe_type = event;
607 1.1 uch s = splhigh();
608 1.1 uch SIMPLEQ_INSERT_TAIL(&h->events, pe, pe_q);
609 1.1 uch splx(s);
610 1.1 uch wakeup(&h->events);
611 1.1 uch }
612 1.1 uch
613 1.1 uch void
614 1.1 uch mmeyepcmcia_attach_card(struct mmeyepcmcia_handle *h)
615 1.1 uch {
616 1.1 uch
617 1.1 uch if (!(h->flags & MMEYEPCMCIA_FLAG_CARDP)) {
618 1.1 uch /* call the MI attach function */
619 1.1 uch pcmcia_card_attach(h->pcmcia);
620 1.1 uch
621 1.1 uch h->flags |= MMEYEPCMCIA_FLAG_CARDP;
622 1.1 uch } else {
623 1.1 uch DPRINTF(("mmeyepcmcia_attach_card: already attached"));
624 1.1 uch }
625 1.1 uch }
626 1.1 uch
627 1.1 uch void
628 1.1 uch mmeyepcmcia_detach_card(struct mmeyepcmcia_handle *h, int flags)
629 1.1 uch {
630 1.1 uch
631 1.1 uch if (h->flags & MMEYEPCMCIA_FLAG_CARDP) {
632 1.1 uch h->flags &= ~MMEYEPCMCIA_FLAG_CARDP;
633 1.1 uch
634 1.1 uch /* call the MI detach function */
635 1.1 uch pcmcia_card_detach(h->pcmcia, flags);
636 1.1 uch } else {
637 1.1 uch DPRINTF(("mmeyepcmcia_detach_card: already detached"));
638 1.1 uch }
639 1.1 uch }
640 1.1 uch
641 1.1 uch void
642 1.1 uch mmeyepcmcia_deactivate_card(struct mmeyepcmcia_handle *h)
643 1.1 uch {
644 1.1 uch
645 1.1 uch /* call the MI deactivate function */
646 1.1 uch pcmcia_card_deactivate(h->pcmcia);
647 1.1 uch
648 1.1 uch /* Power down and reset XXX notyet */
649 1.1 uch }
650 1.1 uch
651 1.1 uch int
652 1.1 uch mmeyepcmcia_chip_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size,
653 1.1 uch struct pcmcia_mem_handle *pcmhp)
654 1.1 uch {
655 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
656 1.1 uch bus_space_handle_t memh = 0;
657 1.1 uch bus_addr_t addr;
658 1.1 uch bus_size_t sizepg;
659 1.1 uch int i, mask, mhandle;
660 1.1 uch
661 1.1 uch /* out of sc->memh, allocate as many pages as necessary */
662 1.1 uch #define MMEYEPCMCIA_MEM_ALIGN MMEYEPCMCIA_MEM_PAGESIZE
663 1.1 uch /* convert size to PCIC pages */
664 1.1 uch sizepg = (size + (MMEYEPCMCIA_MEM_ALIGN - 1)) / MMEYEPCMCIA_MEM_ALIGN;
665 1.1 uch if (sizepg > MMEYEPCMCIA_MAX_MEM_PAGES)
666 1.1 uch return (1);
667 1.1 uch
668 1.1 uch mask = (1 << sizepg) - 1;
669 1.1 uch
670 1.1 uch addr = 0; /* XXX gcc -Wuninitialized */
671 1.1 uch mhandle = 0; /* XXX gcc -Wuninitialized */
672 1.1 uch
673 1.1 uch for (i = 0; i <= MMEYEPCMCIA_MAX_MEM_PAGES - sizepg; i++) {
674 1.1 uch if ((h->sc->subregionmask & (mask << i)) == (mask << i)) {
675 1.1 uch #if 0
676 1.1 uch if (bus_space_subregion(h->sc->memt, h->sc->memh,
677 1.1 uch i * MMEYEPCMCIA_MEM_PAGESIZE,
678 1.1 uch sizepg * MMEYEPCMCIA_MEM_PAGESIZE, &memh))
679 1.1 uch return (1);
680 1.1 uch #endif
681 1.1 uch memh = h->sc->memh;
682 1.1 uch mhandle = mask << i;
683 1.1 uch addr = h->sc->membase + (i * MMEYEPCMCIA_MEM_PAGESIZE);
684 1.1 uch h->sc->subregionmask &= ~(mhandle);
685 1.1 uch pcmhp->memt = h->sc->memt;
686 1.1 uch pcmhp->memh = memh;
687 1.1 uch pcmhp->addr = addr;
688 1.1 uch pcmhp->size = size;
689 1.1 uch pcmhp->mhandle = mhandle;
690 1.1 uch pcmhp->realsize = sizepg * MMEYEPCMCIA_MEM_PAGESIZE;
691 1.1 uch return (0);
692 1.1 uch }
693 1.1 uch }
694 1.1 uch
695 1.1 uch return (1);
696 1.1 uch }
697 1.1 uch
698 1.1 uch void
699 1.1 uch mmeyepcmcia_chip_mem_free(pcmcia_chipset_handle_t pch,
700 1.1 uch struct pcmcia_mem_handle *pcmhp)
701 1.1 uch {
702 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
703 1.1 uch
704 1.1 uch h->sc->subregionmask |= pcmhp->mhandle;
705 1.1 uch }
706 1.1 uch
707 1.1 uch int
708 1.1 uch mmeyepcmcia_chip_mem_map(pcmcia_chipset_handle_t pch, int kind,
709 1.1 uch bus_addr_t card_addr, bus_size_t size, struct pcmcia_mem_handle *pcmhp,
710 1.1 uch bus_size_t *offsetp, int *windowp)
711 1.1 uch {
712 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
713 1.1 uch bus_addr_t busaddr;
714 1.1 uch long card_offset;
715 1.1 uch int i, win;
716 1.1 uch
717 1.1 uch win = -1;
718 1.1 uch for (i = 0; i < MMEYEPCMCIA_WINS;
719 1.1 uch i++) {
720 1.1 uch if ((h->memalloc & (1 << i)) == 0) {
721 1.1 uch win = i;
722 1.1 uch h->memalloc |= (1 << i);
723 1.1 uch break;
724 1.1 uch }
725 1.1 uch }
726 1.1 uch
727 1.1 uch if (win == -1)
728 1.1 uch return (1);
729 1.1 uch
730 1.1 uch *windowp = win;
731 1.1 uch
732 1.1 uch /* XXX this is pretty gross */
733 1.1 uch
734 1.1 uch if (h->sc->memt != pcmhp->memt)
735 1.1 uch panic("mmeyepcmcia_chip_mem_map memt is bogus");
736 1.1 uch
737 1.1 uch busaddr = pcmhp->addr;
738 1.1 uch
739 1.1 uch /*
740 1.1 uch * compute the address offset to the pcmcia address space for the
741 1.1 uch * pcic. this is intentionally signed. The masks and shifts below
742 1.1 uch * will cause TRT to happen in the pcic registers. Deal with making
743 1.1 uch * sure the address is aligned, and return the alignment offset.
744 1.1 uch */
745 1.1 uch
746 1.1 uch *offsetp = 0;
747 1.1 uch card_addr -= *offsetp;
748 1.1 uch
749 1.1 uch DPRINTF(("mmeyepcmcia_chip_mem_map window %d bus %lx+%lx+%lx at card addr "
750 1.1 uch "%lx\n", win, (u_long) busaddr, (u_long) * offsetp, (u_long) size,
751 1.1 uch (u_long) card_addr));
752 1.1 uch
753 1.1 uch /*
754 1.1 uch * include the offset in the size, and decrement size by one, since
755 1.1 uch * the hw wants start/stop
756 1.1 uch */
757 1.1 uch size += *offsetp - 1;
758 1.1 uch
759 1.1 uch card_offset = (((long) card_addr) - ((long) busaddr));
760 1.1 uch
761 1.1 uch h->mem[win].addr = busaddr;
762 1.1 uch h->mem[win].size = size;
763 1.1 uch h->mem[win].offset = card_offset;
764 1.1 uch h->mem[win].kind = kind;
765 1.1 uch
766 1.1 uch if (kind == PCMCIA_MEM_ATTR) {
767 1.1 uch pcmhp->memh = h->sc->memh + card_addr;
768 1.1 uch } else {
769 1.1 uch pcmhp->memh = h->sc->memh + card_addr + MMEYEPCMCIA_ATTRMEM_SIZE;
770 1.1 uch }
771 1.1 uch
772 1.1 uch return (0);
773 1.1 uch }
774 1.1 uch
775 1.1 uch void
776 1.1 uch mmeyepcmcia_chip_mem_unmap(pcmcia_chipset_handle_t pch, int window)
777 1.1 uch {
778 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
779 1.1 uch
780 1.1 uch if (window >= MMEYEPCMCIA_WINS)
781 1.1 uch panic("mmeyepcmcia_chip_mem_unmap: window out of range");
782 1.1 uch
783 1.1 uch h->memalloc &= ~(1 << window);
784 1.1 uch }
785 1.1 uch
786 1.1 uch int
787 1.1 uch mmeyepcmcia_chip_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start,
788 1.1 uch bus_size_t size, bus_size_t align, struct pcmcia_io_handle *pcihp)
789 1.1 uch {
790 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
791 1.1 uch bus_space_tag_t iot;
792 1.1 uch bus_space_handle_t ioh;
793 1.1 uch bus_addr_t ioaddr;
794 1.1 uch int flags = 0;
795 1.1 uch
796 1.1 uch /*
797 1.1 uch * Allocate some arbitrary I/O space.
798 1.1 uch */
799 1.1 uch
800 1.1 uch iot = h->sc->iot;
801 1.1 uch
802 1.1 uch if (start) {
803 1.1 uch ioaddr = start;
804 1.1 uch ioh = start;
805 1.1 uch DPRINTF(("mmeyepcmcia_chip_io_alloc map port %lx+%lx\n",
806 1.1 uch (u_long) ioaddr, (u_long) size));
807 1.1 uch } else {
808 1.1 uch flags |= PCMCIA_IO_ALLOCATED;
809 1.1 uch ioaddr = ioh = h->sc->iobase;
810 1.1 uch DPRINTF(("mmeyepcmcia_chip_io_alloc alloc port %lx+%lx\n",
811 1.1 uch (u_long) ioaddr, (u_long) size));
812 1.1 uch }
813 1.1 uch
814 1.1 uch pcihp->iot = iot;
815 1.1 uch pcihp->ioh = ioh + h->sc->memh + MMEYEPCMCIA_ATTRMEM_SIZE;
816 1.1 uch pcihp->addr = ioaddr;
817 1.1 uch pcihp->size = size;
818 1.1 uch pcihp->flags = flags;
819 1.1 uch
820 1.1 uch return (0);
821 1.1 uch }
822 1.1 uch
823 1.1 uch void
824 1.1 uch mmeyepcmcia_chip_io_free(pcmcia_chipset_handle_t pch,
825 1.1 uch struct pcmcia_io_handle *pcihp)
826 1.1 uch {
827 1.1 uch }
828 1.1 uch
829 1.1 uch int
830 1.1 uch mmeyepcmcia_chip_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset,
831 1.1 uch bus_size_t size, struct pcmcia_io_handle *pcihp, int *windowp)
832 1.1 uch {
833 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
834 1.1 uch bus_addr_t ioaddr = pcihp->addr + offset;
835 1.1 uch int i, win;
836 1.1 uch #ifdef MMEYEPCMCIADEBUG
837 1.1 uch static char *width_names[] = { "auto", "io8", "io16" };
838 1.1 uch #endif
839 1.1 uch int reg;
840 1.1 uch
841 1.1 uch /* I/O width is hardwired to 16bit mode on mmeye. */
842 1.1 uch width = PCMCIA_WIDTH_IO16;
843 1.1 uch
844 1.1 uch win = -1;
845 1.1 uch for (i = 0; i < MMEYEPCMCIA_IOWINS; i++) {
846 1.1 uch if ((h->ioalloc & (1 << i)) == 0) {
847 1.1 uch win = i;
848 1.1 uch h->ioalloc |= (1 << i);
849 1.1 uch break;
850 1.1 uch }
851 1.1 uch }
852 1.1 uch
853 1.1 uch if (win == -1)
854 1.1 uch return (1);
855 1.1 uch
856 1.1 uch *windowp = win;
857 1.1 uch
858 1.1 uch /* XXX this is pretty gross */
859 1.1 uch
860 1.1 uch if (h->sc->iot != pcihp->iot)
861 1.1 uch panic("mmeyepcmcia_chip_io_map iot is bogus");
862 1.1 uch
863 1.1 uch DPRINTF(("mmeyepcmcia_chip_io_map window %d %s port %lx+%lx\n",
864 1.1 uch win, width_names[width], (u_long) ioaddr, (u_long) size));
865 1.1 uch
866 1.1 uch /* XXX wtf is this doing here? */
867 1.1 uch
868 1.1 uch printf(" port 0x%lx", (u_long) ioaddr);
869 1.1 uch if (size > 1)
870 1.1 uch printf("-0x%lx", (u_long) ioaddr + (u_long) size - 1);
871 1.1 uch
872 1.1 uch h->io[win].addr = ioaddr;
873 1.1 uch h->io[win].size = size;
874 1.1 uch h->io[win].width = width;
875 1.1 uch
876 1.1 uch pcihp->ioh = h->sc->memh + MMEYEPCMCIA_ATTRMEM_SIZE;
877 1.1 uch
878 1.1 uch if (width == PCMCIA_WIDTH_IO8) { /* IO8 */
879 1.1 uch reg = mmeyepcmcia_read(h, MMEYEPCMCIA_IF_STATUS);
880 1.1 uch reg |= MMEYEPCMCIA_IF_STATUS_BUSWIDTH; /* Set bus width to 8bit */
881 1.1 uch mmeyepcmcia_write(h, MMEYEPCMCIA_IF_STATUS, reg);
882 1.1 uch }
883 1.1 uch
884 1.1 uch return (0);
885 1.1 uch }
886 1.1 uch
887 1.1 uch void
888 1.1 uch mmeyepcmcia_chip_io_unmap(pcmcia_chipset_handle_t pch, int window)
889 1.1 uch {
890 1.1 uch struct mmeyepcmcia_handle *h = (struct mmeyepcmcia_handle *) pch;
891 1.1 uch
892 1.1 uch if (window >= MMEYEPCMCIA_IOWINS)
893 1.1 uch panic("mmeyepcmcia_chip_io_unmap: window out of range");
894 1.1 uch
895 1.1 uch h->ioalloc &= ~(1 << window);
896 1.1 uch }
897 1.1 uch
898 1.1 uch void
899 1.1 uch mmeyepcmcia_chip_socket_enable(pcmcia_chipset_handle_t pch)
900 1.1 uch {
901 1.1 uch }
902 1.1 uch
903 1.1 uch void
904 1.1 uch mmeyepcmcia_chip_socket_disable(pcmcia_chipset_handle_t pch)
905 1.1 uch {
906 1.1 uch }
907