11.13Sryo/* $NetBSD: intr.h,v 1.13 2021/11/02 11:26:04 ryo Exp $ */ 21.5Such 31.5Such/*- 41.5Such * Copyright (c) 2002 The NetBSD Foundation, Inc. 51.5Such * All rights reserved. 61.5Such * 71.5Such * Redistribution and use in source and binary forms, with or without 81.5Such * modification, are permitted provided that the following conditions 91.5Such * are met: 101.5Such * 1. Redistributions of source code must retain the above copyright 111.5Such * notice, this list of conditions and the following disclaimer. 121.5Such * 2. Redistributions in binary form must reproduce the above copyright 131.5Such * notice, this list of conditions and the following disclaimer in the 141.5Such * documentation and/or other materials provided with the distribution. 151.5Such * 161.5Such * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 171.5Such * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 181.5Such * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 191.5Such * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 201.5Such * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 211.5Such * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 221.5Such * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 231.5Such * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 241.5Such * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 251.5Such * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 261.5Such * POSSIBILITY OF SUCH DAMAGE. 271.5Such */ 281.1Sitojun 291.2Smsaitoh#ifndef _MMEYE_INTR_H_ 301.2Smsaitoh#define _MMEYE_INTR_H_ 311.3Smsaitoh 321.1Sitojun#include <sh3/intr.h> 331.1Sitojun 341.5Such/* 351.5Such * Number of interrupt source 361.5Such * TMU0, TMU1, TMU2 371.5Such * MMEYE(com * 2 + mmeyepcmcia(controller + card) * 2) 381.11Skiyohara * SCIF * 4, SCI * 4 391.5Such */ 401.11Skiyohara#define _INTR_N 17 411.5Such 421.5Such/* Interrupt priority levels */ 431.9Sad#define IPL_VM 12 441.9Sad#define IPL_SCHED 14 /* clock */ 451.5Such#define IPL_HIGH 15 /* everything */ 461.5Such 471.7Sadtypedef uint8_t ipl_t; 481.6Syamttypedef struct { 491.6Syamt ipl_t _ipl; 501.6Syamt} ipl_cookie_t; 511.6Syamt 521.13Sryostatic __inline __always_inline ipl_cookie_t 531.6Syamtmakeiplcookie(ipl_t ipl) 541.6Syamt{ 551.6Syamt 561.6Syamt return (ipl_cookie_t){._ipl = ipl << 4}; 571.6Syamt} 581.6Syamt 591.13Sryostatic __inline __always_inline int 601.6Syamtsplraiseipl(ipl_cookie_t icookie) 611.6Syamt{ 621.6Syamt 631.6Syamt return _cpu_intr_raise(icookie._ipl); 641.6Syamt} 651.6Syamt 661.6Syamt#include <sys/spl.h> 671.1Sitojun 681.5Such#define spl0() _cpu_intr_resume(0) 691.5Such#define splx(x) _cpu_intr_resume(x) 701.2Smsaitoh 711.5Such#endif /* !_MMEYE_INTR_H_ */ 72