intr.h revision 1.12 
1/*	$NetBSD: intr.h,v 1.12 2018/04/19 21:50:06 christos Exp $	*/
2
3/*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef _MMEYE_INTR_H_
30#define _MMEYE_INTR_H_
31
32#include <sh3/intr.h>
33
34/*
35 * Number of interrupt source
36 * TMU0, TMU1, TMU2
37 * MMEYE(com * 2 + mmeyepcmcia(controller + card) * 2)
38 * SCIF * 4, SCI * 4
39 */
40#define _INTR_N		17
41
42/* Interrupt priority levels */
43#define	IPL_VM		12
44#define	IPL_SCHED	14	/* clock */
45#define	IPL_HIGH	15	/* everything */
46
47typedef uint8_t ipl_t;
48typedef struct {
49	ipl_t _ipl;
50} ipl_cookie_t;
51
52static __inline ipl_cookie_t
53makeiplcookie(ipl_t ipl)
54{
55
56	return (ipl_cookie_t){._ipl = ipl << 4};
57}
58
59static __inline int
60splraiseipl(ipl_cookie_t icookie)
61{
62
63	return _cpu_intr_raise(icookie._ipl);
64}
65
66#include <sys/spl.h>
67
68#define	spl0()			_cpu_intr_resume(0)
69#define	splx(x)			_cpu_intr_resume(x)
70
71#endif /* !_MMEYE_INTR_H_ */
72