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lpt_pccreg.h revision 1.2 
      1 /*	$NetBSD: lpt_pccreg.h,v 1.2 1999/02/14 17:54:28 scw Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Steve C. Woodford.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * MVME147 Parallel Port Register Definitions
     41  */
     42 
     43 /*
     44  * The mvme147's PCC chip has two status/control registers for the
     45  * printer port:
     46  *
     47  * sys_pcc->pr_int      Printer Interrupt Control Register
     48  *                0 - 2 Interrupt Level
     49  *                  3   Interrupt Enable
     50  *                  4   ACK Polarity. If set, falling edge of ACK generates
     51  *                      the interrupt. If clear, rising edge of ACK generates
     52  *                      the interrupt.
     53  *                  5   Indicates an ACK interrupt in progress. Cleared by
     54  *                      writing a one, or disabling lpt interrupts.
     55  *                  6   Indicates a FAULT interrupt. Set on falling edge
     56  *                      of printer's fault signal. Cleared by writing a one.
     57  *                  7   Printer Interrupt in progress. Basically just the
     58  *                      logical OR of bits 5 and 6.
     59  */
     60 #define	LPI_ENABLE	(1 << 3)
     61 #define	LPI_ACKPOL	(1 << 4)
     62 #define	LPI_ACKINT	(1 << 5)
     63 #define	LPI_FAULTINT	(1 << 6)
     64 #define	LPI_INTERRUPT	(1 << 7)
     65 
     66 /*
     67  * sys_pcc->pr_cr       Printer Control Register
     68  *                  0   Selects auto or manual strobe mode. When low, strobe
     69  *                      is automatically generated by a write to the printer
     70  *                      data register. When set, strobe must be generated
     71  *                      manually using bit 2 of this register.
     72  *                  1   Controls strobe timing in auto mode. When low, strobe
     73  *                      time is 6.4uS. When high, strobe time is 1.6uS.
     74  *                  2   Controls strobe in manual mode.
     75  *                  3   Control Input Prime signal. When set, Input Prime
     76  *                      is activated.
     77  *
     78  * Two other registers which are not addressed via the global PCC structure,
     79  * live at 0xfffe2800. This address is virtualised and passed to the driver
     80  * in the pcc_attach_args structure:
     81  */
     82 #define	LPC_STROBE_MODE	(1 << 0)
     83 #define	LPC_FAST_STROBE	(1 << 1)
     84 #define	LPC_STROBE	(1 << 2)
     85 #define	LPC_INPUT_PRIME	(1 << 3)
     86 
     87 /*
     88  * Union of data and status registers. Write to access the data register.
     89  * Read to access the status register.
     90  */
     91 union lpt_regs {
     92 	volatile u_char	pr_data;	/* Write only data register */
     93 	volatile u_char pr_status;	/* Read only status register */
     94 };
     95 
     96 /*
     97  * Access macros for the status register
     98  */
     99 #define	LPS_BUSY	(1 << 3)
    100 #define	LPS_PAPER_EMPTY	(1 << 4)
    101 #define	LPS_SELECT	(1 << 5)
    102 #define	LPS_FAULT	(1 << 6)
    103 #define	LPS_ACK		(1 << 7)
    104 
    105