memc_68k.c revision 1.3 1 1.3 thorpej /* $NetBSD: memc_68k.c,v 1.3 2002/10/02 05:28:14 thorpej Exp $ */
2 1.1 scw
3 1.1 scw /*-
4 1.1 scw * Copyright (c) 2000, 2002 The NetBSD Foundation, Inc.
5 1.1 scw * All rights reserved.
6 1.1 scw *
7 1.1 scw * This code is derived from software contributed to The NetBSD Foundation
8 1.1 scw * by Steve C. Woodford.
9 1.1 scw *
10 1.1 scw * Redistribution and use in source and binary forms, with or without
11 1.1 scw * modification, are permitted provided that the following conditions
12 1.1 scw * are met:
13 1.1 scw * 1. Redistributions of source code must retain the above copyright
14 1.1 scw * notice, this list of conditions and the following disclaimer.
15 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 scw * notice, this list of conditions and the following disclaimer in the
17 1.1 scw * documentation and/or other materials provided with the distribution.
18 1.1 scw * 3. All advertising materials mentioning features or use of this software
19 1.1 scw * must display the following acknowledgement:
20 1.1 scw * This product includes software developed by the NetBSD
21 1.1 scw * Foundation, Inc. and its contributors.
22 1.1 scw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 scw * contributors may be used to endorse or promote products derived
24 1.1 scw * from this software without specific prior written permission.
25 1.1 scw *
26 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 scw * POSSIBILITY OF SUCH DAMAGE.
37 1.1 scw */
38 1.1 scw
39 1.1 scw /*
40 1.1 scw * Support for the MEMECC and MEMC40 memory controllers on MVME68K
41 1.1 scw */
42 1.1 scw
43 1.1 scw #include <sys/param.h>
44 1.1 scw #include <sys/kernel.h>
45 1.1 scw #include <sys/systm.h>
46 1.1 scw #include <sys/device.h>
47 1.1 scw #include <sys/malloc.h>
48 1.1 scw
49 1.1 scw #include <machine/cpu.h>
50 1.1 scw #include <machine/bus.h>
51 1.1 scw
52 1.1 scw #include <mvme68k/dev/mainbus.h>
53 1.1 scw
54 1.1 scw #include <dev/mvme/memcvar.h>
55 1.1 scw #include <dev/mvme/memcreg.h>
56 1.1 scw #include <dev/mvme/pcctwovar.h>
57 1.1 scw #include <dev/mvme/pcctworeg.h>
58 1.1 scw
59 1.1 scw
60 1.1 scw int memc_match(struct device *, struct cfdata *, void *);
61 1.1 scw void memc_attach(struct device *, struct device *, void *);
62 1.1 scw
63 1.3 thorpej CFATTACH_DECL(memc, sizeof(struct memc_softc),
64 1.3 thorpej memc_match, memc_attach, NULL, NULL);
65 1.1 scw
66 1.1 scw extern struct cfdriver memc_cd;
67 1.1 scw
68 1.1 scw
69 1.1 scw /* ARGSUSED */
70 1.1 scw int
71 1.1 scw memc_match(parent, cf, aux)
72 1.1 scw struct device *parent;
73 1.1 scw struct cfdata *cf;
74 1.1 scw void *aux;
75 1.1 scw {
76 1.1 scw struct mainbus_attach_args *ma = aux;
77 1.1 scw bus_space_handle_t bh;
78 1.1 scw u_int8_t chipid;
79 1.1 scw int rv;
80 1.1 scw
81 1.1 scw #ifdef MVME68K
82 1.1 scw if (machineid != MVME_167 && machineid != MVME_177 &&
83 1.1 scw machineid != MVME_162 && machineid != MVME_172)
84 1.1 scw return (0);
85 1.1 scw #endif
86 1.1 scw
87 1.1 scw if (strcmp(ma->ma_name, memc_cd.cd_name))
88 1.1 scw return (0);
89 1.1 scw
90 1.1 scw if (bus_space_map(ma->ma_bust, ma->ma_offset, MEMC_REGSIZE, 0, &bh))
91 1.1 scw return (0);
92 1.1 scw
93 1.1 scw rv = bus_space_peek_1(ma->ma_bust, bh, MEMC_REG_CHIP_ID, &chipid);
94 1.1 scw bus_space_unmap(ma->ma_bust, bh, MEMC_REGSIZE);
95 1.1 scw
96 1.1 scw if (rv)
97 1.1 scw return (0);
98 1.1 scw
99 1.1 scw /* Verify the Chip Id register is sane */
100 1.1 scw if (chipid != MEMC_CHIP_ID_MEMC040 && chipid != MEMC_CHIP_ID_MEMECC)
101 1.1 scw return (0);
102 1.1 scw
103 1.1 scw return (1);
104 1.1 scw }
105 1.1 scw
106 1.1 scw /* ARGSUSED */
107 1.1 scw void
108 1.1 scw memc_attach(parent, self, aux)
109 1.1 scw struct device *parent;
110 1.1 scw struct device *self;
111 1.1 scw void *aux;
112 1.1 scw {
113 1.1 scw struct mainbus_attach_args *ma = aux;
114 1.1 scw struct memc_softc *sc = (struct memc_softc *) self;
115 1.1 scw
116 1.1 scw sc->sc_bust = ma->ma_bust;
117 1.1 scw
118 1.1 scw /* Map the memory controller's registers */
119 1.1 scw bus_space_map(sc->sc_bust, ma->ma_offset, MEMC_REGSIZE, 0,
120 1.1 scw &sc->sc_bush);
121 1.1 scw
122 1.1 scw /* Finish initialisation in common code */
123 1.1 scw memc_init(sc);
124 1.1 scw }
125