memc_68k.c revision 1.8 1 1.8 chs /* $NetBSD: memc_68k.c,v 1.8 2012/10/27 17:18:04 chs Exp $ */
2 1.1 scw
3 1.1 scw /*-
4 1.1 scw * Copyright (c) 2000, 2002 The NetBSD Foundation, Inc.
5 1.1 scw * All rights reserved.
6 1.1 scw *
7 1.1 scw * This code is derived from software contributed to The NetBSD Foundation
8 1.1 scw * by Steve C. Woodford.
9 1.1 scw *
10 1.1 scw * Redistribution and use in source and binary forms, with or without
11 1.1 scw * modification, are permitted provided that the following conditions
12 1.1 scw * are met:
13 1.1 scw * 1. Redistributions of source code must retain the above copyright
14 1.1 scw * notice, this list of conditions and the following disclaimer.
15 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 scw * notice, this list of conditions and the following disclaimer in the
17 1.1 scw * documentation and/or other materials provided with the distribution.
18 1.1 scw *
19 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 scw * POSSIBILITY OF SUCH DAMAGE.
30 1.1 scw */
31 1.1 scw
32 1.1 scw /*
33 1.1 scw * Support for the MEMECC and MEMC40 memory controllers on MVME68K
34 1.1 scw */
35 1.4 lukem
36 1.4 lukem #include <sys/cdefs.h>
37 1.8 chs __KERNEL_RCSID(0, "$NetBSD: memc_68k.c,v 1.8 2012/10/27 17:18:04 chs Exp $");
38 1.1 scw
39 1.1 scw #include <sys/param.h>
40 1.1 scw #include <sys/kernel.h>
41 1.1 scw #include <sys/systm.h>
42 1.1 scw #include <sys/device.h>
43 1.1 scw #include <sys/malloc.h>
44 1.1 scw
45 1.1 scw #include <machine/cpu.h>
46 1.1 scw #include <machine/bus.h>
47 1.1 scw
48 1.1 scw #include <mvme68k/dev/mainbus.h>
49 1.1 scw
50 1.1 scw #include <dev/mvme/memcvar.h>
51 1.1 scw #include <dev/mvme/memcreg.h>
52 1.1 scw #include <dev/mvme/pcctwovar.h>
53 1.1 scw #include <dev/mvme/pcctworeg.h>
54 1.1 scw
55 1.6 tsutsui #include "ioconf.h"
56 1.1 scw
57 1.8 chs int memc_match(device_t, cfdata_t, void *);
58 1.8 chs void memc_attach(device_t, device_t, void *);
59 1.1 scw
60 1.8 chs CFATTACH_DECL_NEW(memc, sizeof(struct memc_softc),
61 1.3 thorpej memc_match, memc_attach, NULL, NULL);
62 1.1 scw
63 1.1 scw
64 1.1 scw /* ARGSUSED */
65 1.1 scw int
66 1.8 chs memc_match(device_t parent, cfdata_t cf, void *aux)
67 1.1 scw {
68 1.1 scw struct mainbus_attach_args *ma = aux;
69 1.1 scw bus_space_handle_t bh;
70 1.6 tsutsui uint8_t chipid;
71 1.1 scw int rv;
72 1.1 scw
73 1.1 scw #ifdef MVME68K
74 1.1 scw if (machineid != MVME_167 && machineid != MVME_177 &&
75 1.1 scw machineid != MVME_162 && machineid != MVME_172)
76 1.6 tsutsui return 0;
77 1.1 scw #endif
78 1.1 scw
79 1.1 scw if (strcmp(ma->ma_name, memc_cd.cd_name))
80 1.6 tsutsui return 0;
81 1.1 scw
82 1.1 scw if (bus_space_map(ma->ma_bust, ma->ma_offset, MEMC_REGSIZE, 0, &bh))
83 1.6 tsutsui return 0;
84 1.1 scw
85 1.1 scw rv = bus_space_peek_1(ma->ma_bust, bh, MEMC_REG_CHIP_ID, &chipid);
86 1.1 scw bus_space_unmap(ma->ma_bust, bh, MEMC_REGSIZE);
87 1.1 scw
88 1.1 scw if (rv)
89 1.6 tsutsui return 0;
90 1.1 scw
91 1.1 scw /* Verify the Chip Id register is sane */
92 1.1 scw if (chipid != MEMC_CHIP_ID_MEMC040 && chipid != MEMC_CHIP_ID_MEMECC)
93 1.6 tsutsui return 0;
94 1.1 scw
95 1.6 tsutsui return 1;
96 1.1 scw }
97 1.1 scw
98 1.1 scw /* ARGSUSED */
99 1.1 scw void
100 1.8 chs memc_attach(device_t parent, device_t self, void *aux)
101 1.1 scw {
102 1.1 scw struct mainbus_attach_args *ma = aux;
103 1.8 chs struct memc_softc *sc = device_private(self);
104 1.1 scw
105 1.8 chs sc->sc_dev = self;
106 1.1 scw sc->sc_bust = ma->ma_bust;
107 1.1 scw
108 1.1 scw /* Map the memory controller's registers */
109 1.1 scw bus_space_map(sc->sc_bust, ma->ma_offset, MEMC_REGSIZE, 0,
110 1.1 scw &sc->sc_bush);
111 1.1 scw
112 1.1 scw /* Finish initialisation in common code */
113 1.1 scw memc_init(sc);
114 1.1 scw }
115