pcctwo_68k.c revision 1.10
1 /* $NetBSD: pcctwo_68k.c,v 1.10 2012/10/27 17:18:04 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * PCCchip2 and MCchip Mvme68k Front End Driver 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: pcctwo_68k.c,v 1.10 2012/10/27 17:18:04 chs Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/kernel.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 44 #include <machine/cpu.h> 45 #include <machine/bus.h> 46 47 #include <mvme68k/dev/mainbus.h> 48 #include <mvme68k/mvme68k/isr.h> 49 50 #include <dev/mvme/pcctworeg.h> 51 #include <dev/mvme/pcctwovar.h> 52 53 #include "ioconf.h" 54 55 /* 56 * Autoconfiguration stuff. 57 */ 58 void pcctwoattach(device_t, device_t, void *); 59 int pcctwomatch(device_t, cfdata_t, void *); 60 61 CFATTACH_DECL_NEW(pcctwo, sizeof(struct pcctwo_softc), 62 pcctwomatch, pcctwoattach, NULL, NULL); 63 64 65 #if defined(MVME167) || defined(MVME177) 66 /* 67 * Devices that live on the PCCchip2, attached in this order. 68 */ 69 static const struct pcctwo_device pcctwo_devices[] = { 70 {"clock", 0}, 71 {"clmpcc", PCCTWO_SCC_OFF}, 72 {"ie", PCCTWO_IE_OFF}, 73 {"osiop", PCCTWO_NCRSC_OFF}, 74 {"lpt", PCCTWO_LPT_OFF}, 75 {NULL, 0} 76 }; 77 78 static int pcctwo_vec2icsr_1x7[] = { 79 VEC2ICSR(PCC2REG_PRT_BUSY_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 80 VEC2ICSR(PCC2REG_PRT_PE_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 81 VEC2ICSR(PCC2REG_PRT_SEL_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 82 VEC2ICSR(PCC2REG_PRT_FAULT_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 83 VEC2ICSR(PCC2REG_PRT_ACK_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 84 VEC2ICSR(PCC2REG_SCSI_ICSR, 0), 85 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 86 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 87 VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), 88 VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), 89 VEC2ICSR(PCC2REG_GPIO_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 90 -1, 91 VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0), 92 VEC2ICSR(PCC2REG_SCC_MODEM_ICSR, 0), 93 VEC2ICSR(PCC2REG_SCC_TX_ICSR, 0), 94 VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0) 95 }; 96 #endif 97 98 #if defined(MVME162) || defined(MVME172) 99 /* 100 * Devices that live on the MCchip, attached in this order. 101 */ 102 static const struct pcctwo_device mcchip_devices[] = { 103 {"clock", 0}, 104 {"zsc", MCCHIP_ZS0_OFF}, 105 {"zsc", MCCHIP_ZS1_OFF}, 106 {"ie", PCCTWO_IE_OFF}, 107 {"osiop", PCCTWO_NCRSC_OFF}, 108 {NULL, 0} 109 }; 110 111 static int pcctwo_vec2icsr_1x2[] = { 112 -1, 113 -1, 114 -1, 115 VEC2ICSR(MCCHIPREG_TIMER4_ICSR, PCCTWO_ICR_ICLR), 116 VEC2ICSR(MCCHIPREG_TIMER3_ICSR, PCCTWO_ICR_ICLR), 117 VEC2ICSR(PCC2REG_SCSI_ICSR, 0), 118 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 119 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 120 VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), 121 VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), 122 -1, 123 VEC2ICSR(MCCHIPREG_PARERR_ICSR, PCCTWO_ICR_ICLR), 124 VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), 125 VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), 126 VEC2ICSR(MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR), 127 -1 128 }; 129 130 static int pcctwoabortintr(void *); 131 void pcctwosoftintrinit(void); 132 static int pcctwosoftintr(void *); 133 #ifdef notyet 134 static void pcctwosoftintrassert(void); 135 #endif 136 #endif 137 138 static void pcctwoisrlink(void *, int (*)(void *), void *, 139 int, int, struct evcnt *); 140 static void pcctwoisrunlink(void *, int); 141 static struct evcnt *pcctwoisrevcnt(void *, int); 142 143 144 /* ARGSUSED */ 145 int 146 pcctwomatch(device_t parent, cfdata_t cf, void *aux) 147 { 148 struct mainbus_attach_args *ma; 149 bus_space_handle_t bh; 150 uint8_t cid; 151 152 ma = aux; 153 154 /* There can be only one. */ 155 if (sys_pcctwo || strcmp(ma->ma_name, pcctwo_cd.cd_name)) 156 return 0; 157 158 /* 159 * Grab the Chip's ID 160 */ 161 bus_space_map(ma->ma_bust, PCCTWO_REG_OFF + ma->ma_offset, 162 PCC2REG_SIZE, 0, &bh); 163 cid = bus_space_read_1(ma->ma_bust, bh, PCC2REG_CHIP_ID); 164 bus_space_unmap(ma->ma_bust, bh, PCC2REG_SIZE); 165 166 #if defined(MVME167) || defined(MVME177) 167 if ((machineid == MVME_167 || machineid == MVME_177) && 168 cid == PCCTWO_CHIP_ID_PCC2) 169 return 1; 170 #endif 171 #if defined(MVME162) || defined(MVME172) 172 if ((machineid == MVME_162 || machineid == MVME_172) && 173 cid == PCCTWO_CHIP_ID_MCCHIP) 174 return 1; 175 #endif 176 177 return 0; 178 } 179 180 /* ARGSUSED */ 181 void 182 pcctwoattach(device_t parent, device_t self, void *aux) 183 { 184 struct mainbus_attach_args *ma; 185 struct pcctwo_softc *sc; 186 const struct pcctwo_device *pd = NULL; 187 uint8_t cid; 188 189 sc = sys_pcctwo = device_private(self); 190 ma = aux; 191 192 /* Get a handle to the PCCChip2's registers */ 193 sc->sc_bust = ma->ma_bust; 194 sc->sc_dmat = ma->ma_dmat; 195 bus_space_map(sc->sc_bust, PCCTWO_REG_OFF + ma->ma_offset, 196 PCC2REG_SIZE, 0, &sc->sc_bush); 197 198 sc->sc_vecbase = PCCTWO_VECBASE; 199 sc->sc_isrlink = pcctwoisrlink; 200 sc->sc_isrevcnt = pcctwoisrevcnt; 201 sc->sc_isrunlink = pcctwoisrunlink; 202 203 cid = pcc2_reg_read(sc, PCC2REG_CHIP_ID); 204 205 #if defined(MVME167) || defined(MVME177) 206 if (cid == PCCTWO_CHIP_ID_PCC2) { 207 pd = pcctwo_devices; 208 sc->sc_vec2icsr = pcctwo_vec2icsr_1x7; 209 } 210 #endif 211 #if defined(MVME162) || defined(MVME172) 212 if (cid == PCCTWO_CHIP_ID_MCCHIP) { 213 pd = mcchip_devices; 214 sc->sc_vec2icsr = pcctwo_vec2icsr_1x2; 215 } 216 #endif 217 218 /* Finish initialisation in common code */ 219 pcctwo_init(sc, pd, ma->ma_offset); 220 221 #if defined(MVME162) || defined(MVME172) 222 if (cid == PCCTWO_CHIP_ID_MCCHIP) { 223 evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR, 224 isrlink_evcnt(7), "nmi", "abort sw"); 225 pcctwointr_establish(MCCHIPV_ABORT, pcctwoabortintr, 7, NULL, 226 &sc->sc_evcnt); 227 } 228 #endif 229 } 230 231 /* ARGSUSED */ 232 static void 233 pcctwoisrlink(void *cookie, int (*fn)(void *), void *arg, int ipl, int vec, 234 struct evcnt *evcnt) 235 { 236 237 isrlink_vectored(fn, arg, ipl, vec, evcnt); 238 } 239 240 /* ARGSUSED */ 241 static void 242 pcctwoisrunlink(void *cookie, int vec) 243 { 244 245 isrunlink_vectored(vec); 246 } 247 248 /* ARGSUSED */ 249 static struct evcnt * 250 pcctwoisrevcnt(void *cookie, int ipl) 251 { 252 253 return isrlink_evcnt(ipl); 254 } 255 256 #if defined(MVME162) || defined(MVME172) 257 static int 258 pcctwoabortintr(void *frame) 259 { 260 261 pcc2_reg_write(sys_pcctwo, MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR | 262 pcc2_reg_read(sys_pcctwo, MCCHIPREG_ABORT_ICSR)); 263 264 return nmihand(frame); 265 } 266 267 void 268 pcctwosoftintrinit(void) 269 { 270 271 /* 272 * Since the VMEChip2 is normally used to generate 273 * software interrupts to the CPU, we have to deal 274 * with 162/172 boards which have the "No VMEChip2" 275 * build option. 276 * 277 * When such a board is found, the VMEChip2 probe code 278 * calls this function to implement software interrupts 279 * the hard way; using tick timer 4 ... 280 */ 281 pcctwointr_establish(MCCHIPV_TIMER4, pcctwosoftintr, 282 1, sys_pcctwo, &sys_pcctwo->sc_evcnt); 283 pcc2_reg_write(sys_pcctwo, MCCHIPREG_TIMER4_CTRL, 0); 284 pcc2_reg_write32(sys_pcctwo, MCCHIPREG_TIMER4_COMP, 1); 285 pcc2_reg_write32(sys_pcctwo, MCCHIPREG_TIMER4_CNTR, 0); 286 #ifdef notyet 287 _softintr_chipset_assert = pcctwosoftintrassert; 288 #endif 289 } 290 291 static int 292 pcctwosoftintr(void *arg) 293 { 294 struct pcctwo_softc *sc = arg; 295 296 pcc2_reg_write32(sc, MCCHIPREG_TIMER4_CNTR, 0); 297 pcc2_reg_write(sc, MCCHIPREG_TIMER4_CTRL, 0); 298 pcc2_reg_write(sc, MCCHIPREG_TIMER4_ICSR, 299 PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN | 1); 300 301 #ifdef notyet 302 softintr_dispatch(); 303 #endif 304 305 return 1; 306 } 307 308 #ifdef notyet 309 static void 310 pcctwosoftintrassert(void) 311 { 312 313 /* 314 * Schedule a timer interrupt to happen in ~1uS. 315 * This is more than adequate on any available m68k platform 316 * for simulating software interrupts. 317 */ 318 pcc2_reg_write(sys_pcctwo, MCCHIPREG_TIMER4_CTRL, PCCTWO_TT_CTRL_CEN); 319 } 320 #endif 321 #endif 322
Indexes created Mon Sep 29 21:09:56 GMT 2025