pcctwo_68k.c revision 1.5
1 /* $NetBSD: pcctwo_68k.c,v 1.5 2005/06/03 08:49:03 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * PCCchip2 and MCchip Mvme68k Front End Driver 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: pcctwo_68k.c,v 1.5 2005/06/03 08:49:03 scw Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/kernel.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 51 #include <machine/cpu.h> 52 #include <machine/bus.h> 53 54 #include <mvme68k/dev/mainbus.h> 55 #include <mvme68k/mvme68k/isr.h> 56 57 #include <dev/mvme/pcctworeg.h> 58 #include <dev/mvme/pcctwovar.h> 59 60 /* 61 * Autoconfiguration stuff. 62 */ 63 void pcctwoattach(struct device *, struct device *, void *); 64 int pcctwomatch(struct device *, struct cfdata *, void *); 65 66 CFATTACH_DECL(pcctwo, sizeof(struct pcctwo_softc), 67 pcctwomatch, pcctwoattach, NULL, NULL); 68 69 extern struct cfdriver pcctwo_cd; 70 71 72 #if defined(MVME167) || defined(MVME177) 73 /* 74 * Devices that live on the PCCchip2, attached in this order. 75 */ 76 static const struct pcctwo_device pcctwo_devices[] = { 77 {"clock", 0}, 78 {"clmpcc", PCCTWO_SCC_OFF}, 79 {"ie", PCCTWO_IE_OFF}, 80 {"osiop", PCCTWO_NCRSC_OFF}, 81 {"lpt", PCCTWO_LPT_OFF}, 82 {NULL, 0} 83 }; 84 85 static int pcctwo_vec2icsr_1x7[] = { 86 VEC2ICSR(PCC2REG_PRT_BUSY_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 87 VEC2ICSR(PCC2REG_PRT_PE_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 88 VEC2ICSR(PCC2REG_PRT_SEL_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 89 VEC2ICSR(PCC2REG_PRT_FAULT_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 90 VEC2ICSR(PCC2REG_PRT_ACK_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 91 VEC2ICSR(PCC2REG_SCSI_ICSR, 0), 92 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 93 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 94 VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), 95 VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), 96 VEC2ICSR(PCC2REG_GPIO_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 97 -1, 98 VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0), 99 VEC2ICSR(PCC2REG_SCC_MODEM_ICSR, 0), 100 VEC2ICSR(PCC2REG_SCC_TX_ICSR, 0), 101 VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0) 102 }; 103 #endif 104 105 #if defined(MVME162) || defined(MVME172) 106 /* 107 * Devices that live on the MCchip, attached in this order. 108 */ 109 static const struct pcctwo_device mcchip_devices[] = { 110 {"clock", 0}, 111 {"zsc", MCCHIP_ZS0_OFF}, 112 {"zsc", MCCHIP_ZS1_OFF}, 113 {"ie", PCCTWO_IE_OFF}, 114 {"osiop", PCCTWO_NCRSC_OFF}, 115 {NULL, 0} 116 }; 117 118 static int pcctwo_vec2icsr_1x2[] = { 119 -1, 120 -1, 121 -1, 122 VEC2ICSR(MCCHIPREG_TIMER4_ICSR, PCCTWO_ICR_ICLR), 123 VEC2ICSR(MCCHIPREG_TIMER3_ICSR, PCCTWO_ICR_ICLR), 124 VEC2ICSR(PCC2REG_SCSI_ICSR, 0), 125 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 126 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 127 VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), 128 VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), 129 -1, 130 VEC2ICSR(MCCHIPREG_PARERR_ICSR, PCCTWO_ICR_ICLR), 131 VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), 132 VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), 133 VEC2ICSR(MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR), 134 -1 135 }; 136 137 static int pcctwoabortintr(void *); 138 void pcctwosoftintrinit(void); 139 static int pcctwosoftintr(void *); 140 static void pcctwosoftintrassert(void); 141 #endif 142 143 static void pcctwoisrlink(void *, int (*)(void *), void *, 144 int, int, struct evcnt *); 145 static void pcctwoisrunlink(void *, int); 146 static struct evcnt *pcctwoisrevcnt(void *, int); 147 148 149 /* ARGSUSED */ 150 int 151 pcctwomatch(parent, cf, args) 152 struct device *parent; 153 struct cfdata *cf; 154 void *args; 155 { 156 struct mainbus_attach_args *ma; 157 bus_space_handle_t bh; 158 u_int8_t cid; 159 160 ma = args; 161 162 /* There can be only one. */ 163 if (sys_pcctwo || strcmp(ma->ma_name, pcctwo_cd.cd_name)) 164 return (0); 165 166 /* 167 * Grab the Chip's ID 168 */ 169 bus_space_map(ma->ma_bust, PCCTWO_REG_OFF + ma->ma_offset, 170 PCC2REG_SIZE, 0, &bh); 171 cid = bus_space_read_1(ma->ma_bust, bh, PCC2REG_CHIP_ID); 172 bus_space_unmap(ma->ma_bust, bh, PCC2REG_SIZE); 173 174 #if defined(MVME167) || defined(MVME177) 175 if ((machineid == MVME_167 || machineid == MVME_177) && 176 cid == PCCTWO_CHIP_ID_PCC2) 177 return (1); 178 #endif 179 #if defined(MVME162) || defined(MVME172) 180 if ((machineid == MVME_162 || machineid == MVME_172) && 181 cid == PCCTWO_CHIP_ID_MCCHIP) 182 return (1); 183 #endif 184 185 return (0); 186 } 187 188 /* ARGSUSED */ 189 void 190 pcctwoattach(parent, self, args) 191 struct device *parent; 192 struct device *self; 193 void *args; 194 { 195 struct mainbus_attach_args *ma; 196 struct pcctwo_softc *sc; 197 const struct pcctwo_device *pd = NULL; 198 u_int8_t cid; 199 200 ma = args; 201 sc = sys_pcctwo = (struct pcctwo_softc *) self; 202 203 /* Get a handle to the PCCChip2's registers */ 204 sc->sc_bust = ma->ma_bust; 205 sc->sc_dmat = ma->ma_dmat; 206 bus_space_map(sc->sc_bust, PCCTWO_REG_OFF + ma->ma_offset, 207 PCC2REG_SIZE, 0, &sc->sc_bush); 208 209 sc->sc_vecbase = PCCTWO_VECBASE; 210 sc->sc_isrlink = pcctwoisrlink; 211 sc->sc_isrevcnt = pcctwoisrevcnt; 212 sc->sc_isrunlink = pcctwoisrunlink; 213 214 cid = pcc2_reg_read(sc, PCC2REG_CHIP_ID); 215 216 #if defined(MVME167) || defined(MVME177) 217 if (cid == PCCTWO_CHIP_ID_PCC2) { 218 pd = pcctwo_devices; 219 sc->sc_vec2icsr = pcctwo_vec2icsr_1x7; 220 } 221 #endif 222 #if defined(MVME162) || defined(MVME172) 223 if (cid == PCCTWO_CHIP_ID_MCCHIP) { 224 pd = mcchip_devices; 225 sc->sc_vec2icsr = pcctwo_vec2icsr_1x2; 226 } 227 #endif 228 229 /* Finish initialisation in common code */ 230 pcctwo_init(sc, pd, ma->ma_offset); 231 232 #if defined(MVME162) || defined(MVME172) 233 if (cid == PCCTWO_CHIP_ID_MCCHIP) { 234 evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR, 235 isrlink_evcnt(7), "nmi", "abort sw"); 236 pcctwointr_establish(MCCHIPV_ABORT, pcctwoabortintr, 7, NULL, 237 &sc->sc_evcnt); 238 } 239 #endif 240 } 241 242 /* ARGSUSED */ 243 static void 244 pcctwoisrlink(cookie, fn, arg, ipl, vec, evcnt) 245 void *cookie; 246 int (*fn)(void *); 247 void *arg; 248 int ipl, vec; 249 struct evcnt *evcnt; 250 { 251 252 isrlink_vectored(fn, arg, ipl, vec, evcnt); 253 } 254 255 /* ARGSUSED */ 256 static void 257 pcctwoisrunlink(cookie, vec) 258 void *cookie; 259 int vec; 260 { 261 262 isrunlink_vectored(vec); 263 } 264 265 /* ARGSUSED */ 266 static struct evcnt * 267 pcctwoisrevcnt(cookie, ipl) 268 void *cookie; 269 int ipl; 270 { 271 272 return (isrlink_evcnt(ipl)); 273 } 274 275 #if defined(MVME162) || defined(MVME172) 276 static int 277 pcctwoabortintr(void *frame) 278 { 279 280 pcc2_reg_write(sys_pcctwo, MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR | 281 pcc2_reg_read(sys_pcctwo, MCCHIPREG_ABORT_ICSR)); 282 283 return (nmihand(frame)); 284 } 285 286 void 287 pcctwosoftintrinit(void) 288 { 289 290 /* 291 * Since the VMEChip2 is normally used to generate 292 * software interrupts to the CPU, we have to deal 293 * with 162/172 boards which have the "No VMEChip2" 294 * build option. 295 * 296 * When such a board is found, the VMEChip2 probe code 297 * calls this function to implement software interrupts 298 * the hard way; using tick timer 4 ... 299 */ 300 pcctwointr_establish(MCCHIPV_TIMER4, pcctwosoftintr, 301 1, sys_pcctwo, &sys_pcctwo->sc_evcnt); 302 pcc2_reg_write(sys_pcctwo, MCCHIPREG_TIMER4_CTRL, 0); 303 pcc2_reg_write32(sys_pcctwo, MCCHIPREG_TIMER4_COMP, 1); 304 pcc2_reg_write32(sys_pcctwo, MCCHIPREG_TIMER4_CNTR, 0); 305 _softintr_chipset_assert = pcctwosoftintrassert; 306 } 307 308 static int 309 pcctwosoftintr(void *arg) 310 { 311 struct pcctwo_softc *sc = arg; 312 313 pcc2_reg_write32(sc, MCCHIPREG_TIMER4_CNTR, 0); 314 pcc2_reg_write(sc, MCCHIPREG_TIMER4_CTRL, 0); 315 pcc2_reg_write(sc, MCCHIPREG_TIMER4_ICSR, 316 PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN | 1); 317 318 softintr_dispatch(); 319 320 return (1); 321 } 322 323 static void 324 pcctwosoftintrassert(void) 325 { 326 327 /* 328 * Schedule a timer interrupt to happen in ~1uS. 329 * This is more than adequate on any available m68k platform 330 * for simulating software interrupts. 331 */ 332 pcc2_reg_write(sys_pcctwo, MCCHIPREG_TIMER4_CTRL, PCCTWO_TT_CTRL_CEN); 333 } 334 #endif 335
Indexes created Mon Sep 29 21:09:56 GMT 2025