pcctwo_68k.c revision 1.8
1 /* $NetBSD: pcctwo_68k.c,v 1.8 2008/01/12 09:54:24 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * PCCchip2 and MCchip Mvme68k Front End Driver 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: pcctwo_68k.c,v 1.8 2008/01/12 09:54:24 tsutsui Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/kernel.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 51 #include <machine/cpu.h> 52 #include <machine/bus.h> 53 54 #include <mvme68k/dev/mainbus.h> 55 #include <mvme68k/mvme68k/isr.h> 56 57 #include <dev/mvme/pcctworeg.h> 58 #include <dev/mvme/pcctwovar.h> 59 60 #include "ioconf.h" 61 62 /* 63 * Autoconfiguration stuff. 64 */ 65 void pcctwoattach(struct device *, struct device *, void *); 66 int pcctwomatch(struct device *, struct cfdata *, void *); 67 68 CFATTACH_DECL(pcctwo, sizeof(struct pcctwo_softc), 69 pcctwomatch, pcctwoattach, NULL, NULL); 70 71 72 #if defined(MVME167) || defined(MVME177) 73 /* 74 * Devices that live on the PCCchip2, attached in this order. 75 */ 76 static const struct pcctwo_device pcctwo_devices[] = { 77 {"clock", 0}, 78 {"clmpcc", PCCTWO_SCC_OFF}, 79 {"ie", PCCTWO_IE_OFF}, 80 {"osiop", PCCTWO_NCRSC_OFF}, 81 {"lpt", PCCTWO_LPT_OFF}, 82 {NULL, 0} 83 }; 84 85 static int pcctwo_vec2icsr_1x7[] = { 86 VEC2ICSR(PCC2REG_PRT_BUSY_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 87 VEC2ICSR(PCC2REG_PRT_PE_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 88 VEC2ICSR(PCC2REG_PRT_SEL_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 89 VEC2ICSR(PCC2REG_PRT_FAULT_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 90 VEC2ICSR(PCC2REG_PRT_ACK_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 91 VEC2ICSR(PCC2REG_SCSI_ICSR, 0), 92 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 93 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 94 VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), 95 VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), 96 VEC2ICSR(PCC2REG_GPIO_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 97 -1, 98 VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0), 99 VEC2ICSR(PCC2REG_SCC_MODEM_ICSR, 0), 100 VEC2ICSR(PCC2REG_SCC_TX_ICSR, 0), 101 VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0) 102 }; 103 #endif 104 105 #if defined(MVME162) || defined(MVME172) 106 /* 107 * Devices that live on the MCchip, attached in this order. 108 */ 109 static const struct pcctwo_device mcchip_devices[] = { 110 {"clock", 0}, 111 {"zsc", MCCHIP_ZS0_OFF}, 112 {"zsc", MCCHIP_ZS1_OFF}, 113 {"ie", PCCTWO_IE_OFF}, 114 {"osiop", PCCTWO_NCRSC_OFF}, 115 {NULL, 0} 116 }; 117 118 static int pcctwo_vec2icsr_1x2[] = { 119 -1, 120 -1, 121 -1, 122 VEC2ICSR(MCCHIPREG_TIMER4_ICSR, PCCTWO_ICR_ICLR), 123 VEC2ICSR(MCCHIPREG_TIMER3_ICSR, PCCTWO_ICR_ICLR), 124 VEC2ICSR(PCC2REG_SCSI_ICSR, 0), 125 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 126 VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), 127 VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), 128 VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), 129 -1, 130 VEC2ICSR(MCCHIPREG_PARERR_ICSR, PCCTWO_ICR_ICLR), 131 VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), 132 VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), 133 VEC2ICSR(MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR), 134 -1 135 }; 136 137 static int pcctwoabortintr(void *); 138 void pcctwosoftintrinit(void); 139 static int pcctwosoftintr(void *); 140 #ifdef notyet 141 static void pcctwosoftintrassert(void); 142 #endif 143 #endif 144 145 static void pcctwoisrlink(void *, int (*)(void *), void *, 146 int, int, struct evcnt *); 147 static void pcctwoisrunlink(void *, int); 148 static struct evcnt *pcctwoisrevcnt(void *, int); 149 150 151 /* ARGSUSED */ 152 int 153 pcctwomatch(struct device *parent, struct cfdata *cf, void *args) 154 { 155 struct mainbus_attach_args *ma; 156 bus_space_handle_t bh; 157 uint8_t cid; 158 159 ma = args; 160 161 /* There can be only one. */ 162 if (sys_pcctwo || strcmp(ma->ma_name, pcctwo_cd.cd_name)) 163 return 0; 164 165 /* 166 * Grab the Chip's ID 167 */ 168 bus_space_map(ma->ma_bust, PCCTWO_REG_OFF + ma->ma_offset, 169 PCC2REG_SIZE, 0, &bh); 170 cid = bus_space_read_1(ma->ma_bust, bh, PCC2REG_CHIP_ID); 171 bus_space_unmap(ma->ma_bust, bh, PCC2REG_SIZE); 172 173 #if defined(MVME167) || defined(MVME177) 174 if ((machineid == MVME_167 || machineid == MVME_177) && 175 cid == PCCTWO_CHIP_ID_PCC2) 176 return 1; 177 #endif 178 #if defined(MVME162) || defined(MVME172) 179 if ((machineid == MVME_162 || machineid == MVME_172) && 180 cid == PCCTWO_CHIP_ID_MCCHIP) 181 return 1; 182 #endif 183 184 return 0; 185 } 186 187 /* ARGSUSED */ 188 void 189 pcctwoattach(struct device *parent, struct device *self, void *args) 190 { 191 struct mainbus_attach_args *ma; 192 struct pcctwo_softc *sc; 193 const struct pcctwo_device *pd = NULL; 194 uint8_t cid; 195 196 ma = args; 197 sc = sys_pcctwo = (struct pcctwo_softc *)self; 198 199 /* Get a handle to the PCCChip2's registers */ 200 sc->sc_bust = ma->ma_bust; 201 sc->sc_dmat = ma->ma_dmat; 202 bus_space_map(sc->sc_bust, PCCTWO_REG_OFF + ma->ma_offset, 203 PCC2REG_SIZE, 0, &sc->sc_bush); 204 205 sc->sc_vecbase = PCCTWO_VECBASE; 206 sc->sc_isrlink = pcctwoisrlink; 207 sc->sc_isrevcnt = pcctwoisrevcnt; 208 sc->sc_isrunlink = pcctwoisrunlink; 209 210 cid = pcc2_reg_read(sc, PCC2REG_CHIP_ID); 211 212 #if defined(MVME167) || defined(MVME177) 213 if (cid == PCCTWO_CHIP_ID_PCC2) { 214 pd = pcctwo_devices; 215 sc->sc_vec2icsr = pcctwo_vec2icsr_1x7; 216 } 217 #endif 218 #if defined(MVME162) || defined(MVME172) 219 if (cid == PCCTWO_CHIP_ID_MCCHIP) { 220 pd = mcchip_devices; 221 sc->sc_vec2icsr = pcctwo_vec2icsr_1x2; 222 } 223 #endif 224 225 /* Finish initialisation in common code */ 226 pcctwo_init(sc, pd, ma->ma_offset); 227 228 #if defined(MVME162) || defined(MVME172) 229 if (cid == PCCTWO_CHIP_ID_MCCHIP) { 230 evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR, 231 isrlink_evcnt(7), "nmi", "abort sw"); 232 pcctwointr_establish(MCCHIPV_ABORT, pcctwoabortintr, 7, NULL, 233 &sc->sc_evcnt); 234 } 235 #endif 236 } 237 238 /* ARGSUSED */ 239 static void 240 pcctwoisrlink(void *cookie, int (*fn)(void *), void *arg, int ipl, int vec, 241 struct evcnt *evcnt) 242 { 243 244 isrlink_vectored(fn, arg, ipl, vec, evcnt); 245 } 246 247 /* ARGSUSED */ 248 static void 249 pcctwoisrunlink(void *cookie, int vec) 250 { 251 252 isrunlink_vectored(vec); 253 } 254 255 /* ARGSUSED */ 256 static struct evcnt * 257 pcctwoisrevcnt(void *cookie, int ipl) 258 { 259 260 return isrlink_evcnt(ipl); 261 } 262 263 #if defined(MVME162) || defined(MVME172) 264 static int 265 pcctwoabortintr(void *frame) 266 { 267 268 pcc2_reg_write(sys_pcctwo, MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR | 269 pcc2_reg_read(sys_pcctwo, MCCHIPREG_ABORT_ICSR)); 270 271 return nmihand(frame); 272 } 273 274 void 275 pcctwosoftintrinit(void) 276 { 277 278 /* 279 * Since the VMEChip2 is normally used to generate 280 * software interrupts to the CPU, we have to deal 281 * with 162/172 boards which have the "No VMEChip2" 282 * build option. 283 * 284 * When such a board is found, the VMEChip2 probe code 285 * calls this function to implement software interrupts 286 * the hard way; using tick timer 4 ... 287 */ 288 pcctwointr_establish(MCCHIPV_TIMER4, pcctwosoftintr, 289 1, sys_pcctwo, &sys_pcctwo->sc_evcnt); 290 pcc2_reg_write(sys_pcctwo, MCCHIPREG_TIMER4_CTRL, 0); 291 pcc2_reg_write32(sys_pcctwo, MCCHIPREG_TIMER4_COMP, 1); 292 pcc2_reg_write32(sys_pcctwo, MCCHIPREG_TIMER4_CNTR, 0); 293 #ifdef notyet 294 _softintr_chipset_assert = pcctwosoftintrassert; 295 #endif 296 } 297 298 static int 299 pcctwosoftintr(void *arg) 300 { 301 struct pcctwo_softc *sc = arg; 302 303 pcc2_reg_write32(sc, MCCHIPREG_TIMER4_CNTR, 0); 304 pcc2_reg_write(sc, MCCHIPREG_TIMER4_CTRL, 0); 305 pcc2_reg_write(sc, MCCHIPREG_TIMER4_ICSR, 306 PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN | 1); 307 308 #ifdef notyet 309 softintr_dispatch(); 310 #endif 311 312 return 1; 313 } 314 315 #ifdef notyet 316 static void 317 pcctwosoftintrassert(void) 318 { 319 320 /* 321 * Schedule a timer interrupt to happen in ~1uS. 322 * This is more than adequate on any available m68k platform 323 * for simulating software interrupts. 324 */ 325 pcc2_reg_write(sys_pcctwo, MCCHIPREG_TIMER4_CTRL, PCCTWO_TT_CTRL_CEN); 326 } 327 #endif 328 #endif 329
Indexes created Mon Sep 29 03:10:08 GMT 2025