wdsc.c revision 1.30 1 1.30 tsutsui /* $NetBSD: wdsc.c,v 1.30 2008/01/12 09:54:27 tsutsui Exp $ */
2 1.1 chuck
3 1.1 chuck /*
4 1.1 chuck * Copyright (c) 1982, 1990 The Regents of the University of California.
5 1.1 chuck * All rights reserved.
6 1.1 chuck *
7 1.1 chuck * Redistribution and use in source and binary forms, with or without
8 1.1 chuck * modification, are permitted provided that the following conditions
9 1.1 chuck * are met:
10 1.1 chuck * 1. Redistributions of source code must retain the above copyright
11 1.1 chuck * notice, this list of conditions and the following disclaimer.
12 1.1 chuck * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 chuck * notice, this list of conditions and the following disclaimer in the
14 1.1 chuck * documentation and/or other materials provided with the distribution.
15 1.27 agc * 3. Neither the name of the University nor the names of its contributors
16 1.27 agc * may be used to endorse or promote products derived from this software
17 1.27 agc * without specific prior written permission.
18 1.27 agc *
19 1.27 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 1.27 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 1.27 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 1.27 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 1.27 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 1.27 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 1.27 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.27 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.27 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.27 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.27 agc * SUCH DAMAGE.
30 1.27 agc *
31 1.27 agc * @(#)wdsc.c
32 1.27 agc */
33 1.27 agc
34 1.28 scw /*-
35 1.28 scw * Copyright (c) 1996-2004 The NetBSD Foundation, Inc.
36 1.28 scw * All rights reserved.
37 1.28 scw *
38 1.28 scw * This code is derived from software contributed to The NetBSD Foundation
39 1.28 scw * by Steve C. Woodford.
40 1.27 agc *
41 1.27 agc * Redistribution and use in source and binary forms, with or without
42 1.27 agc * modification, are permitted provided that the following conditions
43 1.27 agc * are met:
44 1.27 agc * 1. Redistributions of source code must retain the above copyright
45 1.27 agc * notice, this list of conditions and the following disclaimer.
46 1.27 agc * 2. Redistributions in binary form must reproduce the above copyright
47 1.27 agc * notice, this list of conditions and the following disclaimer in the
48 1.27 agc * documentation and/or other materials provided with the distribution.
49 1.1 chuck * 3. All advertising materials mentioning features or use of this software
50 1.1 chuck * must display the following acknowledgement:
51 1.28 scw * This product includes software developed by the NetBSD
52 1.28 scw * Foundation, Inc. and its contributors.
53 1.28 scw * 4. Neither the name of The NetBSD Foundation nor the names of its
54 1.28 scw * contributors may be used to endorse or promote products derived
55 1.28 scw * from this software without specific prior written permission.
56 1.1 chuck *
57 1.28 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
58 1.28 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 1.28 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 1.28 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
61 1.28 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 1.28 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 1.28 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 1.28 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 1.28 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 1.28 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 1.28 scw * POSSIBILITY OF SUCH DAMAGE.
68 1.1 chuck */
69 1.26 lukem
70 1.26 lukem #include <sys/cdefs.h>
71 1.30 tsutsui __KERNEL_RCSID(0, "$NetBSD: wdsc.c,v 1.30 2008/01/12 09:54:27 tsutsui Exp $");
72 1.2 chuck
73 1.1 chuck #include <sys/param.h>
74 1.1 chuck #include <sys/systm.h>
75 1.1 chuck #include <sys/kernel.h>
76 1.1 chuck #include <sys/device.h>
77 1.2 chuck
78 1.10 bouyer #include <dev/scsipi/scsi_all.h>
79 1.10 bouyer #include <dev/scsipi/scsipi_all.h>
80 1.10 bouyer #include <dev/scsipi/scsiconf.h>
81 1.2 chuck
82 1.16 scw #include <machine/cpu.h>
83 1.17 scw #include <machine/bus.h>
84 1.3 chuck #include <machine/autoconf.h>
85 1.3 chuck
86 1.2 chuck #include <mvme68k/dev/dmavar.h>
87 1.1 chuck #include <mvme68k/dev/pccreg.h>
88 1.2 chuck #include <mvme68k/dev/pccvar.h>
89 1.1 chuck #include <mvme68k/dev/sbicreg.h>
90 1.1 chuck #include <mvme68k/dev/sbicvar.h>
91 1.1 chuck #include <mvme68k/dev/wdscreg.h>
92 1.1 chuck
93 1.30 tsutsui #include "ioconf.h"
94 1.30 tsutsui
95 1.30 tsutsui void wdsc_pcc_attach(struct device *, struct device *, void *);
96 1.30 tsutsui int wdsc_pcc_match(struct device *, struct cfdata *, void *);
97 1.1 chuck
98 1.23 thorpej CFATTACH_DECL(wdsc_pcc, sizeof(struct sbic_softc),
99 1.23 thorpej wdsc_pcc_match, wdsc_pcc_attach, NULL, NULL);
100 1.17 scw
101 1.30 tsutsui void wdsc_enintr(struct sbic_softc *);
102 1.30 tsutsui int wdsc_dmago(struct sbic_softc *, char *, int, int);
103 1.30 tsutsui int wdsc_dmanext(struct sbic_softc *);
104 1.30 tsutsui void wdsc_dmastop(struct sbic_softc *);
105 1.30 tsutsui int wdsc_dmaintr(void *);
106 1.30 tsutsui int wdsc_scsiintr(void *);
107 1.1 chuck
108 1.1 chuck /*
109 1.1 chuck * Match for SCSI devices on the onboard WD33C93 chip
110 1.1 chuck */
111 1.1 chuck int
112 1.30 tsutsui wdsc_pcc_match(struct device *pdp, struct cfdata *cf, void *auxp)
113 1.1 chuck {
114 1.30 tsutsui struct pcc_attach_args *pa = auxp;
115 1.2 chuck
116 1.30 tsutsui if (strcmp(pa->pa_name, wdsc_cd.cd_name))
117 1.30 tsutsui return 0;
118 1.2 chuck
119 1.30 tsutsui pa->pa_ipl = cf->pcccf_ipl;
120 1.30 tsutsui return 1;
121 1.1 chuck }
122 1.1 chuck
123 1.1 chuck /*
124 1.1 chuck * Attach the wdsc driver
125 1.1 chuck */
126 1.1 chuck void
127 1.30 tsutsui wdsc_pcc_attach(struct device *pdp, struct device *dp, void *auxp)
128 1.1 chuck {
129 1.30 tsutsui struct sbic_softc *sc;
130 1.30 tsutsui struct pcc_attach_args *pa;
131 1.30 tsutsui bus_space_handle_t bush;
132 1.30 tsutsui static struct evcnt evcnt; /* XXXSCW: Temporary hack */
133 1.30 tsutsui
134 1.30 tsutsui sc = (struct sbic_softc *)dp;
135 1.30 tsutsui pa = auxp;
136 1.30 tsutsui
137 1.30 tsutsui bus_space_map(pa->pa_bust, pa->pa_offset, 0x20, 0, &bush);
138 1.30 tsutsui
139 1.30 tsutsui /*
140 1.30 tsutsui * XXXSCW: We *need* an MI, bus_spaced WD33C93 driver...
141 1.30 tsutsui */
142 1.30 tsutsui sc->sc_sbicp = (sbic_regmap_p) bush;
143 1.30 tsutsui
144 1.30 tsutsui sc->sc_driver = (void *) &evcnt;
145 1.30 tsutsui sc->sc_enintr = wdsc_enintr;
146 1.30 tsutsui sc->sc_dmago = wdsc_dmago;
147 1.30 tsutsui sc->sc_dmanext = wdsc_dmanext;
148 1.30 tsutsui sc->sc_dmastop = wdsc_dmastop;
149 1.30 tsutsui sc->sc_dmacmd = 0;
150 1.30 tsutsui
151 1.30 tsutsui sc->sc_adapter.adapt_dev = &sc->sc_dev;
152 1.30 tsutsui sc->sc_adapter.adapt_nchannels = 1;
153 1.30 tsutsui sc->sc_adapter.adapt_openings = 7;
154 1.30 tsutsui sc->sc_adapter.adapt_max_periph = 1;
155 1.30 tsutsui sc->sc_adapter.adapt_ioctl = NULL;
156 1.30 tsutsui sc->sc_adapter.adapt_minphys = sbic_minphys;
157 1.30 tsutsui sc->sc_adapter.adapt_request = sbic_scsi_request;
158 1.30 tsutsui
159 1.30 tsutsui sc->sc_channel.chan_adapter = &sc->sc_adapter;
160 1.30 tsutsui sc->sc_channel.chan_bustype = &scsi_bustype;
161 1.30 tsutsui sc->sc_channel.chan_channel = 0;
162 1.30 tsutsui sc->sc_channel.chan_ntargets = 8;
163 1.30 tsutsui sc->sc_channel.chan_nluns = 8;
164 1.30 tsutsui sc->sc_channel.chan_id = 7;
165 1.30 tsutsui
166 1.30 tsutsui printf(": WD33C93 SCSI, target %d\n", sc->sc_channel.chan_id);
167 1.30 tsutsui
168 1.30 tsutsui /*
169 1.30 tsutsui * Everything is a valid DMA address.
170 1.30 tsutsui */
171 1.30 tsutsui sc->sc_dmamask = 0;
172 1.30 tsutsui
173 1.30 tsutsui /*
174 1.30 tsutsui * The onboard WD33C93 of the '147 is usually clocked at 10MHz...
175 1.30 tsutsui * (We use 10 times this for accuracy in later calculations)
176 1.30 tsutsui */
177 1.30 tsutsui sc->sc_clkfreq = 100;
178 1.30 tsutsui
179 1.30 tsutsui /*
180 1.30 tsutsui * Initialise the hardware
181 1.30 tsutsui */
182 1.30 tsutsui sbicinit(sc);
183 1.30 tsutsui
184 1.30 tsutsui /*
185 1.30 tsutsui * Fix up the interrupts
186 1.30 tsutsui */
187 1.30 tsutsui sc->sc_ipl = pa->pa_ipl & PCC_IMASK;
188 1.30 tsutsui
189 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL, PCC_ICLEAR);
190 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, PCC_ICLEAR);
191 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
192 1.30 tsutsui
193 1.30 tsutsui evcnt_attach_dynamic(&evcnt, EVCNT_TYPE_INTR, pccintr_evcnt(sc->sc_ipl),
194 1.30 tsutsui "disk", sc->sc_dev.dv_xname);
195 1.30 tsutsui pccintr_establish(PCCV_DMA, wdsc_dmaintr, sc->sc_ipl, sc, &evcnt);
196 1.30 tsutsui pccintr_establish(PCCV_SCSI, wdsc_scsiintr, sc->sc_ipl, sc, &evcnt);
197 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL,
198 1.30 tsutsui sc->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
199 1.1 chuck
200 1.30 tsutsui (void)config_found(dp, &sc->sc_channel, scsiprint);
201 1.1 chuck }
202 1.1 chuck
203 1.1 chuck /*
204 1.1 chuck * Enable DMA interrupts
205 1.1 chuck */
206 1.1 chuck void
207 1.30 tsutsui wdsc_enintr(struct sbic_softc *dev)
208 1.1 chuck {
209 1.1 chuck
210 1.30 tsutsui dev->sc_flags |= SBICF_INTR;
211 1.30 tsutsui
212 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
213 1.30 tsutsui dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
214 1.1 chuck }
215 1.1 chuck
216 1.1 chuck /*
217 1.1 chuck * Prime the hardware for a DMA transfer
218 1.1 chuck */
219 1.1 chuck int
220 1.30 tsutsui wdsc_dmago(struct sbic_softc *dev, char *addr, int count, int flags)
221 1.1 chuck {
222 1.1 chuck
223 1.30 tsutsui /*
224 1.30 tsutsui * Set up the command word based on flags
225 1.30 tsutsui */
226 1.30 tsutsui if ((flags & DMAGO_READ) == 0)
227 1.30 tsutsui dev->sc_dmacmd = DMAC_CSR_ENABLE | DMAC_CSR_WRITE;
228 1.30 tsutsui else
229 1.30 tsutsui dev->sc_dmacmd = DMAC_CSR_ENABLE;
230 1.30 tsutsui
231 1.30 tsutsui dev->sc_flags |= SBICF_INTR;
232 1.30 tsutsui dev->sc_tcnt = dev->sc_cur->dc_count << 1;
233 1.30 tsutsui
234 1.30 tsutsui /*
235 1.30 tsutsui * Prime the hardware.
236 1.30 tsutsui * Note, it's probably not necessary to do this here, since dmanext
237 1.30 tsutsui * is called just prior to the actual transfer.
238 1.30 tsutsui */
239 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
240 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
241 1.30 tsutsui dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
242 1.30 tsutsui pcc_reg_write32(sys_pcc, PCCREG_DMA_DATA_ADDR,
243 1.30 tsutsui (uint32_t) dev->sc_cur->dc_addr);
244 1.30 tsutsui pcc_reg_write32(sys_pcc, PCCREG_DMA_BYTE_COUNT,
245 1.30 tsutsui (uint32_t) dev->sc_tcnt | (1 << 24));
246 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, dev->sc_dmacmd);
247 1.30 tsutsui
248 1.30 tsutsui return dev->sc_tcnt;
249 1.1 chuck }
250 1.1 chuck
251 1.1 chuck /*
252 1.1 chuck * Prime the hardware for the next DMA transfer
253 1.1 chuck */
254 1.1 chuck int
255 1.30 tsutsui wdsc_dmanext(struct sbic_softc *dev)
256 1.1 chuck {
257 1.1 chuck
258 1.30 tsutsui if (dev->sc_cur > dev->sc_last) {
259 1.30 tsutsui /*
260 1.30 tsutsui * Shouldn't happen !!
261 1.30 tsutsui */
262 1.30 tsutsui printf("wdsc_dmanext at end !!!\n");
263 1.30 tsutsui wdsc_dmastop(dev);
264 1.30 tsutsui return 0;
265 1.30 tsutsui }
266 1.30 tsutsui
267 1.30 tsutsui dev->sc_tcnt = dev->sc_cur->dc_count << 1;
268 1.30 tsutsui
269 1.30 tsutsui /*
270 1.30 tsutsui * Load the next DMA address
271 1.30 tsutsui */
272 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
273 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
274 1.30 tsutsui dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
275 1.30 tsutsui pcc_reg_write32(sys_pcc, PCCREG_DMA_DATA_ADDR,
276 1.30 tsutsui (uint32_t) dev->sc_cur->dc_addr);
277 1.30 tsutsui pcc_reg_write32(sys_pcc, PCCREG_DMA_BYTE_COUNT,
278 1.30 tsutsui (uint32_t) dev->sc_tcnt | (1 << 24));
279 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, dev->sc_dmacmd);
280 1.30 tsutsui
281 1.30 tsutsui return dev->sc_tcnt;
282 1.1 chuck }
283 1.1 chuck
284 1.1 chuck /*
285 1.1 chuck * Stop DMA, and disable interrupts
286 1.1 chuck */
287 1.1 chuck void
288 1.30 tsutsui wdsc_dmastop(struct sbic_softc *dev)
289 1.1 chuck {
290 1.30 tsutsui int s;
291 1.1 chuck
292 1.30 tsutsui s = splbio();
293 1.1 chuck
294 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
295 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, dev->sc_ipl | PCC_ICLEAR);
296 1.1 chuck
297 1.30 tsutsui splx(s);
298 1.1 chuck }
299 1.1 chuck
300 1.1 chuck /*
301 1.1 chuck * Come here following a DMA interrupt
302 1.1 chuck */
303 1.1 chuck int
304 1.30 tsutsui wdsc_dmaintr(void *arg)
305 1.1 chuck {
306 1.30 tsutsui struct sbic_softc *dev = arg;
307 1.30 tsutsui int found = 0;
308 1.1 chuck
309 1.30 tsutsui /*
310 1.30 tsutsui * Really a DMA interrupt?
311 1.30 tsutsui */
312 1.30 tsutsui if ((pcc_reg_read(sys_pcc, PCCREG_DMA_INTR_CTRL) & 0x80) == 0)
313 1.30 tsutsui return 0;
314 1.30 tsutsui
315 1.30 tsutsui /*
316 1.30 tsutsui * Was it a completion interrupt?
317 1.30 tsutsui * XXXSCW Note: Support for other DMA interrupts is required,
318 1.30 tsutsui * eg. buserr
319 1.30 tsutsui */
320 1.30 tsutsui if (pcc_reg_read(sys_pcc, PCCREG_DMA_CONTROL) & DMAC_CSR_DONE) {
321 1.30 tsutsui ++found;
322 1.30 tsutsui
323 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
324 1.30 tsutsui dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
325 1.30 tsutsui }
326 1.1 chuck
327 1.30 tsutsui return found;
328 1.1 chuck }
329 1.1 chuck
330 1.1 chuck /*
331 1.1 chuck * Come here for SCSI interrupts
332 1.1 chuck */
333 1.1 chuck int
334 1.30 tsutsui wdsc_scsiintr(void *arg)
335 1.1 chuck {
336 1.30 tsutsui struct sbic_softc *dev = arg;
337 1.30 tsutsui int found;
338 1.1 chuck
339 1.30 tsutsui /*
340 1.30 tsutsui * Really a SCSI interrupt?
341 1.30 tsutsui */
342 1.30 tsutsui if ((pcc_reg_read(sys_pcc, PCCREG_SCSI_INTR_CTRL) & 0x80) == 0)
343 1.30 tsutsui return 0;
344 1.30 tsutsui
345 1.30 tsutsui /*
346 1.30 tsutsui * Go handle it
347 1.30 tsutsui */
348 1.30 tsutsui found = sbicintr(dev);
349 1.30 tsutsui
350 1.30 tsutsui /*
351 1.30 tsutsui * Acknowledge and clear the interrupt
352 1.30 tsutsui */
353 1.30 tsutsui pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL,
354 1.17 scw dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
355 1.1 chuck
356 1.30 tsutsui return found;
357 1.1 chuck }
358