wdsc.c revision 1.10
1 /* $NetBSD: wdsc.c,v 1.10 1997/08/27 11:24:01 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Steve Woodford 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)wdsc.c 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/device.h> 43 44 #include <dev/scsipi/scsi_all.h> 45 #include <dev/scsipi/scsipi_all.h> 46 #include <dev/scsipi/scsiconf.h> 47 48 #include <machine/autoconf.h> 49 50 #include <mvme68k/dev/dmavar.h> 51 #include <mvme68k/dev/pccreg.h> 52 #include <mvme68k/dev/pccvar.h> 53 #include <mvme68k/dev/sbicreg.h> 54 #include <mvme68k/dev/sbicvar.h> 55 #include <mvme68k/dev/wdscreg.h> 56 57 void wdsc_pcc_attach __P((struct device *, struct device *, void *)); 58 int wdsc_pcc_match __P((struct device *, struct cfdata *, void *)); 59 60 void wdsc_enintr __P((struct sbic_softc *)); 61 int wdsc_dmago __P((struct sbic_softc *, char *, int, int)); 62 int wdsc_dmanext __P((struct sbic_softc *)); 63 void wdsc_dmastop __P((struct sbic_softc *)); 64 int wdsc_dmaintr __P((void *)); 65 int wdsc_scsiintr __P((void *)); 66 67 struct scsipi_adapter wdsc_scsiswitch = { 68 sbic_scsicmd, 69 sbic_minphys, 70 0, /* no lun support */ 71 0, /* no lun support */ 72 }; 73 74 struct scsipi_device wdsc_scsidev = { 75 NULL, /* use default error handler */ 76 NULL, /* do not have a start functio */ 77 NULL, /* have no async handler */ 78 NULL, /* Use default done routine */ 79 }; 80 81 struct cfattach wdsc_pcc_ca = { 82 sizeof(struct sbic_softc), wdsc_pcc_match, wdsc_pcc_attach 83 }; 84 85 struct cfdriver wdsc_cd = { 86 NULL, "wdsc", DV_DULL, NULL, 0 87 }; 88 89 /* 90 * Define 'scsi_nosync = 0x00' to enable sync SCSI mode. 91 * This is untested as yet, use at your own risk... 92 */ 93 u_long scsi_nosync = 0xff; 94 int shift_nosync = 0; 95 96 /* 97 * Match for SCSI devices on the onboard WD33C93 chip 98 */ 99 int 100 wdsc_pcc_match(pdp, cf, auxp) 101 struct device *pdp; 102 struct cfdata *cf; 103 void *auxp; 104 { 105 struct pcc_attach_args *pa = auxp; 106 107 if (strcmp(pa->pa_name, wdsc_cd.cd_name)) 108 return (0); 109 110 pa->pa_ipl = cf->pcccf_ipl; 111 return (1); 112 } 113 114 /* 115 * Attach the wdsc driver 116 */ 117 void 118 wdsc_pcc_attach(pdp, dp, auxp) 119 struct device *pdp, *dp; 120 void *auxp; 121 { 122 struct sbic_softc *sc = (struct sbic_softc *)dp; 123 struct pcc_attach_args *pa = auxp; 124 static int attached = 0; 125 int tmp; 126 127 if ( attached ) 128 panic("wdsc: Driver already attached!"); 129 130 attached = 1; 131 132 sc->sc_enintr = wdsc_enintr; 133 sc->sc_dmago = wdsc_dmago; 134 sc->sc_dmanext = wdsc_dmanext; 135 sc->sc_dmastop = wdsc_dmastop; 136 sc->sc_dmacmd = 0; 137 138 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 139 sc->sc_link.adapter_softc = sc; 140 sc->sc_link.scsipi_scsi.adapter_target = 7; 141 sc->sc_link.adapter = &wdsc_scsiswitch; 142 sc->sc_link.device = &wdsc_scsidev; 143 sc->sc_link.openings = 2; 144 sc->sc_link.scsipi_scsi.max_target = 7; 145 sc->sc_link.type = BUS_SCSI; 146 147 printf(": WD33C93 SCSI, target %d\n", 148 sc->sc_link.scsipi_scsi.adapter_target); 149 150 sc->sc_cregs = (volatile void *)sys_pcc; 151 sc->sc_sbicp = (sbic_regmap_p) PCC_VADDR(pa->pa_offset); 152 153 /* 154 * Eveything is a valid dma address. 155 */ 156 sc->sc_dmamask = 0; 157 158 /* 159 * The onboard WD33C93 of the '147 is usually clocked at 10MHz... 160 * (We use 10 times this for accuracy in later calculations) 161 */ 162 sc->sc_clkfreq = 100; 163 164 /* 165 * Initialise the hardware 166 */ 167 sbicinit(sc); 168 169 /* 170 * Fix up the interrupts 171 */ 172 sc->sc_ipl = pa->pa_ipl & PCC_IMASK; 173 174 sys_pcc->scsi_int = sc->sc_ipl | PCC_ICLEAR; 175 sys_pcc->dma_int = sc->sc_ipl | PCC_ICLEAR; 176 sys_pcc->dma_csr = 0; 177 178 pccintr_establish(PCCV_SCSID, wdsc_dmaintr, sc->sc_ipl, sc); 179 pccintr_establish(PCCV_SCSIP, wdsc_scsiintr, sc->sc_ipl, sc); 180 181 sys_pcc->scsi_int = sc->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 182 183 /* 184 * Attach all scsi units on us, watching for boot device 185 * (see dk_establish). 186 */ 187 tmp = bootpart; 188 if (PCC_PADDR(pa->pa_offset) != bootaddr) 189 bootpart = -1; /* invalid flag to dk_establish */ 190 (void)config_found(dp, &sc->sc_link, scsiprint); 191 bootpart = tmp; /* restore old value */ 192 } 193 194 /* 195 * Enable DMA interrupts 196 */ 197 void 198 wdsc_enintr(dev) 199 struct sbic_softc *dev; 200 { 201 volatile struct pcc *pc = dev->sc_cregs; 202 203 dev->sc_flags |= SBICF_INTR; 204 205 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 206 } 207 208 /* 209 * Prime the hardware for a DMA transfer 210 */ 211 int 212 wdsc_dmago(dev, addr, count, flags) 213 struct sbic_softc *dev; 214 char *addr; 215 int count, flags; 216 { 217 volatile struct pcc *pc = dev->sc_cregs; 218 219 /* 220 * Set up the command word based on flags 221 */ 222 if ( (flags & DMAGO_READ) == 0 ) 223 dev->sc_dmacmd = DMAC_CSR_ENABLE | DMAC_CSR_WRITE; 224 else 225 dev->sc_dmacmd = DMAC_CSR_ENABLE; 226 227 dev->sc_flags |= SBICF_INTR; 228 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 229 230 /* 231 * Prime the hardware. 232 * Note, it's probably not necessary to do this here, since dmanext 233 * is called just prior to the actual transfer. 234 */ 235 pc->dma_csr = 0; 236 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 237 pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr; 238 pc->dma_bcnt = (unsigned long)dev->sc_tcnt | (1 << 24); 239 pc->dma_csr = dev->sc_dmacmd; 240 241 return(dev->sc_tcnt); 242 } 243 244 /* 245 * Prime the hardware for the next DMA transfer 246 */ 247 int 248 wdsc_dmanext(dev) 249 struct sbic_softc *dev; 250 { 251 volatile struct pcc *pc = dev->sc_cregs; 252 253 if ( dev->sc_cur > dev->sc_last ) { 254 /* 255 * Shouldn't happen !! 256 */ 257 printf("wdsc_dmanext at end !!!\n"); 258 wdsc_dmastop(dev); 259 return(0); 260 } 261 262 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 263 264 /* 265 * Load the next DMA address 266 */ 267 pc->dma_csr = 0; 268 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 269 pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr; 270 pc->dma_bcnt = (unsigned long)dev->sc_tcnt | (1 << 24); 271 pc->dma_csr = dev->sc_dmacmd; 272 273 return(dev->sc_tcnt); 274 } 275 276 /* 277 * Stop DMA, and disable interrupts 278 */ 279 void 280 wdsc_dmastop(dev) 281 struct sbic_softc *dev; 282 { 283 volatile struct pcc *pc = dev->sc_cregs; 284 int s; 285 286 s = splbio(); 287 288 pc->dma_csr = 0; 289 pc->dma_int = dev->sc_ipl | PCC_ICLEAR; 290 291 splx(s); 292 } 293 294 /* 295 * Come here following a DMA interrupt 296 */ 297 int 298 wdsc_dmaintr(arg) 299 void *arg; 300 { 301 struct sbic_softc *dev = arg; 302 volatile struct pcc *pc = dev->sc_cregs; 303 int found = 0; 304 305 /* 306 * Really a DMA interrupt? 307 */ 308 if ( (pc->dma_int & 0x80) == 0 ) 309 return(0); 310 311 /* 312 * Was it a completion interrupt? 313 * XXXSCW Note: Support for other DMA interrupts is required, eg. buserr 314 */ 315 if ( pc->dma_csr & DMAC_CSR_DONE ) { 316 ++found; 317 318 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 319 } 320 321 return(found); 322 } 323 324 /* 325 * Come here for SCSI interrupts 326 */ 327 int 328 wdsc_scsiintr(arg) 329 void *arg; 330 { 331 struct sbic_softc *dev = arg; 332 volatile struct pcc *pc = dev->sc_cregs; 333 int found; 334 335 /* 336 * Really a SCSI interrupt? 337 */ 338 if ( (pc->scsi_int & 0x80) == 0 ) 339 return(0); 340 341 /* 342 * Go handle it 343 */ 344 found = sbicintr(dev); 345 346 /* 347 * Acknowledge and clear the interrupt 348 */ 349 pc->scsi_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 350 351 return(found); 352 } 353
Indexes created Tue Sep 30 20:09:53 GMT 2025