wdsc.c revision 1.11
1 /* $NetBSD: wdsc.c,v 1.11 1998/01/12 19:51:13 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Steve Woodford 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)wdsc.c 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/device.h> 43 44 #include <dev/scsipi/scsi_all.h> 45 #include <dev/scsipi/scsipi_all.h> 46 #include <dev/scsipi/scsiconf.h> 47 48 #include <machine/autoconf.h> 49 50 #include <mvme68k/dev/dmavar.h> 51 #include <mvme68k/dev/pccreg.h> 52 #include <mvme68k/dev/pccvar.h> 53 #include <mvme68k/dev/sbicreg.h> 54 #include <mvme68k/dev/sbicvar.h> 55 #include <mvme68k/dev/wdscreg.h> 56 57 void wdsc_pcc_attach __P((struct device *, struct device *, void *)); 58 int wdsc_pcc_match __P((struct device *, struct cfdata *, void *)); 59 60 void wdsc_enintr __P((struct sbic_softc *)); 61 int wdsc_dmago __P((struct sbic_softc *, char *, int, int)); 62 int wdsc_dmanext __P((struct sbic_softc *)); 63 void wdsc_dmastop __P((struct sbic_softc *)); 64 int wdsc_dmaintr __P((void *)); 65 int wdsc_scsiintr __P((void *)); 66 67 struct scsipi_adapter wdsc_scsiswitch = { 68 sbic_scsicmd, 69 sbic_minphys, 70 0, /* no lun support */ 71 0, /* no lun support */ 72 }; 73 74 struct scsipi_device wdsc_scsidev = { 75 NULL, /* use default error handler */ 76 NULL, /* do not have a start functio */ 77 NULL, /* have no async handler */ 78 NULL, /* Use default done routine */ 79 }; 80 81 struct cfattach wdsc_pcc_ca = { 82 sizeof(struct sbic_softc), wdsc_pcc_match, wdsc_pcc_attach 83 }; 84 85 extern struct cfdriver wdsc_cd; 86 87 /* 88 * Define 'scsi_nosync = 0x00' to enable sync SCSI mode. 89 * This is untested as yet, use at your own risk... 90 */ 91 u_long scsi_nosync = 0xff; 92 int shift_nosync = 0; 93 94 /* 95 * Match for SCSI devices on the onboard WD33C93 chip 96 */ 97 int 98 wdsc_pcc_match(pdp, cf, auxp) 99 struct device *pdp; 100 struct cfdata *cf; 101 void *auxp; 102 { 103 struct pcc_attach_args *pa = auxp; 104 105 if (strcmp(pa->pa_name, wdsc_cd.cd_name)) 106 return (0); 107 108 pa->pa_ipl = cf->pcccf_ipl; 109 return (1); 110 } 111 112 /* 113 * Attach the wdsc driver 114 */ 115 void 116 wdsc_pcc_attach(pdp, dp, auxp) 117 struct device *pdp, *dp; 118 void *auxp; 119 { 120 struct sbic_softc *sc = (struct sbic_softc *)dp; 121 struct pcc_attach_args *pa = auxp; 122 static int attached = 0; 123 int tmp; 124 125 if ( attached ) 126 panic("wdsc: Driver already attached!"); 127 128 attached = 1; 129 130 sc->sc_enintr = wdsc_enintr; 131 sc->sc_dmago = wdsc_dmago; 132 sc->sc_dmanext = wdsc_dmanext; 133 sc->sc_dmastop = wdsc_dmastop; 134 sc->sc_dmacmd = 0; 135 136 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 137 sc->sc_link.adapter_softc = sc; 138 sc->sc_link.scsipi_scsi.adapter_target = 7; 139 sc->sc_link.adapter = &wdsc_scsiswitch; 140 sc->sc_link.device = &wdsc_scsidev; 141 sc->sc_link.openings = 2; 142 sc->sc_link.scsipi_scsi.max_target = 7; 143 sc->sc_link.type = BUS_SCSI; 144 145 printf(": WD33C93 SCSI, target %d\n", 146 sc->sc_link.scsipi_scsi.adapter_target); 147 148 sc->sc_cregs = (volatile void *)sys_pcc; 149 sc->sc_sbicp = (sbic_regmap_p) PCC_VADDR(pa->pa_offset); 150 151 /* 152 * Eveything is a valid dma address. 153 */ 154 sc->sc_dmamask = 0; 155 156 /* 157 * The onboard WD33C93 of the '147 is usually clocked at 10MHz... 158 * (We use 10 times this for accuracy in later calculations) 159 */ 160 sc->sc_clkfreq = 100; 161 162 /* 163 * Initialise the hardware 164 */ 165 sbicinit(sc); 166 167 /* 168 * Fix up the interrupts 169 */ 170 sc->sc_ipl = pa->pa_ipl & PCC_IMASK; 171 172 sys_pcc->scsi_int = sc->sc_ipl | PCC_ICLEAR; 173 sys_pcc->dma_int = sc->sc_ipl | PCC_ICLEAR; 174 sys_pcc->dma_csr = 0; 175 176 pccintr_establish(PCCV_SCSID, wdsc_dmaintr, sc->sc_ipl, sc); 177 pccintr_establish(PCCV_SCSIP, wdsc_scsiintr, sc->sc_ipl, sc); 178 179 sys_pcc->scsi_int = sc->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 180 181 /* 182 * Attach all scsi units on us, watching for boot device 183 * (see dk_establish). 184 */ 185 tmp = bootpart; 186 if (PCC_PADDR(pa->pa_offset) != bootaddr) 187 bootpart = -1; /* invalid flag to dk_establish */ 188 (void)config_found(dp, &sc->sc_link, scsiprint); 189 bootpart = tmp; /* restore old value */ 190 } 191 192 /* 193 * Enable DMA interrupts 194 */ 195 void 196 wdsc_enintr(dev) 197 struct sbic_softc *dev; 198 { 199 volatile struct pcc *pc = dev->sc_cregs; 200 201 dev->sc_flags |= SBICF_INTR; 202 203 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 204 } 205 206 /* 207 * Prime the hardware for a DMA transfer 208 */ 209 int 210 wdsc_dmago(dev, addr, count, flags) 211 struct sbic_softc *dev; 212 char *addr; 213 int count, flags; 214 { 215 volatile struct pcc *pc = dev->sc_cregs; 216 217 /* 218 * Set up the command word based on flags 219 */ 220 if ( (flags & DMAGO_READ) == 0 ) 221 dev->sc_dmacmd = DMAC_CSR_ENABLE | DMAC_CSR_WRITE; 222 else 223 dev->sc_dmacmd = DMAC_CSR_ENABLE; 224 225 dev->sc_flags |= SBICF_INTR; 226 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 227 228 /* 229 * Prime the hardware. 230 * Note, it's probably not necessary to do this here, since dmanext 231 * is called just prior to the actual transfer. 232 */ 233 pc->dma_csr = 0; 234 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 235 pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr; 236 pc->dma_bcnt = (unsigned long)dev->sc_tcnt | (1 << 24); 237 pc->dma_csr = dev->sc_dmacmd; 238 239 return(dev->sc_tcnt); 240 } 241 242 /* 243 * Prime the hardware for the next DMA transfer 244 */ 245 int 246 wdsc_dmanext(dev) 247 struct sbic_softc *dev; 248 { 249 volatile struct pcc *pc = dev->sc_cregs; 250 251 if ( dev->sc_cur > dev->sc_last ) { 252 /* 253 * Shouldn't happen !! 254 */ 255 printf("wdsc_dmanext at end !!!\n"); 256 wdsc_dmastop(dev); 257 return(0); 258 } 259 260 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 261 262 /* 263 * Load the next DMA address 264 */ 265 pc->dma_csr = 0; 266 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 267 pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr; 268 pc->dma_bcnt = (unsigned long)dev->sc_tcnt | (1 << 24); 269 pc->dma_csr = dev->sc_dmacmd; 270 271 return(dev->sc_tcnt); 272 } 273 274 /* 275 * Stop DMA, and disable interrupts 276 */ 277 void 278 wdsc_dmastop(dev) 279 struct sbic_softc *dev; 280 { 281 volatile struct pcc *pc = dev->sc_cregs; 282 int s; 283 284 s = splbio(); 285 286 pc->dma_csr = 0; 287 pc->dma_int = dev->sc_ipl | PCC_ICLEAR; 288 289 splx(s); 290 } 291 292 /* 293 * Come here following a DMA interrupt 294 */ 295 int 296 wdsc_dmaintr(arg) 297 void *arg; 298 { 299 struct sbic_softc *dev = arg; 300 volatile struct pcc *pc = dev->sc_cregs; 301 int found = 0; 302 303 /* 304 * Really a DMA interrupt? 305 */ 306 if ( (pc->dma_int & 0x80) == 0 ) 307 return(0); 308 309 /* 310 * Was it a completion interrupt? 311 * XXXSCW Note: Support for other DMA interrupts is required, eg. buserr 312 */ 313 if ( pc->dma_csr & DMAC_CSR_DONE ) { 314 ++found; 315 316 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 317 } 318 319 return(found); 320 } 321 322 /* 323 * Come here for SCSI interrupts 324 */ 325 int 326 wdsc_scsiintr(arg) 327 void *arg; 328 { 329 struct sbic_softc *dev = arg; 330 volatile struct pcc *pc = dev->sc_cregs; 331 int found; 332 333 /* 334 * Really a SCSI interrupt? 335 */ 336 if ( (pc->scsi_int & 0x80) == 0 ) 337 return(0); 338 339 /* 340 * Go handle it 341 */ 342 found = sbicintr(dev); 343 344 /* 345 * Acknowledge and clear the interrupt 346 */ 347 pc->scsi_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 348 349 return(found); 350 } 351
Indexes created Tue Sep 30 20:09:53 GMT 2025