Home | History | Annotate | Line # | Download | only in dev
wdsc.c revision 1.14
      1 /*	$NetBSD: wdsc.c,v 1.14 1998/12/05 19:43:43 mjacob Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Steve Woodford
      5  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *  This product includes software developed by the University of
     19  *  California, Berkeley and its contributors.
     20  * 4. Neither the name of the University nor the names of its contributors
     21  *    may be used to endorse or promote products derived from this software
     22  *    without specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  *  @(#)wdsc.c
     37  */
     38 
     39 #include <sys/param.h>
     40 #include <sys/systm.h>
     41 #include <sys/kernel.h>
     42 #include <sys/device.h>
     43 
     44 #include <dev/scsipi/scsi_all.h>
     45 #include <dev/scsipi/scsipi_all.h>
     46 #include <dev/scsipi/scsiconf.h>
     47 
     48 #include <machine/autoconf.h>
     49 
     50 #include <mvme68k/dev/dmavar.h>
     51 #include <mvme68k/dev/pccreg.h>
     52 #include <mvme68k/dev/pccvar.h>
     53 #include <mvme68k/dev/sbicreg.h>
     54 #include <mvme68k/dev/sbicvar.h>
     55 #include <mvme68k/dev/wdscreg.h>
     56 
     57 void    wdsc_pcc_attach __P((struct device *, struct device *, void *));
     58 int     wdsc_pcc_match  __P((struct device *, struct cfdata *, void *));
     59 
     60 void    wdsc_enintr     __P((struct sbic_softc *));
     61 int     wdsc_dmago      __P((struct sbic_softc *, char *, int, int));
     62 int     wdsc_dmanext    __P((struct sbic_softc *));
     63 void    wdsc_dmastop    __P((struct sbic_softc *));
     64 int     wdsc_dmaintr    __P((void *));
     65 int     wdsc_scsiintr   __P((void *));
     66 
     67 struct scsipi_device wdsc_scsidev = {
     68     NULL,       /* use default error handler */
     69     NULL,       /* do not have a start functio */
     70     NULL,       /* have no async handler */
     71     NULL,       /* Use default done routine */
     72 };
     73 
     74 struct cfattach wdsc_pcc_ca = {
     75 	sizeof(struct sbic_softc), wdsc_pcc_match, wdsc_pcc_attach
     76 };
     77 
     78 extern struct cfdriver wdsc_cd;
     79 
     80 /*
     81  * Define 'scsi_nosync = 0x00' to enable sync SCSI mode.
     82  * This is untested as yet, use at your own risk...
     83  */
     84 u_long      scsi_nosync  = 0xff;
     85 int         shift_nosync = 0;
     86 
     87 /*
     88  * Match for SCSI devices on the onboard WD33C93 chip
     89  */
     90 int
     91 wdsc_pcc_match(pdp, cf, auxp)
     92     struct device *pdp;
     93 	struct cfdata *cf;
     94     void *auxp;
     95 {
     96     struct pcc_attach_args *pa = auxp;
     97 
     98     if (strcmp(pa->pa_name, wdsc_cd.cd_name))
     99 	return (0);
    100 
    101     pa->pa_ipl = cf->pcccf_ipl;
    102     return (1);
    103 }
    104 
    105 /*
    106  * Attach the wdsc driver
    107  */
    108 void
    109 wdsc_pcc_attach(pdp, dp, auxp)
    110     struct device *pdp, *dp;
    111     void *auxp;
    112 {
    113     struct sbic_softc   *sc = (struct sbic_softc *)dp;
    114     struct pcc_attach_args *pa = auxp;
    115     static int          attached = 0;
    116     int tmp;
    117 
    118     if ( attached )
    119         panic("wdsc: Driver already attached!");
    120 
    121     attached = 1;
    122 
    123     sc->sc_enintr  = wdsc_enintr;
    124     sc->sc_dmago   = wdsc_dmago;
    125     sc->sc_dmanext = wdsc_dmanext;
    126     sc->sc_dmastop = wdsc_dmastop;
    127     sc->sc_dmacmd  = 0;
    128 
    129     sc->sc_adapter.scsipi_cmd = sbic_scsicmd;
    130     sc->sc_adapter.scsipi_minphys = sbic_minphys;
    131 
    132     sc->sc_link.scsipi_scsi.channel        = SCSI_CHANNEL_ONLY_ONE;
    133     sc->sc_link.adapter_softc  = sc;
    134     sc->sc_link.scsipi_scsi.adapter_target = 7;
    135     sc->sc_link.adapter        = &sc->sc_adapter;
    136     sc->sc_link.device         = &wdsc_scsidev;
    137     sc->sc_link.openings       = 2;
    138     sc->sc_link.scsipi_scsi.max_target     = 7;
    139     sc->sc_link.scsipi_scsi.max_lun = 7;
    140     sc->sc_link.type = BUS_SCSI;
    141 
    142     printf(": WD33C93 SCSI, target %d\n",
    143 		sc->sc_link.scsipi_scsi.adapter_target);
    144 
    145     sc->sc_cregs = (volatile void *)sys_pcc;
    146     sc->sc_sbicp = (sbic_regmap_p) PCC_VADDR(pa->pa_offset);
    147 
    148     /*
    149      * Eveything is a valid dma address.
    150      */
    151     sc->sc_dmamask = 0;
    152 
    153     /*
    154      * The onboard WD33C93 of the '147 is usually clocked at 10MHz...
    155      * (We use 10 times this for accuracy in later calculations)
    156      */
    157     sc->sc_clkfreq = 100;
    158 
    159     /*
    160      * Initialise the hardware
    161      */
    162     sbicinit(sc);
    163 
    164     /*
    165      * Fix up the interrupts
    166      */
    167     sc->sc_ipl = pa->pa_ipl & PCC_IMASK;
    168 
    169     sys_pcc->scsi_int = sc->sc_ipl | PCC_ICLEAR;
    170     sys_pcc->dma_int  = sc->sc_ipl | PCC_ICLEAR;
    171     sys_pcc->dma_csr  = 0;
    172 
    173     pccintr_establish(PCCV_SCSID, wdsc_dmaintr,  sc->sc_ipl, sc);
    174     pccintr_establish(PCCV_SCSIP, wdsc_scsiintr, sc->sc_ipl, sc);
    175 
    176     sys_pcc->scsi_int = sc->sc_ipl | PCC_IENABLE | PCC_ICLEAR;
    177 
    178     /*
    179      * Attach all scsi units on us, watching for boot device
    180      * (see dk_establish).
    181      */
    182     tmp = bootpart;
    183     if (PCC_PADDR(pa->pa_offset) != bootaddr)
    184 	bootpart = -1;		/* invalid flag to dk_establish */
    185     (void)config_found(dp, &sc->sc_link, scsiprint);
    186     bootpart = tmp;		/* restore old value */
    187 }
    188 
    189 /*
    190  * Enable DMA interrupts
    191  */
    192 void
    193 wdsc_enintr(dev)
    194     struct sbic_softc *dev;
    195 {
    196     volatile struct pcc *pc = dev->sc_cregs;
    197 
    198     dev->sc_flags |= SBICF_INTR;
    199 
    200     pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR;
    201 }
    202 
    203 /*
    204  * Prime the hardware for a DMA transfer
    205  */
    206 int
    207 wdsc_dmago(dev, addr, count, flags)
    208     struct sbic_softc *dev;
    209     char *addr;
    210     int count, flags;
    211 {
    212     volatile struct pcc *pc = dev->sc_cregs;
    213 
    214     /*
    215      * Set up the command word based on flags
    216      */
    217     if ( (flags & DMAGO_READ) == 0 )
    218         dev->sc_dmacmd = DMAC_CSR_ENABLE | DMAC_CSR_WRITE;
    219     else
    220         dev->sc_dmacmd = DMAC_CSR_ENABLE;
    221 
    222     dev->sc_flags |= SBICF_INTR;
    223     dev->sc_tcnt   = dev->sc_cur->dc_count << 1;
    224 
    225     /*
    226      * Prime the hardware.
    227      * Note, it's probably not necessary to do this here, since dmanext
    228      * is called just prior to the actual transfer.
    229      */
    230     pc->dma_csr   = 0;
    231     pc->dma_int   = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR;
    232     pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr;
    233     pc->dma_bcnt  = (unsigned long)dev->sc_tcnt | (1 << 24);
    234     pc->dma_csr   = dev->sc_dmacmd;
    235 
    236     return(dev->sc_tcnt);
    237 }
    238 
    239 /*
    240  * Prime the hardware for the next DMA transfer
    241  */
    242 int
    243 wdsc_dmanext(dev)
    244     struct sbic_softc *dev;
    245 {
    246     volatile struct pcc *pc = dev->sc_cregs;
    247 
    248     if ( dev->sc_cur > dev->sc_last ) {
    249         /*
    250          * Shouldn't happen !!
    251          */
    252         printf("wdsc_dmanext at end !!!\n");
    253         wdsc_dmastop(dev);
    254         return(0);
    255     }
    256 
    257     dev->sc_tcnt = dev->sc_cur->dc_count << 1;
    258 
    259     /*
    260      * Load the next DMA address
    261      */
    262     pc->dma_csr   = 0;
    263     pc->dma_int   = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR;
    264     pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr;
    265     pc->dma_bcnt  = (unsigned long)dev->sc_tcnt | (1 << 24);
    266     pc->dma_csr   = dev->sc_dmacmd;
    267 
    268     return(dev->sc_tcnt);
    269 }
    270 
    271 /*
    272  * Stop DMA, and disable interrupts
    273  */
    274 void
    275 wdsc_dmastop(dev)
    276     struct sbic_softc *dev;
    277 {
    278     volatile struct pcc *pc = dev->sc_cregs;
    279     int                 s;
    280 
    281     s = splbio();
    282 
    283     pc->dma_csr    = 0;
    284     pc->dma_int    = dev->sc_ipl | PCC_ICLEAR;
    285 
    286     splx(s);
    287 }
    288 
    289 /*
    290  * Come here following a DMA interrupt
    291  */
    292 int
    293 wdsc_dmaintr(arg)
    294     void *arg;
    295 {
    296     struct sbic_softc *dev = arg;
    297     volatile struct pcc *pc = dev->sc_cregs;
    298     int                 found = 0;
    299 
    300     /*
    301      * Really a DMA interrupt?
    302      */
    303     if ( (pc->dma_int & 0x80) == 0 )
    304         return(0);
    305 
    306     /*
    307      * Was it a completion interrupt?
    308      * XXXSCW Note: Support for other DMA interrupts is required, eg. buserr
    309      */
    310     if ( pc->dma_csr & DMAC_CSR_DONE ) {
    311         ++found;
    312 
    313         pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR;
    314     }
    315 
    316     return(found);
    317 }
    318 
    319 /*
    320  * Come here for SCSI interrupts
    321  */
    322 int
    323 wdsc_scsiintr(arg)
    324     void *arg;
    325 {
    326     struct sbic_softc *dev = arg;
    327     volatile struct pcc *pc = dev->sc_cregs;
    328     int                 found;
    329 
    330     /*
    331      * Really a SCSI interrupt?
    332      */
    333     if ( (pc->scsi_int & 0x80) == 0 )
    334         return(0);
    335 
    336     /*
    337      * Go handle it
    338      */
    339     found = sbicintr(dev);
    340 
    341     /*
    342      * Acknowledge and clear the interrupt
    343      */
    344     pc->scsi_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR;
    345 
    346     return(found);
    347 }
    348