wdsc.c revision 1.3
1 /* $NetBSD: wdsc.c,v 1.3 1996/05/29 04:29:46 chuck Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Steve Woodford 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)wdsc.c 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/device.h> 43 44 #include <scsi/scsi_all.h> 45 #include <scsi/scsiconf.h> 46 47 #include <machine/autoconf.h> 48 49 #include <mvme68k/dev/dmavar.h> 50 #include <mvme68k/dev/pccreg.h> 51 #include <mvme68k/dev/pccvar.h> 52 #include <mvme68k/dev/sbicreg.h> 53 #include <mvme68k/dev/sbicvar.h> 54 #include <mvme68k/dev/wdscreg.h> 55 56 int wdscprint __P((void *auxp, char *)); 57 void wdsc_pcc_attach __P((struct device *, struct device *, void *)); 58 int wdsc_pcc_match __P((struct device *, void *, void *)); 59 60 void wdsc_enintr __P((struct sbic_softc *)); 61 int wdsc_dmago __P((struct sbic_softc *, char *, int, int)); 62 int wdsc_dmanext __P((struct sbic_softc *)); 63 void wdsc_dmastop __P((struct sbic_softc *)); 64 int wdsc_dmaintr __P((void *)); 65 int wdsc_scsiintr __P((void *)); 66 67 struct scsi_adapter wdsc_scsiswitch = { 68 sbic_scsicmd, 69 sbic_minphys, 70 0, /* no lun support */ 71 0, /* no lun support */ 72 }; 73 74 struct scsi_device wdsc_scsidev = { 75 NULL, /* use default error handler */ 76 NULL, /* do not have a start functio */ 77 NULL, /* have no async handler */ 78 NULL, /* Use default done routine */ 79 }; 80 81 struct cfattach wdsc_pcc_ca = { 82 sizeof(struct sbic_softc), wdsc_pcc_match, wdsc_pcc_attach 83 }; 84 85 struct cfdriver wdsc_cd = { 86 NULL, "wdsc", DV_DULL, NULL, 0 87 }; 88 89 /* 90 * Define 'scsi_nosync = 0x00' to enable sync SCSI mode. 91 * This is untested as yet, use at your own risk... 92 */ 93 u_long scsi_nosync = 0xff; 94 int shift_nosync = 0; 95 96 /* 97 * Match for SCSI devices on the onboard WD33C93 chip 98 */ 99 int 100 wdsc_pcc_match(pdp, match, auxp) 101 struct device *pdp; 102 void *match, *auxp; 103 { 104 struct cfdata *cf = match; 105 struct pcc_attach_args *pa = auxp; 106 107 if (strcmp(pa->pa_name, wdsc_cd.cd_name)) 108 return (0); 109 110 pa->pa_ipl = cf->pcccf_ipl; 111 return (1); 112 } 113 114 /* 115 * Attach the wdsc driver 116 */ 117 void 118 wdsc_pcc_attach(pdp, dp, auxp) 119 struct device *pdp, *dp; 120 void *auxp; 121 { 122 struct sbic_softc *sc = (struct sbic_softc *)dp; 123 struct pcc_attach_args *pa = auxp; 124 static int attached = 0; 125 int tmp; 126 127 if ( attached ) 128 panic("wdsc: Driver already attached!"); 129 130 attached = 1; 131 132 sc->sc_enintr = wdsc_enintr; 133 sc->sc_dmago = wdsc_dmago; 134 sc->sc_dmanext = wdsc_dmanext; 135 sc->sc_dmastop = wdsc_dmastop; 136 sc->sc_dmacmd = 0; 137 138 sc->sc_link.adapter_softc = sc; 139 sc->sc_link.adapter_target = 7; 140 sc->sc_link.adapter = &wdsc_scsiswitch; 141 sc->sc_link.device = &wdsc_scsidev; 142 sc->sc_link.openings = 2; 143 144 printf(": WD33C93 SCSI, target %d\n", sc->sc_link.adapter_target); 145 146 sc->sc_cregs = (volatile void *)sys_pcc; 147 sc->sc_sbicp = (sbic_regmap_p) PCC_VADDR(pa->pa_offset); 148 149 /* 150 * Eveything is a valid dma address. 151 */ 152 sc->sc_dmamask = 0; 153 154 /* 155 * The onboard WD33C93 of the '147 is usually clocked at 10MHz... 156 * (We use 10 times this for accuracy in later calculations) 157 */ 158 sc->sc_clkfreq = 100; 159 160 /* 161 * Initialise the hardware 162 */ 163 sbicinit(sc); 164 165 /* 166 * Fix up the interrupts 167 */ 168 sc->sc_ipl = pa->pa_ipl & PCC_IMASK; 169 170 sys_pcc->scsi_int = sc->sc_ipl | PCC_ICLEAR; 171 sys_pcc->dma_int = sc->sc_ipl | PCC_ICLEAR; 172 sys_pcc->dma_csr = 0; 173 174 pccintr_establish(PCCV_SCSID, wdsc_dmaintr, sc->sc_ipl, sc); 175 pccintr_establish(PCCV_SCSIP, wdsc_scsiintr, sc->sc_ipl, sc); 176 177 sys_pcc->scsi_int = sc->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 178 179 /* 180 * Attach all scsi units on us, watching for boot device 181 * (see dk_establish). 182 */ 183 tmp = bootpart; 184 if (PCC_PADDR(pa->pa_offset) != bootaddr) 185 bootpart = -1; /* invalid flag to dk_establish */ 186 (void)config_found(dp, &sc->sc_link, wdscprint); 187 bootpart = tmp; /* restore old value */ 188 } 189 190 /* 191 * print diag if pnp is NULL else just extra 192 */ 193 int 194 wdscprint(auxp, pnp) 195 void *auxp; 196 char *pnp; 197 { 198 199 /* Only scsibusses can attach to wdscs...easy. */ 200 if (pnp) 201 printf("scsibus at %s", pnp); 202 203 return (UNCONF); 204 } 205 206 207 /* 208 * Enable DMA interrupts 209 */ 210 void 211 wdsc_enintr(dev) 212 struct sbic_softc *dev; 213 { 214 volatile struct pcc *pc = dev->sc_cregs; 215 216 dev->sc_flags |= SBICF_INTR; 217 218 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 219 } 220 221 /* 222 * Prime the hardware for a DMA transfer 223 */ 224 int 225 wdsc_dmago(dev, addr, count, flags) 226 struct sbic_softc *dev; 227 char *addr; 228 int count, flags; 229 { 230 volatile struct pcc *pc = dev->sc_cregs; 231 232 /* 233 * Set up the command word based on flags 234 */ 235 if ( (flags & DMAGO_READ) == 0 ) 236 dev->sc_dmacmd = DMAC_CSR_ENABLE | DMAC_CSR_WRITE; 237 else 238 dev->sc_dmacmd = DMAC_CSR_ENABLE; 239 240 dev->sc_flags |= SBICF_INTR; 241 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 242 243 /* 244 * Prime the hardware. 245 * Note, it's probably not necessary to do this here, since dmanext 246 * is called just prior to the actual transfer. 247 */ 248 pc->dma_csr = 0; 249 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 250 pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr; 251 pc->dma_bcnt = (unsigned long)dev->sc_tcnt | (1 << 24); 252 pc->dma_csr = dev->sc_dmacmd; 253 254 return(dev->sc_tcnt); 255 } 256 257 /* 258 * Prime the hardware for the next DMA transfer 259 */ 260 int 261 wdsc_dmanext(dev) 262 struct sbic_softc *dev; 263 { 264 volatile struct pcc *pc = dev->sc_cregs; 265 266 if ( dev->sc_cur > dev->sc_last ) { 267 /* 268 * Shouldn't happen !! 269 */ 270 printf("wdsc_dmanext at end !!!\n"); 271 wdsc_dmastop(dev); 272 return(0); 273 } 274 275 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 276 277 /* 278 * Load the next DMA address 279 */ 280 pc->dma_csr = 0; 281 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 282 pc->dma_daddr = (unsigned long)dev->sc_cur->dc_addr; 283 pc->dma_bcnt = (unsigned long)dev->sc_tcnt | (1 << 24); 284 pc->dma_csr = dev->sc_dmacmd; 285 286 return(dev->sc_tcnt); 287 } 288 289 /* 290 * Stop DMA, and disable interrupts 291 */ 292 void 293 wdsc_dmastop(dev) 294 struct sbic_softc *dev; 295 { 296 volatile struct pcc *pc = dev->sc_cregs; 297 int s; 298 299 s = splbio(); 300 301 pc->dma_csr = 0; 302 pc->dma_int = dev->sc_ipl | PCC_ICLEAR; 303 304 splx(s); 305 } 306 307 /* 308 * Come here following a DMA interrupt 309 */ 310 int 311 wdsc_dmaintr(arg) 312 void *arg; 313 { 314 struct sbic_softc *dev = arg; 315 volatile struct pcc *pc = dev->sc_cregs; 316 int found = 0; 317 318 /* 319 * Really a DMA interrupt? 320 */ 321 if ( (pc->dma_int & 0x80) == 0 ) 322 return(0); 323 324 /* 325 * Was it a completion interrupt? 326 * XXXSCW Note: Support for other DMA interrupts is required, eg. buserr 327 */ 328 if ( pc->dma_csr & DMAC_CSR_DONE ) { 329 ++found; 330 331 pc->dma_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 332 } 333 334 return(found); 335 } 336 337 /* 338 * Come here for SCSI interrupts 339 */ 340 int 341 wdsc_scsiintr(arg) 342 void *arg; 343 { 344 struct sbic_softc *dev = arg; 345 volatile struct pcc *pc = dev->sc_cregs; 346 int found; 347 348 /* 349 * Really a SCSI interrupt? 350 */ 351 if ( (pc->scsi_int & 0x80) == 0 ) 352 return(0); 353 354 /* 355 * Go handle it 356 */ 357 found = sbicintr(dev); 358 359 /* 360 * Acknowledge and clear the interrupt 361 */ 362 pc->scsi_int = dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR; 363 364 return(found); 365 } 366
Indexes created Tue Sep 30 20:09:53 GMT 2025