wdsc.c revision 1.30
1 /* $NetBSD: wdsc.c,v 1.30 2008/01/12 09:54:27 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)wdsc.c 32 */ 33 34 /*- 35 * Copyright (c) 1996-2004 The NetBSD Foundation, Inc. 36 * All rights reserved. 37 * 38 * This code is derived from software contributed to The NetBSD Foundation 39 * by Steve C. Woodford. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the NetBSD 52 * Foundation, Inc. and its contributors. 53 * 4. Neither the name of The NetBSD Foundation nor the names of its 54 * contributors may be used to endorse or promote products derived 55 * from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #include <sys/cdefs.h> 71 __KERNEL_RCSID(0, "$NetBSD: wdsc.c,v 1.30 2008/01/12 09:54:27 tsutsui Exp $"); 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/device.h> 77 78 #include <dev/scsipi/scsi_all.h> 79 #include <dev/scsipi/scsipi_all.h> 80 #include <dev/scsipi/scsiconf.h> 81 82 #include <machine/cpu.h> 83 #include <machine/bus.h> 84 #include <machine/autoconf.h> 85 86 #include <mvme68k/dev/dmavar.h> 87 #include <mvme68k/dev/pccreg.h> 88 #include <mvme68k/dev/pccvar.h> 89 #include <mvme68k/dev/sbicreg.h> 90 #include <mvme68k/dev/sbicvar.h> 91 #include <mvme68k/dev/wdscreg.h> 92 93 #include "ioconf.h" 94 95 void wdsc_pcc_attach(struct device *, struct device *, void *); 96 int wdsc_pcc_match(struct device *, struct cfdata *, void *); 97 98 CFATTACH_DECL(wdsc_pcc, sizeof(struct sbic_softc), 99 wdsc_pcc_match, wdsc_pcc_attach, NULL, NULL); 100 101 void wdsc_enintr(struct sbic_softc *); 102 int wdsc_dmago(struct sbic_softc *, char *, int, int); 103 int wdsc_dmanext(struct sbic_softc *); 104 void wdsc_dmastop(struct sbic_softc *); 105 int wdsc_dmaintr(void *); 106 int wdsc_scsiintr(void *); 107 108 /* 109 * Match for SCSI devices on the onboard WD33C93 chip 110 */ 111 int 112 wdsc_pcc_match(struct device *pdp, struct cfdata *cf, void *auxp) 113 { 114 struct pcc_attach_args *pa = auxp; 115 116 if (strcmp(pa->pa_name, wdsc_cd.cd_name)) 117 return 0; 118 119 pa->pa_ipl = cf->pcccf_ipl; 120 return 1; 121 } 122 123 /* 124 * Attach the wdsc driver 125 */ 126 void 127 wdsc_pcc_attach(struct device *pdp, struct device *dp, void *auxp) 128 { 129 struct sbic_softc *sc; 130 struct pcc_attach_args *pa; 131 bus_space_handle_t bush; 132 static struct evcnt evcnt; /* XXXSCW: Temporary hack */ 133 134 sc = (struct sbic_softc *)dp; 135 pa = auxp; 136 137 bus_space_map(pa->pa_bust, pa->pa_offset, 0x20, 0, &bush); 138 139 /* 140 * XXXSCW: We *need* an MI, bus_spaced WD33C93 driver... 141 */ 142 sc->sc_sbicp = (sbic_regmap_p) bush; 143 144 sc->sc_driver = (void *) &evcnt; 145 sc->sc_enintr = wdsc_enintr; 146 sc->sc_dmago = wdsc_dmago; 147 sc->sc_dmanext = wdsc_dmanext; 148 sc->sc_dmastop = wdsc_dmastop; 149 sc->sc_dmacmd = 0; 150 151 sc->sc_adapter.adapt_dev = &sc->sc_dev; 152 sc->sc_adapter.adapt_nchannels = 1; 153 sc->sc_adapter.adapt_openings = 7; 154 sc->sc_adapter.adapt_max_periph = 1; 155 sc->sc_adapter.adapt_ioctl = NULL; 156 sc->sc_adapter.adapt_minphys = sbic_minphys; 157 sc->sc_adapter.adapt_request = sbic_scsi_request; 158 159 sc->sc_channel.chan_adapter = &sc->sc_adapter; 160 sc->sc_channel.chan_bustype = &scsi_bustype; 161 sc->sc_channel.chan_channel = 0; 162 sc->sc_channel.chan_ntargets = 8; 163 sc->sc_channel.chan_nluns = 8; 164 sc->sc_channel.chan_id = 7; 165 166 printf(": WD33C93 SCSI, target %d\n", sc->sc_channel.chan_id); 167 168 /* 169 * Everything is a valid DMA address. 170 */ 171 sc->sc_dmamask = 0; 172 173 /* 174 * The onboard WD33C93 of the '147 is usually clocked at 10MHz... 175 * (We use 10 times this for accuracy in later calculations) 176 */ 177 sc->sc_clkfreq = 100; 178 179 /* 180 * Initialise the hardware 181 */ 182 sbicinit(sc); 183 184 /* 185 * Fix up the interrupts 186 */ 187 sc->sc_ipl = pa->pa_ipl & PCC_IMASK; 188 189 pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL, PCC_ICLEAR); 190 pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, PCC_ICLEAR); 191 pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0); 192 193 evcnt_attach_dynamic(&evcnt, EVCNT_TYPE_INTR, pccintr_evcnt(sc->sc_ipl), 194 "disk", sc->sc_dev.dv_xname); 195 pccintr_establish(PCCV_DMA, wdsc_dmaintr, sc->sc_ipl, sc, &evcnt); 196 pccintr_establish(PCCV_SCSI, wdsc_scsiintr, sc->sc_ipl, sc, &evcnt); 197 pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL, 198 sc->sc_ipl | PCC_IENABLE | PCC_ICLEAR); 199 200 (void)config_found(dp, &sc->sc_channel, scsiprint); 201 } 202 203 /* 204 * Enable DMA interrupts 205 */ 206 void 207 wdsc_enintr(struct sbic_softc *dev) 208 { 209 210 dev->sc_flags |= SBICF_INTR; 211 212 pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, 213 dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR); 214 } 215 216 /* 217 * Prime the hardware for a DMA transfer 218 */ 219 int 220 wdsc_dmago(struct sbic_softc *dev, char *addr, int count, int flags) 221 { 222 223 /* 224 * Set up the command word based on flags 225 */ 226 if ((flags & DMAGO_READ) == 0) 227 dev->sc_dmacmd = DMAC_CSR_ENABLE | DMAC_CSR_WRITE; 228 else 229 dev->sc_dmacmd = DMAC_CSR_ENABLE; 230 231 dev->sc_flags |= SBICF_INTR; 232 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 233 234 /* 235 * Prime the hardware. 236 * Note, it's probably not necessary to do this here, since dmanext 237 * is called just prior to the actual transfer. 238 */ 239 pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0); 240 pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, 241 dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR); 242 pcc_reg_write32(sys_pcc, PCCREG_DMA_DATA_ADDR, 243 (uint32_t) dev->sc_cur->dc_addr); 244 pcc_reg_write32(sys_pcc, PCCREG_DMA_BYTE_COUNT, 245 (uint32_t) dev->sc_tcnt | (1 << 24)); 246 pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, dev->sc_dmacmd); 247 248 return dev->sc_tcnt; 249 } 250 251 /* 252 * Prime the hardware for the next DMA transfer 253 */ 254 int 255 wdsc_dmanext(struct sbic_softc *dev) 256 { 257 258 if (dev->sc_cur > dev->sc_last) { 259 /* 260 * Shouldn't happen !! 261 */ 262 printf("wdsc_dmanext at end !!!\n"); 263 wdsc_dmastop(dev); 264 return 0; 265 } 266 267 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 268 269 /* 270 * Load the next DMA address 271 */ 272 pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0); 273 pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, 274 dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR); 275 pcc_reg_write32(sys_pcc, PCCREG_DMA_DATA_ADDR, 276 (uint32_t) dev->sc_cur->dc_addr); 277 pcc_reg_write32(sys_pcc, PCCREG_DMA_BYTE_COUNT, 278 (uint32_t) dev->sc_tcnt | (1 << 24)); 279 pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, dev->sc_dmacmd); 280 281 return dev->sc_tcnt; 282 } 283 284 /* 285 * Stop DMA, and disable interrupts 286 */ 287 void 288 wdsc_dmastop(struct sbic_softc *dev) 289 { 290 int s; 291 292 s = splbio(); 293 294 pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0); 295 pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, dev->sc_ipl | PCC_ICLEAR); 296 297 splx(s); 298 } 299 300 /* 301 * Come here following a DMA interrupt 302 */ 303 int 304 wdsc_dmaintr(void *arg) 305 { 306 struct sbic_softc *dev = arg; 307 int found = 0; 308 309 /* 310 * Really a DMA interrupt? 311 */ 312 if ((pcc_reg_read(sys_pcc, PCCREG_DMA_INTR_CTRL) & 0x80) == 0) 313 return 0; 314 315 /* 316 * Was it a completion interrupt? 317 * XXXSCW Note: Support for other DMA interrupts is required, 318 * eg. buserr 319 */ 320 if (pcc_reg_read(sys_pcc, PCCREG_DMA_CONTROL) & DMAC_CSR_DONE) { 321 ++found; 322 323 pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, 324 dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR); 325 } 326 327 return found; 328 } 329 330 /* 331 * Come here for SCSI interrupts 332 */ 333 int 334 wdsc_scsiintr(void *arg) 335 { 336 struct sbic_softc *dev = arg; 337 int found; 338 339 /* 340 * Really a SCSI interrupt? 341 */ 342 if ((pcc_reg_read(sys_pcc, PCCREG_SCSI_INTR_CTRL) & 0x80) == 0) 343 return 0; 344 345 /* 346 * Go handle it 347 */ 348 found = sbicintr(dev); 349 350 /* 351 * Acknowledge and clear the interrupt 352 */ 353 pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL, 354 dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR); 355 356 return found; 357 } 358
Indexes created Tue Sep 30 20:09:53 GMT 2025