bus_space.h revision 1.5 1 1.5 scw /* $NetBSD: bus_space.h,v 1.5 2000/03/18 22:33:05 scw Exp $ */
2 1.2 scw
3 1.2 scw /*-
4 1.2 scw * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.2 scw * All rights reserved.
6 1.2 scw *
7 1.2 scw * This code is derived from software contributed to The NetBSD Foundation
8 1.2 scw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.2 scw * NASA Ames Research Center.
10 1.2 scw *
11 1.2 scw * Redistribution and use in source and binary forms, with or without
12 1.2 scw * modification, are permitted provided that the following conditions
13 1.2 scw * are met:
14 1.2 scw * 1. Redistributions of source code must retain the above copyright
15 1.2 scw * notice, this list of conditions and the following disclaimer.
16 1.2 scw * 2. Redistributions in binary form must reproduce the above copyright
17 1.2 scw * notice, this list of conditions and the following disclaimer in the
18 1.2 scw * documentation and/or other materials provided with the distribution.
19 1.2 scw * 3. All advertising materials mentioning features or use of this software
20 1.2 scw * must display the following acknowledgement:
21 1.2 scw * This product includes software developed by the NetBSD
22 1.2 scw * Foundation, Inc. and its contributors.
23 1.2 scw * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.2 scw * contributors may be used to endorse or promote products derived
25 1.2 scw * from this software without specific prior written permission.
26 1.2 scw *
27 1.2 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.2 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.2 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.2 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.2 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.2 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.2 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.2 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.2 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.2 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.2 scw * POSSIBILITY OF SUCH DAMAGE.
38 1.2 scw */
39 1.2 scw
40 1.2 scw /*
41 1.2 scw * Copyright (C) 1997 Scott Reynolds. All rights reserved.
42 1.2 scw *
43 1.2 scw * Redistribution and use in source and binary forms, with or without
44 1.2 scw * modification, are permitted provided that the following conditions
45 1.2 scw * are met:
46 1.2 scw * 1. Redistributions of source code must retain the above copyright
47 1.2 scw * notice, this list of conditions and the following disclaimer.
48 1.2 scw * 2. Redistributions in binary form must reproduce the above copyright
49 1.2 scw * notice, this list of conditions and the following disclaimer in the
50 1.2 scw * documentation and/or other materials provided with the distribution.
51 1.2 scw * 3. The name of the author may not be used to endorse or promote products
52 1.2 scw * derived from this software without specific prior written permission
53 1.2 scw *
54 1.2 scw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
55 1.2 scw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
56 1.2 scw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
57 1.2 scw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
58 1.2 scw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
59 1.2 scw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 1.2 scw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 1.2 scw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 1.2 scw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
63 1.2 scw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 1.2 scw */
65 1.2 scw
66 1.2 scw /*
67 1.2 scw * Lifted from the Next68k port.
68 1.2 scw * Modified for mvme68k by Steve Woodford.
69 1.2 scw *
70 1.2 scw * TODO: Support for VMEbus...
71 1.2 scw * (Do any existing VME card drivers use bus_space_* ?)
72 1.2 scw */
73 1.2 scw
74 1.2 scw #ifndef _MVME68K_BUS_SPACE_H_
75 1.2 scw #define _MVME68K_BUS_SPACE_H_
76 1.2 scw /*
77 1.2 scw * Addresses (in bus space).
78 1.2 scw */
79 1.2 scw typedef u_long bus_addr_t;
80 1.2 scw typedef u_long bus_size_t;
81 1.2 scw
82 1.2 scw /*
83 1.2 scw * Access methods for bus resources and address space.
84 1.2 scw */
85 1.5 scw typedef int bus_space_tag_t;
86 1.2 scw typedef u_long bus_space_handle_t;
87 1.2 scw
88 1.2 scw /*
89 1.2 scw * Value for the mvme68k bus space tag, not to be used directly by MI code.
90 1.2 scw */
91 1.5 scw #define MVME68K_INTIO_BUS_SPACE 0
92 1.5 scw #define MVME68K_VME_BUS_SPACE 1
93 1.2 scw
94 1.2 scw /*
95 1.5 scw * int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr,
96 1.5 scw * bus_size_t size, int flags, bus_space_handle_t *bshp));
97 1.5 scw *
98 1.5 scw * Map a region of bus space.
99 1.2 scw */
100 1.5 scw int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t,
101 1.5 scw int, bus_space_handle_t *));
102 1.2 scw
103 1.5 scw /*
104 1.5 scw * Possible values for the 'flags' parameter of bus_space_map()
105 1.5 scw */
106 1.2 scw #define BUS_SPACE_MAP_CACHEABLE 0x01
107 1.2 scw #define BUS_SPACE_MAP_LINEAR 0x02
108 1.4 drochner #define BUS_SPACE_MAP_PREFETCHABLE 0x04
109 1.5 scw
110 1.5 scw /*
111 1.5 scw * void bus_space_unmap __P((bus_space_tag_t t,
112 1.5 scw * bus_space_handle_t bsh, bus_size_t size));
113 1.5 scw *
114 1.5 scw * Unmap a region of bus space.
115 1.5 scw */
116 1.5 scw void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
117 1.5 scw
118 1.5 scw #define bus_space_subregion(t, h, o, s, hp) \
119 1.5 scw (*(hp)=(h)+(o))
120 1.2 scw
121 1.2 scw /*
122 1.2 scw * Allocation and deallocation operations.
123 1.2 scw */
124 1.2 scw #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
125 1.2 scw (-1)
126 1.2 scw
127 1.2 scw #define bus_space_free(t, h, s)
128 1.2 scw
129 1.2 scw /*
130 1.2 scw * u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
131 1.2 scw * bus_space_handle_t bsh, bus_size_t offset));
132 1.2 scw *
133 1.2 scw * Read a 1, 2, 4, or 8 byte quantity from bus space
134 1.2 scw * described by tag/handle/offset.
135 1.2 scw */
136 1.2 scw
137 1.2 scw #define bus_space_read_1(t, h, o) \
138 1.2 scw ((void) t, (*(volatile u_int8_t *)((h) + (o))))
139 1.2 scw
140 1.2 scw #define bus_space_read_2(t, h, o) \
141 1.2 scw ((void) t, (*(volatile u_int16_t *)((h) + (o))))
142 1.2 scw
143 1.2 scw #define bus_space_read_4(t, h, o) \
144 1.2 scw ((void) t, (*(volatile u_int32_t *)((h) + (o))))
145 1.2 scw
146 1.2 scw #if 0 /* Cause a link error for bus_space_read_8 */
147 1.2 scw #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
148 1.2 scw #endif
149 1.2 scw
150 1.2 scw /*
151 1.2 scw * void bus_space_read_multi_N __P((bus_space_tag_t tag,
152 1.2 scw * bus_space_handle_t bsh, bus_size_t offset,
153 1.2 scw * u_intN_t *addr, size_t count));
154 1.2 scw *
155 1.2 scw * Read `count' 1, 2, 4, or 8 byte quantities from bus space
156 1.2 scw * described by tag/handle/offset and copy into buffer provided.
157 1.2 scw */
158 1.2 scw
159 1.2 scw #define bus_space_read_multi_1(t, h, o, a, c) do { \
160 1.2 scw (void) t; \
161 1.2 scw __asm __volatile (" \
162 1.2 scw movl %0,a0 ; \
163 1.2 scw movl %1,a1 ; \
164 1.2 scw movl %2,d0 ; \
165 1.2 scw 1: movb a0@,a1@+ ; \
166 1.2 scw subql #1,d0 ; \
167 1.2 scw jne 1b" : \
168 1.2 scw : \
169 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
170 1.2 scw "a0","a1","d0"); \
171 1.2 scw } while (0);
172 1.2 scw
173 1.2 scw #define bus_space_read_multi_2(t, h, o, a, c) do { \
174 1.2 scw (void) t; \
175 1.2 scw __asm __volatile (" \
176 1.2 scw movl %0,a0 ; \
177 1.2 scw movl %1,a1 ; \
178 1.2 scw movl %2,d0 ; \
179 1.2 scw 1: movw a0@,a1@+ ; \
180 1.2 scw subql #1,d0 ; \
181 1.2 scw jne 1b" : \
182 1.2 scw : \
183 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
184 1.2 scw "a0","a1","d0"); \
185 1.2 scw } while (0);
186 1.2 scw
187 1.2 scw #define bus_space_read_multi_4(t, h, o, a, c) do { \
188 1.2 scw (void) t; \
189 1.2 scw __asm __volatile (" \
190 1.2 scw movl %0,a0 ; \
191 1.2 scw movl %1,a1 ; \
192 1.2 scw movl %2,d0 ; \
193 1.2 scw 1: movl a0@,a1@+ ; \
194 1.2 scw subql #1,d0 ; \
195 1.2 scw jne 1b" : \
196 1.2 scw : \
197 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
198 1.2 scw "a0","a1","d0"); \
199 1.2 scw } while (0);
200 1.2 scw
201 1.2 scw #if 0 /* Cause a link error for bus_space_read_multi_8 */
202 1.2 scw #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
203 1.2 scw #endif
204 1.2 scw
205 1.2 scw /*
206 1.2 scw * void bus_space_read_region_N __P((bus_space_tag_t tag,
207 1.2 scw * bus_space_handle_t bsh, bus_size_t offset,
208 1.2 scw * u_intN_t *addr, size_t count));
209 1.2 scw *
210 1.2 scw * Read `count' 1, 2, 4, or 8 byte quantities from bus space
211 1.2 scw * described by tag/handle and starting at `offset' and copy into
212 1.2 scw * buffer provided.
213 1.2 scw */
214 1.2 scw
215 1.2 scw #define bus_space_read_region_1(t, h, o, a, c) do { \
216 1.2 scw (void) t; \
217 1.2 scw __asm __volatile (" \
218 1.2 scw movl %0,a0 ; \
219 1.2 scw movl %1,a1 ; \
220 1.2 scw movl %2,d0 ; \
221 1.2 scw 1: movb a0@+,a1@+ ; \
222 1.2 scw subql #1,d0 ; \
223 1.2 scw jne 1b" : \
224 1.2 scw : \
225 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
226 1.2 scw "a0","a1","d0"); \
227 1.2 scw } while (0);
228 1.2 scw
229 1.2 scw #define bus_space_read_region_2(t, h, o, a, c) do { \
230 1.2 scw (void) t; \
231 1.2 scw __asm __volatile (" \
232 1.2 scw movl %0,a0 ; \
233 1.2 scw movl %1,a1 ; \
234 1.2 scw movl %2,d0 ; \
235 1.2 scw 1: movw a0@+,a1@+ ; \
236 1.2 scw subql #1,d0 ; \
237 1.2 scw jne 1b" : \
238 1.2 scw : \
239 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
240 1.2 scw "a0","a1","d0"); \
241 1.2 scw } while (0);
242 1.2 scw
243 1.2 scw #define bus_space_read_region_4(t, h, o, a, c) do { \
244 1.2 scw (void) t; \
245 1.2 scw __asm __volatile (" \
246 1.2 scw movl %0,a0 ; \
247 1.2 scw movl %1,a1 ; \
248 1.2 scw movl %2,d0 ; \
249 1.2 scw 1: movl a0@+,a1@+ ; \
250 1.2 scw subql #1,d0 ; \
251 1.2 scw jne 1b" : \
252 1.2 scw : \
253 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
254 1.2 scw "a0","a1","d0"); \
255 1.2 scw } while (0);
256 1.2 scw
257 1.2 scw #if 0 /* Cause a link error for bus_space_read_region_8 */
258 1.2 scw #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
259 1.2 scw #endif
260 1.2 scw
261 1.2 scw /*
262 1.2 scw * void bus_space_write_N __P((bus_space_tag_t tag,
263 1.2 scw * bus_space_handle_t bsh, bus_size_t offset,
264 1.2 scw * u_intN_t value));
265 1.2 scw *
266 1.2 scw * Write the 1, 2, 4, or 8 byte value `value' to bus space
267 1.2 scw * described by tag/handle/offset.
268 1.2 scw */
269 1.2 scw
270 1.2 scw #define bus_space_write_1(t, h, o, v) \
271 1.2 scw ((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))))
272 1.2 scw
273 1.2 scw #define bus_space_write_2(t, h, o, v) \
274 1.2 scw ((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))))
275 1.2 scw
276 1.2 scw #define bus_space_write_4(t, h, o, v) \
277 1.2 scw ((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))))
278 1.2 scw
279 1.2 scw #if 0 /* Cause a link error for bus_space_write_8 */
280 1.2 scw #define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
281 1.2 scw #endif
282 1.2 scw
283 1.2 scw /*
284 1.2 scw * void bus_space_write_multi_N __P((bus_space_tag_t tag,
285 1.2 scw * bus_space_handle_t bsh, bus_size_t offset,
286 1.2 scw * const u_intN_t *addr, size_t count));
287 1.2 scw *
288 1.2 scw * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
289 1.2 scw * provided to bus space described by tag/handle/offset.
290 1.2 scw */
291 1.2 scw
292 1.2 scw #define bus_space_write_multi_1(t, h, o, a, c) do { \
293 1.2 scw (void) t; \
294 1.2 scw __asm __volatile (" \
295 1.2 scw movl %0,a0 ; \
296 1.2 scw movl %1,a1 ; \
297 1.2 scw movl %2,d0 ; \
298 1.2 scw 1: movb a1@+,a0@ ; \
299 1.2 scw subql #1,d0 ; \
300 1.2 scw jne 1b" : \
301 1.2 scw : \
302 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
303 1.2 scw "a0","a1","d0"); \
304 1.2 scw } while (0);
305 1.2 scw
306 1.2 scw #define bus_space_write_multi_2(t, h, o, a, c) do { \
307 1.2 scw (void) t; \
308 1.2 scw __asm __volatile (" \
309 1.2 scw movl %0,a0 ; \
310 1.2 scw movl %1,a1 ; \
311 1.2 scw movl %2,d0 ; \
312 1.2 scw 1: movw a1@+,a0@ ; \
313 1.2 scw subql #1,d0 ; \
314 1.2 scw jne 1b" : \
315 1.2 scw : \
316 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
317 1.2 scw "a0","a1","d0"); \
318 1.2 scw } while (0);
319 1.2 scw
320 1.2 scw #define bus_space_write_multi_4(t, h, o, a, c) do { \
321 1.2 scw (void) t; \
322 1.2 scw __asm __volatile (" \
323 1.2 scw movl %0,a0 ; \
324 1.2 scw movl %1,a1 ; \
325 1.2 scw movl %2,d0 ; \
326 1.2 scw 1: movl a1@+,a0@ ; \
327 1.2 scw subql #1,d0 ; \
328 1.2 scw jne 1b" : \
329 1.2 scw : \
330 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
331 1.2 scw "a0","a1","d0"); \
332 1.2 scw } while (0);
333 1.2 scw
334 1.2 scw #if 0 /* Cause a link error for bus_space_write_8 */
335 1.2 scw #define bus_space_write_multi_8(t, h, o, a, c) \
336 1.2 scw !!! bus_space_write_multi_8 unimplimented !!!
337 1.2 scw #endif
338 1.2 scw
339 1.2 scw /*
340 1.2 scw * void bus_space_write_region_N __P((bus_space_tag_t tag,
341 1.2 scw * bus_space_handle_t bsh, bus_size_t offset,
342 1.2 scw * const u_intN_t *addr, size_t count));
343 1.2 scw *
344 1.2 scw * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
345 1.2 scw * to bus space described by tag/handle starting at `offset'.
346 1.2 scw */
347 1.2 scw
348 1.2 scw #define bus_space_write_region_1(t, h, o, a, c) do { \
349 1.2 scw (void) t; \
350 1.2 scw __asm __volatile (" \
351 1.2 scw movl %0,a0 ; \
352 1.2 scw movl %1,a1 ; \
353 1.2 scw movl %2,d0 ; \
354 1.2 scw 1: movb a1@+,a0@+ ; \
355 1.2 scw subql #1,d0 ; \
356 1.2 scw jne 1b" : \
357 1.2 scw : \
358 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
359 1.2 scw "a0","a1","d0"); \
360 1.2 scw } while (0);
361 1.2 scw
362 1.2 scw #define bus_space_write_region_2(t, h, o, a, c) do { \
363 1.2 scw (void) t; \
364 1.2 scw __asm __volatile (" \
365 1.2 scw movl %0,a0 ; \
366 1.2 scw movl %1,a1 ; \
367 1.2 scw movl %2,d0 ; \
368 1.2 scw 1: movw a1@+,a0@+ ; \
369 1.2 scw subql #1,d0 ; \
370 1.2 scw jne 1b" : \
371 1.2 scw : \
372 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
373 1.2 scw "a0","a1","d0"); \
374 1.2 scw } while (0);
375 1.2 scw
376 1.2 scw #define bus_space_write_region_4(t, h, o, a, c) do { \
377 1.2 scw (void) t; \
378 1.2 scw __asm __volatile (" \
379 1.2 scw movl %0,a0 ; \
380 1.2 scw movl %1,a1 ; \
381 1.2 scw movl %2,d0 ; \
382 1.2 scw 1: movl a1@+,a0@+ ; \
383 1.2 scw subql #1,d0 ; \
384 1.2 scw jne 1b" : \
385 1.2 scw : \
386 1.2 scw "r" ((h) + (o)), "g" (a), "g" (c) : \
387 1.2 scw "a0","a1","d0"); \
388 1.2 scw } while (0);
389 1.2 scw
390 1.2 scw #if 0 /* Cause a link error for bus_space_write_region_8 */
391 1.2 scw #define bus_space_write_region_8 \
392 1.2 scw !!! bus_space_write_region_8 unimplemented !!!
393 1.2 scw #endif
394 1.2 scw
395 1.2 scw /*
396 1.2 scw * void bus_space_set_multi_N __P((bus_space_tag_t tag,
397 1.2 scw * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
398 1.2 scw * size_t count));
399 1.2 scw *
400 1.2 scw * Write the 1, 2, 4, or 8 byte value `val' to bus space described
401 1.2 scw * by tag/handle/offset `count' times.
402 1.2 scw */
403 1.2 scw
404 1.2 scw #define bus_space_set_multi_1(t, h, o, val, c) do { \
405 1.2 scw (void) t; \
406 1.2 scw __asm __volatile (" \
407 1.2 scw movl %0,a0 ; \
408 1.2 scw movl %1,d1 ; \
409 1.2 scw movl %2,d0 ; \
410 1.2 scw 1: movb d1,a0@ ; \
411 1.2 scw subql #1,d0 ; \
412 1.2 scw jne 1b" : \
413 1.2 scw : \
414 1.2 scw "r" ((h) + (o)), "g" (val), "g" (c) : \
415 1.2 scw "a0","d0","d1"); \
416 1.2 scw } while (0);
417 1.2 scw
418 1.2 scw #define bus_space_set_multi_2(t, h, o, val, c) do { \
419 1.2 scw (void) t; \
420 1.2 scw __asm __volatile (" \
421 1.2 scw movl %0,a0 ; \
422 1.2 scw movl %1,d1 ; \
423 1.2 scw movl %2,d0 ; \
424 1.2 scw 1: movw d1,a0@ ; \
425 1.2 scw subql #1,d0 ; \
426 1.2 scw jne 1b" : \
427 1.2 scw : \
428 1.2 scw "r" ((h) + (o)), "g" (val), "g" (c) : \
429 1.2 scw "a0","d0","d1"); \
430 1.2 scw } while (0);
431 1.2 scw
432 1.2 scw #define bus_space_set_multi_4(t, h, o, val, c) do { \
433 1.2 scw (void) t; \
434 1.2 scw __asm __volatile (" \
435 1.2 scw movl %0,a0 ; \
436 1.2 scw movl %1,d1 ; \
437 1.2 scw movl %2,d0 ; \
438 1.2 scw 1: movl d1,a0@ ; \
439 1.2 scw subql #1,d0 ; \
440 1.2 scw jne 1b" : \
441 1.2 scw : \
442 1.2 scw "r" ((h) + (o)), "g" (val), "g" (c) : \
443 1.2 scw "a0","d0","d1"); \
444 1.2 scw } while (0);
445 1.2 scw
446 1.2 scw #if 0 /* Cause a link error for bus_space_set_multi_8 */
447 1.2 scw #define bus_space_set_multi_8 \
448 1.2 scw !!! bus_space_set_multi_8 unimplemented !!!
449 1.2 scw #endif
450 1.2 scw
451 1.2 scw /*
452 1.2 scw * void bus_space_set_region_N __P((bus_space_tag_t tag,
453 1.2 scw * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
454 1.2 scw * size_t count));
455 1.2 scw *
456 1.2 scw * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
457 1.2 scw * by tag/handle starting at `offset'.
458 1.2 scw */
459 1.2 scw
460 1.2 scw #define bus_space_set_region_1(t, h, o, val, c) do { \
461 1.2 scw (void) t; \
462 1.2 scw __asm __volatile (" \
463 1.2 scw movl %0,a0 ; \
464 1.2 scw movl %1,d1 ; \
465 1.2 scw movl %2,d0 ; \
466 1.2 scw 1: movb d1,a0@+ ; \
467 1.2 scw subql #1,d0 ; \
468 1.2 scw jne 1b" : \
469 1.2 scw : \
470 1.2 scw "r" ((h) + (o)), "g" (val), "g" (c) : \
471 1.2 scw "a0","d0","d1"); \
472 1.2 scw } while (0);
473 1.2 scw
474 1.2 scw #define bus_space_set_region_2(t, h, o, val, c) do { \
475 1.2 scw (void) t; \
476 1.2 scw __asm __volatile (" \
477 1.2 scw movl %0,a0 ; \
478 1.2 scw movl %1,d1 ; \
479 1.2 scw movl %2,d0 ; \
480 1.2 scw 1: movw d1,a0@+ ; \
481 1.2 scw subql #1,d0 ; \
482 1.2 scw jne 1b" : \
483 1.2 scw : \
484 1.2 scw "r" ((h) + (o)), "g" (val), "g" (c) : \
485 1.2 scw "a0","d0","d1"); \
486 1.2 scw } while (0);
487 1.2 scw
488 1.2 scw #define bus_space_set_region_4(t, h, o, val, c) do { \
489 1.2 scw (void) t; \
490 1.2 scw __asm __volatile (" \
491 1.2 scw movl %0,a0 ; \
492 1.2 scw movl %1,d1 ; \
493 1.2 scw movl %2,d0 ; \
494 1.2 scw 1: movl d1,a0@+ ; \
495 1.2 scw subql #1,d0 ; \
496 1.2 scw jne 1b" : \
497 1.2 scw : \
498 1.2 scw "r" ((h) + (o)), "g" (val), "g" (c) : \
499 1.2 scw "a0","d0","d1"); \
500 1.2 scw } while (0);
501 1.2 scw
502 1.2 scw #if 0 /* Cause a link error for bus_space_set_region_8 */
503 1.2 scw #define bus_space_set_region_8 \
504 1.2 scw !!! bus_space_set_region_8 unimplemented !!!
505 1.2 scw #endif
506 1.2 scw
507 1.2 scw /*
508 1.2 scw * void bus_space_copy_N __P((bus_space_tag_t tag,
509 1.2 scw * bus_space_handle_t bsh1, bus_size_t off1,
510 1.2 scw * bus_space_handle_t bsh2, bus_size_t off2,
511 1.2 scw * size_t count));
512 1.2 scw *
513 1.2 scw * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
514 1.2 scw * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
515 1.2 scw */
516 1.2 scw
517 1.2 scw #define __MVME68K_copy_region_N(BYTES) \
518 1.2 scw static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
519 1.2 scw __P((bus_space_tag_t, \
520 1.2 scw bus_space_handle_t bsh1, bus_size_t off1, \
521 1.2 scw bus_space_handle_t bsh2, bus_size_t off2, \
522 1.2 scw bus_size_t count)); \
523 1.2 scw \
524 1.2 scw static __inline void \
525 1.2 scw __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \
526 1.2 scw bus_space_tag_t t; \
527 1.2 scw bus_space_handle_t h1, h2; \
528 1.2 scw bus_size_t o1, o2, c; \
529 1.2 scw { \
530 1.2 scw bus_size_t o; \
531 1.2 scw \
532 1.2 scw if ((h1 + o1) >= (h2 + o2)) { \
533 1.2 scw /* src after dest: copy forward */ \
534 1.2 scw for (o = 0; c != 0; c--, o += BYTES) \
535 1.2 scw __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
536 1.2 scw __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
537 1.2 scw } else { \
538 1.2 scw /* dest after src: copy backwards */ \
539 1.2 scw for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
540 1.2 scw __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
541 1.2 scw __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
542 1.2 scw } \
543 1.2 scw }
544 1.2 scw __MVME68K_copy_region_N(1)
545 1.2 scw __MVME68K_copy_region_N(2)
546 1.2 scw __MVME68K_copy_region_N(4)
547 1.2 scw #if 0 /* Cause a link error for bus_space_copy_8 */
548 1.2 scw #define bus_space_copy_8 \
549 1.2 scw !!! bus_space_copy_8 unimplemented !!!
550 1.2 scw #endif
551 1.2 scw
552 1.2 scw #undef __MVME68K_copy_region_N
553 1.2 scw
554 1.2 scw /*
555 1.2 scw * Bus read/write barrier methods.
556 1.2 scw *
557 1.2 scw * void bus_space_barrier __P((bus_space_tag_t tag,
558 1.2 scw * bus_space_handle_t bsh, bus_size_t offset,
559 1.2 scw * bus_size_t len, int flags));
560 1.2 scw *
561 1.2 scw * Note: the 680x0 does not currently require barriers, but we must
562 1.2 scw * provide the flags to MI code.
563 1.2 scw */
564 1.2 scw #define bus_space_barrier(t, h, o, l, f) \
565 1.2 scw ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
566 1.2 scw #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
567 1.2 scw #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
568 1.3 drochner
569 1.3 drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
570 1.2 scw
571 1.2 scw #endif /* _MVME68K_BUS_SPACE_H_ */
572