cpu.h revision 1.24.8.4 1 1.24.8.4 thorpej /* $NetBSD: cpu.h,v 1.24.8.4 2001/12/08 08:22:42 thorpej Exp $ */
2 1.24.8.2 scw
3 1.24.8.2 scw /*
4 1.24.8.2 scw * Copyright (c) 1988 University of Utah.
5 1.24.8.2 scw * Copyright (c) 1982, 1990, 1993
6 1.24.8.2 scw * The Regents of the University of California. All rights reserved.
7 1.24.8.2 scw *
8 1.24.8.2 scw * This code is derived from software contributed to Berkeley by
9 1.24.8.2 scw * the Systems Programming Group of the University of Utah Computer
10 1.24.8.2 scw * Science Department.
11 1.24.8.2 scw *
12 1.24.8.2 scw * Redistribution and use in source and binary forms, with or without
13 1.24.8.2 scw * modification, are permitted provided that the following conditions
14 1.24.8.2 scw * are met:
15 1.24.8.2 scw * 1. Redistributions of source code must retain the above copyright
16 1.24.8.2 scw * notice, this list of conditions and the following disclaimer.
17 1.24.8.2 scw * 2. Redistributions in binary form must reproduce the above copyright
18 1.24.8.2 scw * notice, this list of conditions and the following disclaimer in the
19 1.24.8.2 scw * documentation and/or other materials provided with the distribution.
20 1.24.8.2 scw * 3. All advertising materials mentioning features or use of this software
21 1.24.8.2 scw * must display the following acknowledgement:
22 1.24.8.2 scw * This product includes software developed by the University of
23 1.24.8.2 scw * California, Berkeley and its contributors.
24 1.24.8.2 scw * 4. Neither the name of the University nor the names of its contributors
25 1.24.8.2 scw * may be used to endorse or promote products derived from this software
26 1.24.8.2 scw * without specific prior written permission.
27 1.24.8.2 scw *
28 1.24.8.2 scw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.24.8.2 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.24.8.2 scw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.24.8.2 scw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.24.8.2 scw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.24.8.2 scw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.24.8.2 scw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.24.8.2 scw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.24.8.2 scw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.24.8.2 scw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.24.8.2 scw * SUCH DAMAGE.
39 1.24.8.2 scw *
40 1.24.8.2 scw * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 1.24.8.2 scw *
42 1.24.8.2 scw * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 1.24.8.2 scw */
44 1.24.8.2 scw
45 1.24.8.2 scw #ifndef _MACHINE_CPU_H_
46 1.24.8.2 scw #define _MACHINE_CPU_H_
47 1.24.8.2 scw
48 1.24.8.2 scw /*
49 1.24.8.2 scw * Exported definitions unique to mvme68k/68k cpu support.
50 1.24.8.2 scw */
51 1.24.8.2 scw
52 1.24.8.2 scw #if defined(_KERNEL_OPT)
53 1.24.8.2 scw #include "opt_lockdebug.h"
54 1.24.8.2 scw #endif
55 1.24.8.2 scw
56 1.24.8.2 scw /*
57 1.24.8.2 scw * Get common m68k CPU definitions.
58 1.24.8.2 scw */
59 1.24.8.2 scw #include <m68k/cpu.h>
60 1.24.8.2 scw #define M68K_MMU_MOTOROLA
61 1.24.8.2 scw
62 1.24.8.2 scw #include <sys/sched.h>
63 1.24.8.2 scw struct cpu_info {
64 1.24.8.2 scw struct schedstate_percpu ci_schedstate; /* scheduler state */
65 1.24.8.2 scw #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
66 1.24.8.2 scw u_long ci_spin_locks; /* # of spin locks held */
67 1.24.8.2 scw u_long ci_simple_locks; /* # of simple locks held */
68 1.24.8.2 scw #endif
69 1.24.8.2 scw };
70 1.24.8.2 scw
71 1.24.8.2 scw #ifdef _KERNEL
72 1.24.8.2 scw extern struct cpu_info cpu_info_store;
73 1.24.8.2 scw
74 1.24.8.2 scw #define curcpu() (&cpu_info_store)
75 1.24.8.2 scw
76 1.24.8.2 scw /*
77 1.24.8.2 scw * definitions of cpu-dependent requirements
78 1.24.8.2 scw * referenced in generic code
79 1.24.8.2 scw */
80 1.24.8.2 scw #define cpu_swapin(p) /* nothing */
81 1.24.8.2 scw #define cpu_wait(p) /* nothing */
82 1.24.8.2 scw #define cpu_swapout(p) /* nothing */
83 1.24.8.2 scw #define cpu_number() 0
84 1.24.8.4 thorpej #define cpu_proc_fork(p1, p2) /* nothing */
85 1.24.8.2 scw
86 1.24.8.2 scw /*
87 1.24.8.2 scw * Arguments to hardclock and gatherstats encapsulate the previous
88 1.24.8.2 scw * machine state in an opaque clockframe. One the mvme68k, we use
89 1.24.8.2 scw * what the hardware pushes on an interrupt (frame format 0).
90 1.24.8.2 scw */
91 1.24.8.2 scw struct clockframe {
92 1.24.8.2 scw u_short sr; /* sr at time of interrupt */
93 1.24.8.2 scw u_long pc; /* pc at time of interrupt */
94 1.24.8.2 scw u_short fmt:4,
95 1.24.8.2 scw vec:12; /* vector offset (4-word frame) */
96 1.24.8.2 scw } __attribute__((packed));
97 1.24.8.2 scw
98 1.24.8.2 scw #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
99 1.24.8.2 scw #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
100 1.24.8.2 scw #define CLKF_PC(framep) ((framep)->pc)
101 1.24.8.2 scw
102 1.24.8.2 scw /*
103 1.24.8.2 scw * The clock interrupt handler can determine if it's a nested
104 1.24.8.2 scw * interrupt by checking for interrupt_depth > 1.
105 1.24.8.2 scw * (Remember, the clock interrupt handler itself will cause the
106 1.24.8.2 scw * depth counter to be incremented).
107 1.24.8.2 scw */
108 1.24.8.2 scw extern volatile unsigned int interrupt_depth;
109 1.24.8.2 scw #define CLKF_INTR(framep) (interrupt_depth > 1)
110 1.24.8.2 scw
111 1.24.8.2 scw
112 1.24.8.2 scw /*
113 1.24.8.2 scw * Preempt the current process if in interrupt from user mode,
114 1.24.8.2 scw * or after the current trap/syscall if in system mode.
115 1.24.8.2 scw */
116 1.24.8.2 scw extern int want_resched; /* resched() was called */
117 1.24.8.2 scw #define need_resched(ci) { want_resched++; aston(); }
118 1.24.8.2 scw
119 1.24.8.2 scw /*
120 1.24.8.2 scw * Give a profiling tick to the current process when the user profiling
121 1.24.8.2 scw * buffer pages are invalid. On the hp300, request an ast to send us
122 1.24.8.2 scw * through trap, marking the proc as needing a profiling tick.
123 1.24.8.2 scw */
124 1.24.8.2 scw #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
125 1.24.8.2 scw
126 1.24.8.2 scw /*
127 1.24.8.2 scw * Notify the current process (p) that it has a signal pending,
128 1.24.8.2 scw * process as soon as possible.
129 1.24.8.2 scw */
130 1.24.8.2 scw #define signotify(p) aston()
131 1.24.8.2 scw
132 1.24.8.2 scw extern int astpending; /* need to trap before returning to user mode */
133 1.24.8.2 scw #define aston() (astpending++)
134 1.24.8.2 scw
135 1.24.8.2 scw #endif /* _KERNEL */
136 1.24.8.2 scw
137 1.24.8.2 scw /*
138 1.24.8.2 scw * CTL_MACHDEP definitions.
139 1.24.8.2 scw */
140 1.24.8.2 scw #define CPU_CONSDEV 1 /* dev_t: console terminal device */
141 1.24.8.2 scw #define CPU_MAXID 2 /* number of valid machdep ids */
142 1.24.8.2 scw
143 1.24.8.2 scw #define CTL_MACHDEP_NAMES { \
144 1.24.8.2 scw { 0, 0 }, \
145 1.24.8.2 scw { "console_device", CTLTYPE_STRUCT }, \
146 1.24.8.2 scw }
147 1.24.8.2 scw
148 1.24.8.2 scw #ifdef _KERNEL
149 1.24.8.2 scw /*
150 1.24.8.2 scw * Associate MVME models with CPU types.
151 1.24.8.2 scw */
152 1.24.8.2 scw
153 1.24.8.2 scw /*
154 1.24.8.2 scw * MVME-147; 68030 CPU
155 1.24.8.2 scw */
156 1.24.8.2 scw #if defined(MVME147) && !defined(M68030)
157 1.24.8.2 scw #define M68030
158 1.24.8.2 scw #endif
159 1.24.8.2 scw
160 1.24.8.2 scw /*
161 1.24.8.2 scw * MVME-162/166/167; 68040 CPU
162 1.24.8.2 scw */
163 1.24.8.2 scw #if (defined(MVME162) || defined(MVME167)) && !defined(M68040)
164 1.24.8.2 scw #define M68040
165 1.24.8.2 scw #endif
166 1.24.8.2 scw
167 1.24.8.2 scw /*
168 1.24.8.2 scw * MVME-172/177; 68060 CPU
169 1.24.8.2 scw */
170 1.24.8.2 scw #if (defined(MVME172) || defined(MVME177)) && !defined(M68060)
171 1.24.8.2 scw #define M68060
172 1.24.8.2 scw #endif
173 1.24.8.2 scw #endif /* _KERNEL */
174 1.24.8.2 scw
175 1.24.8.2 scw /*
176 1.24.8.2 scw * Values for machineid; these match the Bug's values.
177 1.24.8.2 scw */
178 1.24.8.2 scw #define MVME_147 0x147
179 1.24.8.2 scw #define MVME_162 0x162
180 1.24.8.2 scw #define MVME_166 0x166
181 1.24.8.2 scw #define MVME_167 0x167
182 1.24.8.2 scw #define MVME_172 0x172
183 1.24.8.2 scw #define MVME_177 0x177
184 1.24.8.2 scw
185 1.24.8.2 scw #ifdef _KERNEL
186 1.24.8.2 scw extern int machineid;
187 1.24.8.2 scw extern int cpuspeed;
188 1.24.8.2 scw extern char *intiobase, *intiolimit;
189 1.24.8.2 scw extern u_int intiobase_phys, intiotop_phys;
190 1.24.8.2 scw extern u_long ether_data_buff_size;
191 1.24.8.2 scw extern u_char mvme_ea[6];
192 1.24.8.2 scw
193 1.24.8.2 scw struct frame;
194 1.24.8.2 scw void doboot __P((int))
195 1.24.8.2 scw __attribute__((__noreturn__));
196 1.24.8.2 scw int nmihand __P((void *));
197 1.24.8.2 scw void mvme68k_abort __P((const char *));
198 1.24.8.2 scw void physaccess __P((caddr_t, caddr_t, int, int));
199 1.24.8.2 scw void physunaccess __P((caddr_t, int));
200 1.24.8.2 scw void *iomap __P((u_long, size_t));
201 1.24.8.2 scw void iounmap __P((void *, size_t));
202 1.24.8.2 scw paddr_t kvtop __P((caddr_t));
203 1.24.8.2 scw void loadustp __P((paddr_t));
204 1.24.8.2 scw
205 1.24.8.2 scw /* Prototypes from sys_machdep.c: */
206 1.24.8.2 scw int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
207 1.24.8.2 scw int dma_cachectl __P((caddr_t, int));
208 1.24.8.2 scw
209 1.24.8.2 scw /* physical memory addresses where mvme147's onboard devices live */
210 1.24.8.2 scw #define INTIOBASE147 (0xfffe0000u)
211 1.24.8.2 scw #define INTIOTOP147 (0xfffe5000u)
212 1.24.8.2 scw
213 1.24.8.2 scw /* ditto for mvme1[67][27] */
214 1.24.8.2 scw #define INTIOBASE1xx (0xfff40000u)
215 1.24.8.2 scw #define INTIOTOP1xx (0xfffd0000u)
216 1.24.8.2 scw
217 1.24.8.2 scw #endif /* _KERNEL */
218 1.24.8.2 scw
219 1.24.8.2 scw #endif /* _MACHINE_CPU_H_ */
220