cpu.h revision 1.12 1 /* $NetBSD: cpu.h,v 1.12 1999/08/10 21:08:08 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 */
44
45 /*
46 * Exported definitions unique to mvme68k/68k cpu support.
47 */
48
49 /*
50 * Get common m68k CPU definitions.
51 */
52 #include <m68k/cpu.h>
53 #define M68K_MMU_MOTOROLA
54
55 /*
56 * definitions of cpu-dependent requirements
57 * referenced in generic code
58 */
59 #define cpu_swapin(p) /* nothing */
60 #define cpu_wait(p) /* nothing */
61 #define cpu_swapout(p) /* nothing */
62 #define cpu_number() 0
63
64 /*
65 * Arguments to hardclock and gatherstats encapsulate the previous
66 * machine state in an opaque clockframe. One the mvme68k, we use
67 * what the hardware pushes on an interrupt (frame format 0).
68 */
69 struct clockframe {
70 u_short sr; /* sr at time of interrupt */
71 u_long pc; /* pc at time of interrupt */
72 u_short vo; /* vector offset (4-word frame) */
73 };
74
75 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
76 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
77 #define CLKF_PC(framep) ((framep)->pc)
78 #if 0
79 /* We would like to do it this way... */
80 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
81 #else
82 /* but until we start using PSL_M, we have to do this instead */
83 #define CLKF_INTR(framep) (0) /* XXX */
84 #endif
85
86
87 /*
88 * Preempt the current process if in interrupt from user mode,
89 * or after the current trap/syscall if in system mode.
90 */
91 extern int want_resched; /* resched() was called */
92 #define need_resched() { want_resched++; aston(); }
93
94 /*
95 * Give a profiling tick to the current process when the user profiling
96 * buffer pages are invalid. On the hp300, request an ast to send us
97 * through trap, marking the proc as needing a profiling tick.
98 */
99 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
100
101 /*
102 * Notify the current process (p) that it has a signal pending,
103 * process as soon as possible.
104 */
105 #define signotify(p) aston()
106
107 extern int astpending; /* need to trap before returning to user mode */
108 #define aston() (astpending++)
109
110 /*
111 * simulated software interrupt register
112 */
113 extern unsigned char ssir;
114
115 #define SIR_NET 0x1
116 #define SIR_CLOCK 0x2
117
118 #define setsoftint(x) ssir |= (x)
119 #define siroff(x) ssir &= ~(x)
120 #define setsoftnet() ssir |= SIR_NET
121 #define setsoftclock() ssir |= SIR_CLOCK
122
123 extern unsigned long allocate_sir();
124
125 /*
126 * CTL_MACHDEP definitions.
127 */
128 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
129 #define CPU_MAXID 2 /* number of valid machdep ids */
130
131 #define CTL_MACHDEP_NAMES { \
132 { 0, 0 }, \
133 { "console_device", CTLTYPE_STRUCT }, \
134 }
135
136 #ifdef _KERNEL
137 /*
138 * Associate MVME models with CPU types.
139 */
140
141 /*
142 * MVME-147; 68030 CPU
143 */
144 #if defined(MVME147) && !defined(M68030)
145 #define M68030
146 #endif
147
148 /*
149 * MVME-162/166/167; 68040 CPU
150 */
151 #if (defined(MVME162) || defined(MVME167)) && !defined(M68040)
152 #define M68040
153 #endif
154
155 /*
156 * MVME-177 (what about 172?); 68060 CPU
157 */
158 #if defined(MVME177) && !defined(M68060)
159 #define M68060
160 #endif
161 #endif /* _KERNEL */
162
163 /*
164 * Values for machineid; these match the Bug's values.
165 */
166 #define MVME_147 0x147
167 #define MVME_162 0x162
168 #define MVME_166 0x166
169 #define MVME_167 0x167
170 #define MVME_172 0x172
171 #define MVME_177 0x177
172
173 #ifdef _KERNEL
174 extern int machineid;
175 extern int cpuspeed;
176 extern char *intiobase, *intiolimit;
177 extern u_int intiobase_phys, intiotop_phys;
178 extern void *ether_data_buff; /* These two will go when bus_dma */
179 extern u_long ether_data_buff_size; /* support is added. */
180
181 struct frame;
182 void doboot __P((int))
183 __attribute__((__noreturn__));
184 int badaddr __P((caddr_t, int));
185 void nmihand __P((struct frame *));
186 void mvme68k_abort __P((const char *));
187 void physaccess __P((caddr_t, caddr_t, int, int));
188 void physunaccess __P((caddr_t, int));
189 void *iomap __P((u_long, size_t));
190 void iounmap __P((void *, size_t));
191 void child_return __P((void *));
192 void myetheraddr __P((u_char *));
193
194 /* Prototypes from sys_machdep.c: */
195 int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
196 int dma_cachectl __P((caddr_t, int));
197
198 /* physical memory sections for mvme147 */
199 #define INTIOBASE147 (0xfffe0000u)
200 #define INTIOTOP147 (0xfffe5000u)
201
202 /* ditto for mvme1[67]7 */
203 #define INTIOBASE167 (0xfff40000u)
204 #define INTIOTOP167 (0xfffd0000u)
205
206 /*
207 * Internal IO space:
208 *
209 * Internal IO space is mapped in the kernel from ``intiobase'' to
210 * ``intiolimit'' (defined in locore.s). Since it is always mapped,
211 * conversion between physical and kernel virtual addresses is easy.
212 */
213 #define ISIIOVA(va) \
214 ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
215 #define IIOV(pa) (((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
216 #define IIOP(va) (((u_int)(va) - (u_int)intiobase) + intiobase_phys)
217 #define IIOPOFF(pa) ((u_int)(pa) - intiobase_phys)
218 #endif /* _KERNEL */
219