cpu.h revision 1.24.8.5 1 /* $NetBSD: cpu.h,v 1.24.8.5 2002/02/28 04:10:52 nathanw Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 */
44
45 #ifndef _MACHINE_CPU_H_
46 #define _MACHINE_CPU_H_
47
48 /*
49 * Exported definitions unique to mvme68k/68k cpu support.
50 */
51
52 #if defined(_KERNEL_OPT)
53 #include "opt_lockdebug.h"
54 #endif
55
56 /*
57 * Get common m68k CPU definitions.
58 */
59 #include <m68k/cpu.h>
60 #define M68K_MMU_MOTOROLA
61
62 #include <sys/sched.h>
63 struct cpu_info {
64 struct schedstate_percpu ci_schedstate; /* scheduler state */
65 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
66 u_long ci_spin_locks; /* # of spin locks held */
67 u_long ci_simple_locks; /* # of simple locks held */
68 #endif
69 };
70
71 #ifdef _KERNEL
72 extern struct cpu_info cpu_info_store;
73
74 #define curcpu() (&cpu_info_store)
75
76 /*
77 * definitions of cpu-dependent requirements
78 * referenced in generic code
79 */
80 #define cpu_swapin(p) /* nothing */
81 #define cpu_wait(p) /* nothing */
82 #define cpu_swapout(p) /* nothing */
83 #define cpu_number() 0
84 #define cpu_proc_fork(p1, p2) /* nothing */
85
86 /*
87 * Arguments to hardclock and gatherstats encapsulate the previous
88 * machine state in an opaque clockframe. One the mvme68k, we use
89 * what the hardware pushes on an interrupt (frame format 0).
90 */
91 struct clockframe {
92 u_short sr; /* sr at time of interrupt */
93 u_long pc; /* pc at time of interrupt */
94 u_short fmt:4,
95 vec:12; /* vector offset (4-word frame) */
96 } __attribute__((packed));
97
98 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
99 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
100 #define CLKF_PC(framep) ((framep)->pc)
101
102 /*
103 * The clock interrupt handler can determine if it's a nested
104 * interrupt by checking for interrupt_depth > 1.
105 * (Remember, the clock interrupt handler itself will cause the
106 * depth counter to be incremented).
107 */
108 extern volatile unsigned int interrupt_depth;
109 #define CLKF_INTR(framep) (interrupt_depth > 1)
110
111
112 /*
113 * Preempt the current process if in interrupt from user mode,
114 * or after the current trap/syscall if in system mode.
115 */
116 extern int want_resched; /* resched() was called */
117 #define need_resched(ci) { want_resched++; aston(); }
118
119 /*
120 * Give a profiling tick to the current process when the user profiling
121 * buffer pages are invalid. On the hp300, request an ast to send us
122 * through trap, marking the proc as needing a profiling tick.
123 */
124 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
125
126 /*
127 * Notify the current process (p) that it has a signal pending,
128 * process as soon as possible.
129 */
130 #define signotify(p) aston()
131
132 extern int astpending; /* need to trap before returning to user mode */
133 #define aston() (astpending++)
134
135 #endif /* _KERNEL */
136
137 /*
138 * CTL_MACHDEP definitions.
139 */
140 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
141 #define CPU_MAXID 2 /* number of valid machdep ids */
142
143 #define CTL_MACHDEP_NAMES { \
144 { 0, 0 }, \
145 { "console_device", CTLTYPE_STRUCT }, \
146 }
147
148 #ifdef _KERNEL
149 /*
150 * Associate MVME models with CPU types.
151 */
152 #define MVME68K 1
153
154 /*
155 * MVME-147; 68030 CPU
156 */
157 #if defined(MVME147) && !defined(M68030)
158 #define M68030
159 #endif
160
161 /*
162 * MVME-162/166/167; 68040 CPU
163 */
164 #if (defined(MVME162) || defined(MVME167)) && !defined(M68040)
165 #define M68040
166 #endif
167
168 /*
169 * MVME-172/177; 68060 CPU
170 */
171 #if (defined(MVME172) || defined(MVME177)) && !defined(M68060)
172 #define M68060
173 #endif
174 #endif /* _KERNEL */
175
176 /*
177 * Values for machineid; these match the Bug's values.
178 */
179 #define MVME_147 0x147
180 #define MVME_162 0x162
181 #define MVME_166 0x166
182 #define MVME_167 0x167
183 #define MVME_172 0x172
184 #define MVME_177 0x177
185
186 #ifdef _KERNEL
187 extern int machineid;
188 extern int cpuspeed;
189 extern char *intiobase, *intiolimit;
190 extern u_int intiobase_phys, intiotop_phys;
191 extern u_long ether_data_buff_size;
192 extern u_char mvme_ea[6];
193
194 struct frame;
195 void doboot __P((int))
196 __attribute__((__noreturn__));
197 int nmihand __P((void *));
198 void mvme68k_abort __P((const char *));
199 void physaccess __P((caddr_t, caddr_t, int, int));
200 void physunaccess __P((caddr_t, int));
201 void *iomap __P((u_long, size_t));
202 void iounmap __P((void *, size_t));
203 paddr_t kvtop __P((caddr_t));
204 void loadustp __P((paddr_t));
205
206 /* Prototypes from sys_machdep.c: */
207 int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
208 int dma_cachectl __P((caddr_t, int));
209
210 /* physical memory addresses where mvme147's onboard devices live */
211 #define INTIOBASE147 (0xfffe0000u)
212 #define INTIOTOP147 (0xfffe5000u)
213
214 /* ditto for mvme1[67][27] */
215 #define INTIOBASE1xx (0xfff40000u)
216 #define INTIOTOP1xx (0xfffd0000u)
217
218 #endif /* _KERNEL */
219
220 #endif /* _MACHINE_CPU_H_ */
221