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cpu.h revision 1.27.2.3
      1 /*	$NetBSD: cpu.h,v 1.27.2.3 2004/09/21 13:19:15 skrll Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1982, 1990, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     36  *
     37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     38  */
     39 /*
     40  * Copyright (c) 1988 University of Utah.
     41  *
     42  * This code is derived from software contributed to Berkeley by
     43  * the Systems Programming Group of the University of Utah Computer
     44  * Science Department.
     45  *
     46  * Redistribution and use in source and binary forms, with or without
     47  * modification, are permitted provided that the following conditions
     48  * are met:
     49  * 1. Redistributions of source code must retain the above copyright
     50  *    notice, this list of conditions and the following disclaimer.
     51  * 2. Redistributions in binary form must reproduce the above copyright
     52  *    notice, this list of conditions and the following disclaimer in the
     53  *    documentation and/or other materials provided with the distribution.
     54  * 3. All advertising materials mentioning features or use of this software
     55  *    must display the following acknowledgement:
     56  *	This product includes software developed by the University of
     57  *	California, Berkeley and its contributors.
     58  * 4. Neither the name of the University nor the names of its contributors
     59  *    may be used to endorse or promote products derived from this software
     60  *    without specific prior written permission.
     61  *
     62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     72  * SUCH DAMAGE.
     73  *
     74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     75  *
     76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     77  */
     78 
     79 #ifndef _MACHINE_CPU_H_
     80 #define _MACHINE_CPU_H_
     81 
     82 /*
     83  * Exported definitions unique to mvme68k/68k cpu support.
     84  */
     85 
     86 #if defined(_KERNEL_OPT)
     87 #include "opt_lockdebug.h"
     88 #endif
     89 
     90 /*
     91  * Get common m68k CPU definitions.
     92  */
     93 #include <m68k/cpu.h>
     94 #define	M68K_MMU_MOTOROLA
     95 
     96 #include <sys/sched.h>
     97 struct cpu_info {
     98 	struct schedstate_percpu ci_schedstate; /* scheduler state */
     99 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
    100 	u_long ci_spin_locks;		/* # of spin locks held */
    101 	u_long ci_simple_locks;		/* # of simple locks held */
    102 #endif
    103 };
    104 
    105 #ifdef _KERNEL
    106 extern struct cpu_info cpu_info_store;
    107 
    108 #define	curcpu()			(&cpu_info_store)
    109 
    110 /*
    111  * definitions of cpu-dependent requirements
    112  * referenced in generic code
    113  */
    114 #define	cpu_swapin(p)			/* nothing */
    115 #define cpu_swapout(p)			/* nothing */
    116 #define	cpu_number()			0
    117 
    118 void	cpu_proc_fork(struct proc *, struct proc *);
    119 
    120 /*
    121  * Arguments to hardclock and gatherstats encapsulate the previous
    122  * machine state in an opaque clockframe.  One the mvme68k, we use
    123  * what the hardware pushes on an interrupt (frame format 0).
    124  */
    125 struct clockframe {
    126 	u_short	sr;		/* sr at time of interrupt */
    127 	u_long	pc;		/* pc at time of interrupt */
    128 	u_short	fmt:4,
    129 		vec:12;		/* vector offset (4-word frame) */
    130 } __attribute__((packed));
    131 
    132 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
    133 #define	CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
    134 #define	CLKF_PC(framep)		((framep)->pc)
    135 
    136 /*
    137  * The clock interrupt handler can determine if it's a nested
    138  * interrupt by checking for interrupt_depth > 1.
    139  * (Remember, the clock interrupt handler itself will cause the
    140  * depth counter to be incremented).
    141  */
    142 extern volatile unsigned int interrupt_depth;
    143 #define	CLKF_INTR(framep)	(interrupt_depth > 1)
    144 
    145 
    146 /*
    147  * Preempt the current process if in interrupt from user mode,
    148  * or after the current trap/syscall if in system mode.
    149  */
    150 extern int want_resched;	/* resched() was called */
    151 #define	need_resched(ci)	{ want_resched++; aston(); }
    152 
    153 /*
    154  * Give a profiling tick to the current process when the user profiling
    155  * buffer pages are invalid.  On the hp300, request an ast to send us
    156  * through trap, marking the proc as needing a profiling tick.
    157  */
    158 #define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
    159 
    160 /*
    161  * Notify the current process (p) that it has a signal pending,
    162  * process as soon as possible.
    163  */
    164 #define	signotify(p)	aston()
    165 
    166 extern int astpending;		/* need to trap before returning to user mode */
    167 #define aston() (astpending++)
    168 
    169 #endif /* _KERNEL */
    170 
    171 /*
    172  * CTL_MACHDEP definitions.
    173  */
    174 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    175 #define	CPU_MAXID		2	/* number of valid machdep ids */
    176 
    177 #define CTL_MACHDEP_NAMES { \
    178 	{ 0, 0 }, \
    179 	{ "console_device", CTLTYPE_STRUCT }, \
    180 }
    181 
    182 #ifdef _KERNEL
    183 /*
    184  * Associate MVME models with CPU types.
    185  */
    186 #define	MVME68K		1
    187 
    188 /*
    189  * MVME-147; 68030 CPU
    190  */
    191 #if defined(MVME147) && !defined(M68030)
    192 #define M68030
    193 #endif
    194 
    195 /*
    196  * MVME-162/166/167; 68040 CPU
    197  */
    198 #if (defined(MVME162) || defined(MVME167)) && !defined(M68040)
    199 #define M68040
    200 #endif
    201 
    202 /*
    203  * MVME-172/177; 68060 CPU
    204  */
    205 #if (defined(MVME172) || defined(MVME177)) && !defined(M68060)
    206 #define M68060
    207 #endif
    208 #endif /* _KERNEL */
    209 
    210 /*
    211  * Values for machineid; these match the Bug's values.
    212  */
    213 #define	MVME_147	0x147
    214 #define	MVME_162	0x162
    215 #define	MVME_166	0x166
    216 #define	MVME_167	0x167
    217 #define	MVME_172	0x172
    218 #define	MVME_177	0x177
    219 
    220 #ifdef _KERNEL
    221 extern	int machineid;
    222 extern	int cpuspeed;
    223 extern	char *intiobase, *intiolimit;
    224 extern	u_int intiobase_phys, intiotop_phys;
    225 extern	u_long ether_data_buff_size;
    226 extern	u_char mvme_ea[6];
    227 
    228 struct frame;
    229 struct pcb;
    230 void	doboot __P((int))
    231 	__attribute__((__noreturn__));
    232 int	nmihand __P((void *));
    233 void	mvme68k_abort __P((const char *));
    234 void	physaccess __P((caddr_t, caddr_t, int, int));
    235 void	physunaccess __P((caddr_t, int));
    236 void	*iomap __P((u_long, size_t));
    237 void	iounmap __P((void *, size_t));
    238 int	kvtop __P((caddr_t));
    239 void	savectx __P((struct pcb *));
    240 void	switch_exit __P((struct lwp *));
    241 void	switch_lwp_exit __P((struct lwp *));
    242 void	proc_trampoline __P((void));
    243 void	loadustp __P((paddr_t));
    244 
    245 /* Prototypes from sys_machdep.c: */
    246 int	cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
    247 int	dma_cachectl __P((caddr_t, int));
    248 
    249 /* physical memory addresses where mvme147's onboard devices live */
    250 #define	INTIOBASE147	(0xfffe0000u)
    251 #define	INTIOTOP147	(0xfffe5000u)
    252 
    253 /* ditto for mvme1[67][27] */
    254 #define	INTIOBASE1xx	(0xfff40000u)
    255 #define	INTIOTOP1xx	(0xfffd0000u)
    256 
    257 #endif /* _KERNEL */
    258 
    259 #endif /* _MACHINE_CPU_H_ */
    260