cpu.h revision 1.5 1 /* $NetBSD: cpu.h,v 1.5 1996/09/12 05:01:47 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 */
44
45 /*
46 * Exported definitions unique to mvme68k/68k cpu support.
47 */
48
49 /*
50 * Get common m68k CPU definitions.
51 */
52 #include <m68k/cpu.h>
53 #define M68K_MMU_MOTOROLA
54
55 /*
56 * definitions of cpu-dependent requirements
57 * referenced in generic code
58 */
59 #define cpu_swapin(p) /* nothing */
60 #define cpu_wait(p) /* nothing */
61 #define cpu_swapout(p) /* nothing */
62
63 /*
64 * Arguments to hardclock and gatherstats encapsulate the previous
65 * machine state in an opaque clockframe. One the mvme68k, we use
66 * what the hardware pushes on an interrupt (frame format 0).
67 */
68 struct clockframe {
69 u_short sr; /* sr at time of interrupt */
70 u_long pc; /* pc at time of interrupt */
71 u_short vo; /* vector offset (4-word frame) */
72 };
73
74 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
75 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
76 #define CLKF_PC(framep) ((framep)->pc)
77 #if 0
78 /* We would like to do it this way... */
79 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
80 #else
81 /* but until we start using PSL_M, we have to do this instead */
82 #define CLKF_INTR(framep) (0) /* XXX */
83 #endif
84
85
86 /*
87 * Preempt the current process if in interrupt from user mode,
88 * or after the current trap/syscall if in system mode.
89 */
90 #define need_resched() { want_resched++; aston(); }
91
92 /*
93 * Give a profiling tick to the current process when the user profiling
94 * buffer pages are invalid. On the hp300, request an ast to send us
95 * through trap, marking the proc as needing a profiling tick.
96 */
97 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
98
99 /*
100 * Notify the current process (p) that it has a signal pending,
101 * process as soon as possible.
102 */
103 #define signotify(p) aston()
104
105 #define aston() (astpending++)
106
107 int astpending; /* need to trap before returning to user mode */
108 int want_resched; /* resched() was called */
109
110 /*
111 * simulated software interrupt register
112 */
113 extern unsigned char ssir;
114
115 #define SIR_NET 0x1
116 #define SIR_CLOCK 0x2
117
118 #define setsoftint(x) ssir |= (x)
119 #define siroff(x) ssir &= ~(x)
120 #define setsoftnet() ssir |= SIR_NET
121 #define setsoftclock() ssir |= SIR_CLOCK
122
123 extern unsigned long allocate_sir();
124
125 /*
126 * CTL_MACHDEP definitions.
127 */
128 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
129 #define CPU_MAXID 2 /* number of valid machdep ids */
130
131 #define CTL_MACHDEP_NAMES { \
132 { 0, 0 }, \
133 { "console_device", CTLTYPE_STRUCT }, \
134 }
135
136 #define MHZ_16 2 /* XXX kill */
137
138 #ifdef _KERNEL
139 extern int cpuspeed; /* XXX kill */
140 extern char *intiobase, *intiolimit;
141
142 struct frame;
143 void doboot __P((int))
144 __attribute__((__noreturn__));
145 int badaddr __P((caddr_t, int));
146 void nmihand __P((struct frame *));
147 void mvme68k_abort __P((const char *));
148 void physaccess __P((caddr_t, caddr_t, int, int));
149 void physunaccess __P((caddr_t, int));
150 void *iomap __P((u_long, size_t));
151 void iounmap __P((void *, size_t));
152 #endif
153
154 /* physical memory sections for mvme147 */
155 #define INTIOBASE (0xfffe0000)
156 #define INTIOTOP (0xfffe5000)
157
158 /*
159 * Internal IO space:
160 *
161 * Ranges from 0x800000 to 0x1000000 (IIOMAPSIZE).
162 *
163 * Internal IO space is mapped in the kernel from ``intiobase'' to
164 * ``intiolimit'' (defined in locore.s). Since it is always mapped,
165 * conversion between physical and kernel virtual addresses is easy.
166 */
167 #define ISIIOVA(va) \
168 ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
169 #define IIOV(pa) ((int)(pa)-INTIOBASE+(int)intiobase)
170 #define IIOP(va) ((int)(va)-(int)intiobase+INTIOBASE)
171 #define IIOPOFF(pa) ((int)(pa)-INTIOBASE)
172 #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 1mb */
173