cpu.h revision 1.9 1 /* $NetBSD: cpu.h,v 1.9 1999/02/14 17:54:29 scw Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 */
44
45 /*
46 * Exported definitions unique to mvme68k/68k cpu support.
47 */
48
49 /*
50 * Get common m68k CPU definitions.
51 */
52 #include <m68k/cpu.h>
53 #define M68K_MMU_MOTOROLA
54
55 /*
56 * definitions of cpu-dependent requirements
57 * referenced in generic code
58 */
59 #define cpu_swapin(p) /* nothing */
60 #define cpu_wait(p) /* nothing */
61 #define cpu_swapout(p) /* nothing */
62
63 /*
64 * Arguments to hardclock and gatherstats encapsulate the previous
65 * machine state in an opaque clockframe. One the mvme68k, we use
66 * what the hardware pushes on an interrupt (frame format 0).
67 */
68 struct clockframe {
69 u_short sr; /* sr at time of interrupt */
70 u_long pc; /* pc at time of interrupt */
71 u_short vo; /* vector offset (4-word frame) */
72 };
73
74 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
75 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
76 #define CLKF_PC(framep) ((framep)->pc)
77 #if 0
78 /* We would like to do it this way... */
79 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
80 #else
81 /* but until we start using PSL_M, we have to do this instead */
82 #define CLKF_INTR(framep) (0) /* XXX */
83 #endif
84
85
86 /*
87 * Preempt the current process if in interrupt from user mode,
88 * or after the current trap/syscall if in system mode.
89 */
90 extern int want_resched; /* resched() was called */
91 #define need_resched() { want_resched++; aston(); }
92
93 /*
94 * Give a profiling tick to the current process when the user profiling
95 * buffer pages are invalid. On the hp300, request an ast to send us
96 * through trap, marking the proc as needing a profiling tick.
97 */
98 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
99
100 /*
101 * Notify the current process (p) that it has a signal pending,
102 * process as soon as possible.
103 */
104 #define signotify(p) aston()
105
106 extern int astpending; /* need to trap before returning to user mode */
107 #define aston() (astpending++)
108
109 /*
110 * simulated software interrupt register
111 */
112 extern unsigned char ssir;
113
114 #define SIR_NET 0x1
115 #define SIR_CLOCK 0x2
116
117 #define setsoftint(x) ssir |= (x)
118 #define siroff(x) ssir &= ~(x)
119 #define setsoftnet() ssir |= SIR_NET
120 #define setsoftclock() ssir |= SIR_CLOCK
121
122 extern unsigned long allocate_sir();
123
124 /*
125 * CTL_MACHDEP definitions.
126 */
127 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
128 #define CPU_MAXID 2 /* number of valid machdep ids */
129
130 #define CTL_MACHDEP_NAMES { \
131 { 0, 0 }, \
132 { "console_device", CTLTYPE_STRUCT }, \
133 }
134
135 #ifdef _KERNEL
136 /*
137 * Associate MVME models with CPU types.
138 */
139
140 /*
141 * MVME-147; 68030 CPU
142 */
143 #if defined(MVME147) && !defined(M68030)
144 #define M68030
145 #endif
146
147 /*
148 * MVME-162/166/167; 68040 CPU
149 */
150 #if (defined(MVME162) || defined(MVME167)) && !defined(M68040)
151 #define M68040
152 #endif
153
154 /*
155 * MVME-177 (what about 172?); 68060 CPU
156 */
157 #if defined(MVME177) && !defined(M68060)
158 #define M68060
159 #endif
160 #endif /* _KERNEL */
161
162 /*
163 * Values for machineid; these match the Bug's values.
164 */
165 #define MVME_147 0x147
166 #define MVME_162 0x162
167 #define MVME_166 0x166
168 #define MVME_167 0x167
169 #define MVME_172 0x172
170 #define MVME_177 0x177
171
172 #ifdef _KERNEL
173 extern int machineid;
174 extern char *intiobase, *intiolimit;
175 extern u_int intiobase_phys, intiotop_phys;
176 extern void *ether_data_buff; /* These two will go when bus_dma */
177 extern u_long ether_data_buff_size; /* support is added. */
178
179 struct frame;
180 void doboot __P((int))
181 __attribute__((__noreturn__));
182 int badaddr __P((caddr_t, int));
183 void nmihand __P((struct frame *));
184 void mvme68k_abort __P((const char *));
185 void physaccess __P((caddr_t, caddr_t, int, int));
186 void physunaccess __P((caddr_t, int));
187 void *iomap __P((u_long, size_t));
188 void iounmap __P((void *, size_t));
189 void child_return __P((void *));
190 void myetheraddr __P((u_char *));
191
192 /* physical memory sections for mvme147 */
193 #define INTIOBASE147 (0xfffe0000u)
194 #define INTIOTOP147 (0xfffe5000u)
195
196 /* ditto for mvme1[67]7 */
197 #define INTIOBASE167 (0xfff00000u)
198 #define INTIOTOP167 (0xfffd0000u)
199
200 /*
201 * Internal IO space:
202 *
203 * Internal IO space is mapped in the kernel from ``intiobase'' to
204 * ``intiolimit'' (defined in locore.s). Since it is always mapped,
205 * conversion between physical and kernel virtual addresses is easy.
206 */
207 #define ISIIOVA(va) \
208 ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
209 #define IIOV(pa) (((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
210 #define IIOP(va) (((u_int)(va) - (u_int)intiobase) + intiobase_phys)
211 #define IIOPOFF(pa) ((u_int)(pa) - intiobase_phys)
212 #endif /* _KERNEL */
213