intr.h revision 1.3
1 1.3 scw /* $NetBSD: intr.h,v 1.3 2000/07/20 20:40:35 scw Exp $ */ 2 1.2 scw 3 1.2 scw /*- 4 1.2 scw * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 1.2 scw * All rights reserved. 6 1.2 scw * 7 1.2 scw * This code is derived from software contributed to The NetBSD Foundation 8 1.2 scw * by Jason R. Thorpe and Steve C. Woodford. 9 1.2 scw * 10 1.2 scw * Redistribution and use in source and binary forms, with or without 11 1.2 scw * modification, are permitted provided that the following conditions 12 1.2 scw * are met: 13 1.2 scw * 1. Redistributions of source code must retain the above copyright 14 1.2 scw * notice, this list of conditions and the following disclaimer. 15 1.2 scw * 2. Redistributions in binary form must reproduce the above copyright 16 1.2 scw * notice, this list of conditions and the following disclaimer in the 17 1.2 scw * documentation and/or other materials provided with the distribution. 18 1.2 scw * 3. All advertising materials mentioning features or use of this software 19 1.2 scw * must display the following acknowledgement: 20 1.2 scw * This product includes software developed by the NetBSD 21 1.2 scw * Foundation, Inc. and its contributors. 22 1.2 scw * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.2 scw * contributors may be used to endorse or promote products derived 24 1.2 scw * from this software without specific prior written permission. 25 1.2 scw * 26 1.2 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.2 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.2 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.2 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.2 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.2 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.2 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.2 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.2 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.2 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.2 scw * POSSIBILITY OF SUCH DAMAGE. 37 1.2 scw */ 38 1.2 scw 39 1.2 scw #ifndef _MVME68K_INTR_H 40 1.2 scw #define _MVME68K_INTR_H 41 1.2 scw 42 1.3 scw #include <sys/device.h> 43 1.3 scw #include <sys/queue.h> 44 1.2 scw #include <machine/psl.h> 45 1.2 scw 46 1.2 scw /* 47 1.2 scw * These are identical to the values used by hp300, but are not meaningful 48 1.2 scw * to mvme68k code at this time. 49 1.2 scw */ 50 1.2 scw #define IPL_NONE 0 /* disable only this interrupt */ 51 1.2 scw #define IPL_BIO 1 /* disable block I/O interrupts */ 52 1.2 scw #define IPL_NET 2 /* disable network interrupts */ 53 1.2 scw #define IPL_TTY 3 /* disable terminal interrupts */ 54 1.2 scw #define IPL_TTYNOBUF 4 /* IPL_TTY + higher ISR priority */ 55 1.2 scw #define IPL_CLOCK 5 /* disable clock interrupts */ 56 1.2 scw #define IPL_HIGH 6 /* disable all interrupts */ 57 1.2 scw 58 1.3 scw /* Copied from alpha/include/intr.h */ 59 1.3 scw #define IPL_SOFTSERIAL 0 /* serial software interrupts */ 60 1.3 scw #define IPL_SOFTNET 1 /* network software interrupts */ 61 1.3 scw #define IPL_SOFTCLOCK 2 /* clock software interrupts */ 62 1.3 scw #define IPL_SOFT 3 /* other software interrupts */ 63 1.3 scw #define IPL_NSOFT 4 64 1.3 scw 65 1.3 scw #define IPL_SOFTNAMES { \ 66 1.3 scw "serial", \ 67 1.3 scw "net", \ 68 1.3 scw "clock", \ 69 1.3 scw "misc", \ 70 1.3 scw } 71 1.3 scw 72 1.2 scw #ifdef _KERNEL 73 1.2 scw /* spl0 requires checking for software interrupts */ 74 1.2 scw 75 1.2 scw #define spllowersoftclock() spl1() 76 1.3 scw #define splsoft() splraise1() 77 1.3 scw #define splsoftclock() splsoft() 78 1.3 scw #define splsoftnet() splsoft() 79 1.3 scw #define splsoftserial() splsoft() 80 1.2 scw #define splbio() splraise2() 81 1.2 scw #define splnet() splraise3() 82 1.2 scw #define spltty() splraise3() 83 1.2 scw #define splimp() splraise3() 84 1.2 scw #define splserial() splraise4() 85 1.2 scw #define splclock() splraise5() 86 1.2 scw #define splstatclock() splraise5() 87 1.2 scw #define splvm() splraise5() 88 1.2 scw #define splhigh() spl7() 89 1.2 scw #define splsched() spl7() 90 1.2 scw 91 1.2 scw /* watch out for side effects */ 92 1.2 scw #define splx(s) (s & PSL_IPL ? _spl(s) : spl0()) 93 1.2 scw 94 1.2 scw 95 1.2 scw #ifndef _LOCORE 96 1.2 scw /* 97 1.3 scw * Simulated software interrupt register 98 1.3 scw * This is cleared to zero to indicate a soft interrupt is pending 99 1.3 scw * (Yes, it's a bit bizarre, but it allows the use of the m68k's `tas' 100 1.3 scw * instruction so we can avoid masking interrupts elsewhere.) 101 1.2 scw */ 102 1.2 scw extern volatile unsigned char ssir; 103 1.3 scw #define setsoft(x) x = 0 104 1.3 scw 105 1.3 scw #define __GENERIC_SOFT_INTERRUPTS 106 1.3 scw struct mvme68k_soft_intrhand { 107 1.3 scw LIST_ENTRY(mvme68k_soft_intrhand) sih_q; 108 1.3 scw struct mvme68k_soft_intr *sih_intrhead; 109 1.3 scw void (*sih_fn)(void *); 110 1.3 scw void *sih_arg; 111 1.3 scw volatile int sih_pending; 112 1.3 scw }; 113 1.3 scw 114 1.3 scw struct mvme68k_soft_intr { 115 1.3 scw LIST_HEAD(, mvme68k_soft_intrhand) msi_q; 116 1.3 scw struct evcnt msi_evcnt; 117 1.3 scw volatile unsigned char msi_ssir; 118 1.3 scw }; 119 1.3 scw 120 1.3 scw void *softintr_establish(int, void (*)(void *), void *); 121 1.3 scw void softintr_disestablish(void *); 122 1.3 scw void softintr_init(void); 123 1.3 scw void softintr_dispatch(void); 124 1.3 scw 125 1.3 scw #define softintr_schedule(arg) \ 126 1.3 scw do { \ 127 1.3 scw struct mvme68k_soft_intrhand *__sih = (arg); \ 128 1.3 scw __sih->sih_pending = 1; \ 129 1.3 scw setsoft(__sih->sih_intrhead->msi_ssir); \ 130 1.3 scw setsoft(ssir); \ 131 1.3 scw } while (0) 132 1.3 scw 133 1.3 scw /* XXX For legacy software interrupts */ 134 1.3 scw extern struct mvme68k_soft_intrhand *softnet_intrhand; 135 1.3 scw extern struct mvme68k_soft_intrhand *softclock_intrhand; 136 1.3 scw 137 1.3 scw #define setsoftnet() softintr_schedule(softnet_intrhand) 138 1.3 scw #define setsoftclock() softintr_schedule(softclock_intrhand) 139 1.2 scw 140 1.2 scw extern int spl0 __P((void)); 141 1.2 scw #endif /* !_LOCORE */ 142 1.2 scw #endif /* _KERNEL */ 143 1.2 scw 144 1.2 scw #endif /* _MVME68K_INTR_H */ 145
Indexes created Wed Sep 24 02:09:48 GMT 2025