intr.h revision 1.13.16.2
1 /* $NetBSD: intr.h,v 1.13.16.2 2006/12/10 05:21:53 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _MVME68K_INTR_H 40 #define _MVME68K_INTR_H 41 42 #include <sys/device.h> 43 #include <sys/queue.h> 44 #include <machine/psl.h> 45 46 #define IPL_NONE 0 /* disable only this interrupt */ 47 #define IPL_SOFT 1 /* other software interrupts */ 48 #define IPL_SOFTCLOCK 2 /* clock software interrupts */ 49 #define IPL_SOFTNET 3 /* network software interrupts */ 50 #define IPL_SOFTSERIAL 4 /* serial software interrupts */ 51 #define IPL_BIO 5 /* disable block I/O interrupts */ 52 #define IPL_NET 6 /* disable network interrupts */ 53 #define IPL_TTY 7 /* disable terminal interrupts */ 54 #define IPL_LPT IPL_TTY 55 #define IPL_TTYNOBUF 8 /* IPL_TTY + higher ISR priority */ 56 #define IPL_SERIAL 8 /* disable serial interrupts */ 57 #define IPL_CLOCK 9 /* disable clock interrupts */ 58 #define IPL_STATCLOCK IPL_CLOCK 59 #define IPL_HIGH 10 /* disable all interrupts */ 60 #define IPL_SCHED IPL_HIGH 61 #define IPL_LOCK IPL_HIGH 62 63 #define SI_SOFTSERIAL 0 64 #define SI_SOFTNET 1 65 #define SI_SOFTCLOCK 2 66 #define SI_SOFT 3 67 68 #define SI_NQUEUES 4 69 70 #define SI_QUEUENAMES { \ 71 "serial", \ 72 "net", \ 73 "clock", \ 74 "misc", \ 75 } 76 77 #ifdef _KERNEL 78 #define spl0() _spl0() 79 #define spllowersoftclock() spl1() 80 #define splsoft() splraise1() 81 #define splsoftclock() splsoft() 82 #define splsoftnet() splsoft() 83 #define splsoftserial() splsoft() 84 #define splbio() splraise2() 85 #define splnet() splraise3() 86 #define spltty() splraise3() 87 #define splvm() splraise3() 88 #define splserial() splraise4() 89 #define splclock() splraise5() 90 #define splstatclock() splraise5() 91 #define splhigh() spl7() 92 #define splsched() spl7() 93 #define spllock() spl7() 94 95 #ifndef _LOCORE 96 97 typedef int ipl_t; 98 typedef struct { 99 int _psl; 100 } ipl_cookie_t; 101 102 ipl_cookie_t makeiplcookie(ipl_t); 103 104 static inline int 105 splraiseipl(ipl_cookie_t icookie) 106 { 107 108 return _splraise(icookie._psl); 109 } 110 111 static __inline void 112 splx(int sr) 113 { 114 115 __asm volatile("movw %0,%%sr" : : "di" (sr)); 116 } 117 118 #define setsoft(x) x = 0 119 120 struct mvme68k_soft_intrhand { 121 LIST_ENTRY(mvme68k_soft_intrhand) sih_q; 122 struct mvme68k_soft_intr *sih_intrhead; 123 void (*sih_fn)(void *); 124 void *sih_arg; 125 volatile int sih_pending; 126 }; 127 128 struct mvme68k_soft_intr { 129 LIST_HEAD(, mvme68k_soft_intrhand) msi_q; 130 struct evcnt msi_evcnt; 131 volatile unsigned char msi_ssir; 132 }; 133 134 void *softintr_establish(int, void (*)(void *), void *); 135 void softintr_disestablish(void *); 136 void softintr_init(void); 137 void softintr_dispatch(void); 138 extern void (*_softintr_chipset_assert)(void); 139 140 #define softintr_schedule(arg) \ 141 do { \ 142 struct mvme68k_soft_intrhand *__sih = (arg); \ 143 __sih->sih_pending = 1; \ 144 setsoft(__sih->sih_intrhead->msi_ssir); \ 145 _softintr_chipset_assert(); \ 146 } while (0) 147 148 /* XXX For legacy software interrupts */ 149 extern struct mvme68k_soft_intrhand *softnet_intrhand; 150 151 #define setsoftnet() softintr_schedule(softnet_intrhand) 152 153 #endif /* !_LOCORE */ 154 #endif /* _KERNEL */ 155 156 #endif /* _MVME68K_INTR_H */ 157
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