11.2Swiz/* $NetBSD: asm.h,v 1.2 2006/02/25 02:28:57 wiz Exp $ */ 21.1Sscw 31.1Sscw#include <powerpc/asm.h> 41.1Sscw 51.2Swiz#define HID0_NOOPTI (1 << 0) /* No-op D-cache touch instructions */ 61.1Sscw#define HID0_BTCD (1 << 1) 71.1Sscw#define HID0_BHTE (1 << 2) 81.1Sscw#define HID0_FBIOB (1 << 4) /* Force branch indirect on bus */ 91.1Sscw#define HID0_SIED (1 << 7) 101.1Sscw#define HID0_DCFI (1 << 10) /* D-cache flash invalidate */ 111.1Sscw#define HID0_ICFI (1 << 11) /* I-cache flash invalidate */ 121.1Sscw#define HID0_DLOCK (1 << 12) /* D-cache lock */ 131.1Sscw#define HID0_ILOCK (1 << 13) /* I-cache lock */ 141.1Sscw#define HID0_DCE (1 << 14) /* D-cache enable */ 151.1Sscw#define HID0_ICE (1 << 15) /* I-cache enable */ 161.1Sscw#define HID0_NHR (1 << 16) 171.1Sscw#define HID0_RISEG (1 << 19) 181.1Sscw#define HID0_DPM (1 << 20) /* Dynamic power management enable */ 191.1Sscw#define HID0_SLEEP (1 << 21) /* Sleep mode enable */ 201.1Sscw#define HID0_NAP (1 << 22) /* Nap mode enable */ 211.1Sscw#define HID0_DOZE (1 << 23) /* Doze mode enable */ 221.1Sscw#define HID0_PAR (1 << 24) /* Disable precharge of #ARTRY */ 231.1Sscw#define HID0_ECLK (1 << 25) /* CLK_OUT output enable */ 241.1Sscw#define HID0_EICE (1 << 26) /* Enable ICE pipeline tracking */ 251.1Sscw#define HID0_BCLK (1 << 27) /* CLK_OUT output enable */ 261.1Sscw#define HID0_EBD (1 << 28) /* Enable 60x-bus data parity checks */ 271.1Sscw#define HID0_EBA (1 << 29) /* Enable 60x-bus addr parity checks */ 281.1Sscw#define HID0_EMCP (1 << 31) /* Enable Machine Checks */ 291.1Sscw 301.1Sscw#define LDCONST(r,v) lis r,v@ha ; addi r,r,v@l 311.1Sscw#define LDVAR(r,a) lis r,a@ha ; lwz r,a@l(r) 32