intr.h revision 1.1
1 /* $NetBSD: intr.h,v 1.1 2002/02/27 21:02:16 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Sandpoint-specific code developed 40 * by Allen Briggs for Wasabi Systems, Inc. 41 * 42 * OpenPIC code derived from code with the following notice. 43 */ 44 /*- 45 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 2. Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in the 54 * documentation and/or other materials provided with the distribution. 55 * 3. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 60 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 61 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 62 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 63 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 64 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 65 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 66 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 67 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #ifndef _MVMEPPC_INTR_H_ 71 #define _MVMEPPC_INTR_H_ 72 73 /* Interrupt priority `levels'. */ 74 #define IPL_NONE 9 /* nothing */ 75 #define IPL_SOFTCLOCK 8 /* software clock interrupt */ 76 #define IPL_SOFTNET 7 /* software network interrupt */ 77 #define IPL_BIO 6 /* block I/O */ 78 #define IPL_NET 5 /* network */ 79 #define IPL_SOFTSERIAL 4 /* software serial interrupt */ 80 #define IPL_TTY 3 /* terminal */ 81 #define IPL_IMP 3 /* memory allocation */ 82 #define IPL_AUDIO 2 /* audio */ 83 #define IPL_CLOCK 1 /* clock */ 84 #define IPL_HIGH 1 /* everything */ 85 #define IPL_SERIAL 0 /* serial */ 86 #define NIPL 10 87 88 /* Interrupt sharing types. */ 89 #define IST_NONE 0 /* none */ 90 #define IST_PULSE 1 /* pulsed */ 91 #define IST_EDGE 2 /* edge-triggered */ 92 #define IST_LEVEL 3 /* level-triggered */ 93 94 #ifndef _LOCORE 95 96 /* 97 * Interrupt handler chains. intr_establish() inserts a handler into 98 * the list. The handler is called with its (single) argument. 99 */ 100 struct intrhand { 101 int (*ih_fun)(void *); 102 void *ih_arg; 103 u_long ih_count; 104 struct intrhand *ih_next; 105 int ih_level; 106 int ih_irq; 107 }; 108 109 void setsoftclock(void); 110 void clearsoftclock(void); 111 int splsoftclock(void); 112 void setsoftnet(void); 113 void clearsoftnet(void); 114 int splsoftnet(void); 115 void softnet(void); 116 117 void ext_intr(void); 118 119 void do_pending_int(void); 120 void *intr_establish(int, int, int, int (*)(void *), void *); 121 void intr_disestablish(void *); 122 123 void softserial(void); 124 int isa_intr(void); 125 void isa_intr_mask(int); 126 void isa_intr_clr(int); 127 void isa_setirqstat(int, int, int); 128 129 130 extern volatile int cpl, ipending, astpending, tickspending; 131 extern int imask[]; 132 extern long intrcnt[]; 133 extern int intrtype[]; 134 extern struct intrhand *intrhand[]; 135 136 static __inline int splraise(int); 137 static __inline int spllower(int); 138 static __inline void splx(int); 139 static __inline void set_sint(int); 140 141 /* 142 * Reorder protection in the following inline functions is 143 * protected with the "eieio" instruction. 144 */ 145 static __inline int 146 splraise(newcpl) 147 int newcpl; 148 { 149 int oldcpl; 150 151 __asm__ volatile("sync; eieio\n"); /* don't reorder.... */ 152 oldcpl = cpl; 153 cpl = oldcpl | newcpl; 154 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 155 return(oldcpl); 156 } 157 158 static __inline void 159 splx(newcpl) 160 int newcpl; 161 { 162 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 163 cpl = newcpl; 164 if(ipending & ~newcpl) 165 do_pending_int(); 166 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 167 } 168 169 static __inline int 170 spllower(newcpl) 171 int newcpl; 172 { 173 int oldcpl; 174 175 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 176 oldcpl = cpl; 177 cpl = newcpl; 178 if(ipending & ~newcpl) 179 do_pending_int(); 180 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 181 return(oldcpl); 182 } 183 184 /* Following code should be implemented with lwarx/stwcx to avoid 185 * the disable/enable. i need to read the manual once more.... */ 186 static __inline void 187 set_sint(pending) 188 int pending; 189 { 190 int msrsave; 191 192 __asm__ ("mfmsr %0" : "=r"(msrsave)); 193 __asm__ volatile ("mtmsr %0" :: "r"(msrsave & ~PSL_EE)); 194 ipending |= pending; 195 __asm__ volatile ("mtmsr %0" :: "r"(msrsave)); 196 } 197 198 #define ICU_LEN 32 199 #define IRQ_SLAVE 2 200 #define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE) 201 202 #define MVMEPPC_INTR_REG 0xbffff000 203 #define INTR_VECTOR_REG 0xff0 204 205 #define SINT_CLOCK 0x20000000 206 #define SINT_NET 0x40000000 207 #define SINT_SERIAL 0x80000000 208 #define SPL_CLOCK 0x00000001 209 #define SINT_MASK (SINT_CLOCK|SINT_NET|SINT_SERIAL) 210 211 #define CNT_SINT_NET 29 212 #define CNT_SINT_CLOCK 30 213 #define CNT_SINT_SERIAL 31 214 #define CNT_CLOCK 0 215 216 #define spl0() spllower(0) 217 #define splbio() splraise(imask[IPL_BIO]) 218 #define splnet() splraise(imask[IPL_NET]) 219 #define spltty() splraise(imask[IPL_TTY]) 220 #define spllpt() spltty() 221 #define splclock() splraise(imask[IPL_CLOCK]) 222 #define splvm() splraise(imask[IPL_IMP]) 223 #define splserial() splraise(imask[IPL_SERIAL]) 224 #define splstatclock() splclock() 225 #define spllowersoftclock() spllower(imask[IPL_SOFTCLOCK]) 226 #define splsoftclock() splraise(imask[IPL_SOFTCLOCK]) 227 #define splsoftnet() splraise(imask[IPL_SOFTNET]) 228 #define splsoftserial() splraise(imask[IPL_SOFTSERIAL]) 229 #define splhigh() splraise(imask[IPL_HIGH]) 230 #define splsched() splhigh() 231 #define spllock() splhigh() 232 233 #if 1 234 #define setsoftisa() set_sint(SINT_ISA); 235 #define setsoftclock() set_sint(SINT_CLOCK); 236 #define setsoftnet() set_sint(SINT_NET); 237 #define setsoftserial() set_sint(SINT_SERIAL); 238 #endif 239 240 #endif /* !_LOCORE */ 241 242 #endif /* !_MVMEPPC_INTR_H_ */ 243
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