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pci_machdep.c revision 1.4
      1 /*	$NetBSD: pci_machdep.c,v 1.4 2003/07/15 02:43:53 lukem Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Charles M. Hannum.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Machine-specific functions for PCI autoconfiguration.
     35  *
     36  * On PCs, there are two methods of generating PCI configuration cycles.
     37  * We try to detect the appropriate mechanism for this machine and set
     38  * up a few function pointers to access the correct method directly.
     39  */
     40 
     41 #include <sys/cdefs.h>
     42 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.4 2003/07/15 02:43:53 lukem Exp $");
     43 
     44 #include <sys/types.h>
     45 #include <sys/param.h>
     46 #include <sys/time.h>
     47 #include <sys/systm.h>
     48 #include <sys/errno.h>
     49 #include <sys/device.h>
     50 
     51 #include <uvm/uvm_extern.h>
     52 
     53 #define _POWERPC_BUS_DMA_PRIVATE
     54 #include <machine/bus.h>
     55 #include <machine/intr.h>
     56 #include <machine/platform.h>
     57 
     58 #include <powerpc/pio.h>
     59 
     60 #include <dev/isa/isavar.h>
     61 #include <dev/pci/pcivar.h>
     62 #include <dev/pci/pcireg.h>
     63 #include <dev/pci/pcidevs.h>
     64 
     65 #define	PCI_MODE1_ENABLE	0x80000000UL
     66 #define	PCI_MODE1_ADDRESS_REG	(MVMEPPC_KVA_BASE_IO + 0xcf8)
     67 #define	PCI_MODE1_DATA_REG	(MVMEPPC_KVA_BASE_IO + 0xcfc)
     68 
     69 #define	o2i(off)	((off)/sizeof(pcireg_t))
     70 
     71 void pci_intr_fixup(int, int, int *);
     72 
     73 #ifdef DEBUG
     74 #define	DPRF(x)	printf x
     75 #else
     76 #define	DPRF(x)
     77 #endif
     78 
     79 /*
     80  * PCI doesn't have any special needs; just use the generic versions
     81  * of these functions.
     82  */
     83 struct powerpc_bus_dma_tag pci_bus_dma_tag = {
     84 	0,			/* _bounce_thresh */
     85 	_bus_dmamap_create,
     86 	_bus_dmamap_destroy,
     87 	_bus_dmamap_load,
     88 	_bus_dmamap_load_mbuf,
     89 	_bus_dmamap_load_uio,
     90 	_bus_dmamap_load_raw,
     91 	_bus_dmamap_unload,
     92 	NULL,			/* _dmamap_sync */
     93 	_bus_dmamem_alloc,
     94 	_bus_dmamem_free,
     95 	_bus_dmamem_map,
     96 	_bus_dmamem_unmap,
     97 	_bus_dmamem_mmap,
     98 };
     99 
    100 void
    101 pci_attach_hook(struct device *parent, struct device *self,
    102     struct pcibus_attach_args *pba)
    103 {
    104 
    105 	/* Nothing to do. */
    106 }
    107 
    108 int
    109 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
    110 {
    111 
    112 	/*
    113 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
    114 	 * use, can have devices 0-32 (i.e. the `normal' range).
    115 	 */
    116 	return (32);
    117 }
    118 
    119 pcitag_t
    120 pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
    121 {
    122 	pcitag_t tag;
    123 
    124 	if (bus >= 256 || device >= 32 || function >= 8)
    125 		panic("pci_make_tag: bad request");
    126 
    127 	tag = PCI_MODE1_ENABLE |
    128 		    (bus << 16) | (device << 11) | (function << 8);
    129 	return tag;
    130 }
    131 
    132 void
    133 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp)
    134 {
    135 
    136 	if (bp != NULL)
    137 		*bp = (tag >> 16) & 0xff;
    138 	if (dp != NULL)
    139 		*dp = (tag >> 11) & 0x1f;
    140 	if (fp != NULL)
    141 		*fp = (tag >> 8) & 0x7;
    142 	return;
    143 }
    144 
    145 pcireg_t
    146 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
    147 {
    148 	pcireg_t data;
    149 
    150 	out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
    151 	data = in32rb(PCI_MODE1_DATA_REG);
    152 	out32rb(PCI_MODE1_ADDRESS_REG, 0);
    153 	return data;
    154 }
    155 
    156 void
    157 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
    158 {
    159 
    160 	out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
    161 	out32rb(PCI_MODE1_DATA_REG, data);
    162 	out32rb(PCI_MODE1_ADDRESS_REG, 0);
    163 }
    164 
    165 int
    166 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    167 {
    168 	int pin = pa->pa_intrpin;
    169 	int line = pa->pa_intrline;
    170 
    171 	if (pin == 0) {
    172 		/* No IRQ used. */
    173 		goto bad;
    174 	}
    175 
    176 	if (pin > 4) {
    177 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    178 		goto bad;
    179 	}
    180 
    181 	/*
    182 	* Section 6.2.4, `Miscellaneous Functions', says that 255 means
    183 	* `unknown' or `no connection' on a PC.  We assume that a device with
    184 	* `no connection' either doesn't have an interrupt (in which case the
    185 	* pin number should be 0, and would have been noticed above), or
    186 	* wasn't configured by the BIOS (in which case we punt, since there's
    187 	* no real way we can know how the interrupt lines are mapped in the
    188 	* hardware).
    189 	*
    190 	* XXX
    191 	* Since IRQ 0 is only used by the clock, and we can't actually be sure
    192 	* that the BIOS did its job, we also recognize that as meaning that
    193 	* the BIOS has not configured the device.
    194 	*/
    195 	if (line == 0 || line == 255) {
    196 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    197 		goto bad;
    198 	} else {
    199 		if (line >= ICU_LEN) {
    200 			printf("pci_intr_map: bad interrupt line %d\n", line);
    201 			goto bad;
    202 		}
    203 		if (line == IRQ_SLAVE) {
    204 			printf("pci_intr_map: changed line 2 to line 9\n");
    205 			line = 9;
    206 		}
    207 	}
    208 
    209 	*ihp = line;
    210 	return 0;
    211 
    212 bad:
    213 	*ihp = -1;
    214 	return 1;
    215 }
    216 
    217 const char *
    218 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    219 {
    220 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    221 
    222 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
    223 		panic("pci_intr_string: bogus handle 0x%x", ih);
    224 
    225 	sprintf(irqstr, "irq %d", ih);
    226 	return (irqstr);
    227 
    228 }
    229 
    230 const struct evcnt *
    231 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    232 {
    233 
    234 	/* XXX for now, no evcnt parent reported */
    235 	return NULL;
    236 }
    237 
    238 void *
    239 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
    240     int (*func)(void *), void *arg)
    241 {
    242 
    243 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
    244 		panic("pci_intr_establish: bogus handle 0x%x", ih);
    245 
    246 	return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
    247 }
    248 
    249 void
    250 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
    251 {
    252 
    253 	isa_intr_disestablish(NULL, cookie);
    254 }
    255 
    256 void
    257 pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
    258     int swiz, int *iline)
    259 {
    260 
    261 	(*platform->pci_intr_fixup)(bus, dev, iline);
    262 }
    263