1 1.3 andvar /* $NetBSD: kbcreg.h,v 1.3 2022/10/31 20:30:23 andvar Exp $ */ 2 1.1 tsutsui 3 1.1 tsutsui /*- 4 1.2 tsutsui * Copyright (c) 2001 Izumi Tsutsui. All rights reserved. 5 1.1 tsutsui * 6 1.1 tsutsui * Redistribution and use in source and binary forms, with or without 7 1.1 tsutsui * modification, are permitted provided that the following conditions 8 1.1 tsutsui * are met: 9 1.1 tsutsui * 1. Redistributions of source code must retain the above copyright 10 1.1 tsutsui * notice, this list of conditions and the following disclaimer. 11 1.1 tsutsui * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 tsutsui * notice, this list of conditions and the following disclaimer in the 13 1.1 tsutsui * documentation and/or other materials provided with the distribution. 14 1.1 tsutsui * 15 1.1 tsutsui * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 1.1 tsutsui * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 1.1 tsutsui * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 1.1 tsutsui * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 1.1 tsutsui * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 1.1 tsutsui * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 1.1 tsutsui * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 1.1 tsutsui * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 1.2 tsutsui * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 1.2 tsutsui * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 1.1 tsutsui */ 26 1.1 tsutsui 27 1.1 tsutsui /* register port offsets */ 28 1.1 tsutsui #define KBC_KBREG_DATA 0 29 1.1 tsutsui #define KBC_KBREG_STAT 1 30 1.1 tsutsui #define KBC_KBREG_INTE 2 31 1.1 tsutsui #define KBC_KBREG_RESET 3 32 1.1 tsutsui #define KBC_KBREG_BUZZ 4 33 1.1 tsutsui 34 1.1 tsutsui #define KBC_MSREG_DATA 5 35 1.1 tsutsui #define KBC_MSREG_STAT KBC_KBREG_STAT 36 1.1 tsutsui #define KBC_MSREG_INTE 6 37 1.1 tsutsui #define KBC_MSREG_RESET 7 38 1.1 tsutsui 39 1.1 tsutsui #define KBC_INTE 0x01 /* interrupt enable */ 40 1.1 tsutsui 41 1.1 tsutsui /* status port definitions */ 42 1.1 tsutsui #define KBCSTAT_MSINT 0x04 /* mouse interrupt flag */ 43 1.3 andvar #define KBCSTAT_KBINT 0x08 /* keyboard interrupt flag */ 44 1.1 tsutsui #define KBCSTAT_MSBUF 0x10 /* mouse buffer full */ 45 1.1 tsutsui #define KBCSTAT_KBBUF 0x20 /* keyboard buffer full */ 46 1.1 tsutsui #define KBCSTAT_MSRDY 0x40 /* mouse Rx data ready */ 47 1.1 tsutsui #define KBCSTAT_KBRDY 0x80 /* keyboard Rx data ready */ 48
Indexes created Wed Oct 01 13:09:50 GMT 2025