si.c revision 1.7 1 1.7 provos /* $NetBSD: si.c,v 1.7 2002/09/27 15:36:28 provos Exp $ */
2 1.1 tsutsui
3 1.1 tsutsui /*
4 1.1 tsutsui * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.1 tsutsui * All rights reserved.
6 1.1 tsutsui *
7 1.1 tsutsui * This code is derived from software contributed to The NetBSD Foundation
8 1.1 tsutsui * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson.
9 1.1 tsutsui *
10 1.1 tsutsui * Redistribution and use in source and binary forms, with or without
11 1.1 tsutsui * modification, are permitted provided that the following conditions
12 1.1 tsutsui * are met:
13 1.1 tsutsui * 1. Redistributions of source code must retain the above copyright
14 1.1 tsutsui * notice, this list of conditions and the following disclaimer.
15 1.1 tsutsui * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 tsutsui * notice, this list of conditions and the following disclaimer in the
17 1.1 tsutsui * documentation and/or other materials provided with the distribution.
18 1.1 tsutsui * 3. All advertising materials mentioning features or use of this software
19 1.1 tsutsui * must display the following acknowledgement:
20 1.1 tsutsui * This product includes software developed by the NetBSD
21 1.1 tsutsui * Foundation, Inc. and its contributors.
22 1.1 tsutsui * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 tsutsui * contributors may be used to endorse or promote products derived
24 1.1 tsutsui * from this software without specific prior written permission.
25 1.1 tsutsui *
26 1.1 tsutsui * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 tsutsui * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 tsutsui * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 tsutsui * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 tsutsui * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 tsutsui * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 tsutsui * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 tsutsui * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 tsutsui * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 tsutsui * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 tsutsui * POSSIBILITY OF SUCH DAMAGE.
37 1.1 tsutsui */
38 1.1 tsutsui
39 1.1 tsutsui /*
40 1.1 tsutsui * This file contains the machine-dependent parts of the Sony CXD1180
41 1.1 tsutsui * controller. The machine-independent parts are in ncr5380sbc.c.
42 1.1 tsutsui * Written by Izumi Tsutsui.
43 1.1 tsutsui *
44 1.1 tsutsui * This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c
45 1.1 tsutsui */
46 1.1 tsutsui
47 1.1 tsutsui #include <sys/param.h>
48 1.1 tsutsui #include <sys/systm.h>
49 1.1 tsutsui #include <sys/device.h>
50 1.1 tsutsui #include <sys/buf.h>
51 1.2 tsutsui
52 1.2 tsutsui #include <machine/cpu.h>
53 1.1 tsutsui
54 1.1 tsutsui #include <dev/scsipi/scsipi_all.h>
55 1.1 tsutsui #include <dev/scsipi/scsiconf.h>
56 1.1 tsutsui
57 1.1 tsutsui #include <dev/ic/ncr5380reg.h>
58 1.1 tsutsui #include <dev/ic/ncr5380var.h>
59 1.1 tsutsui
60 1.1 tsutsui #include <news68k/dev/hbvar.h>
61 1.1 tsutsui #include <news68k/dev/dmac_0266.h>
62 1.1 tsutsui
63 1.1 tsutsui #define MIN_DMA_LEN 128
64 1.3 tsutsui #define DMAC_BASE 0xe0e80000 /* XXX */
65 1.1 tsutsui
66 1.1 tsutsui struct si_dma_handle {
67 1.1 tsutsui int dh_flags;
68 1.1 tsutsui #define SIDH_BUSY 0x01
69 1.1 tsutsui #define SIDH_OUT 0x02
70 1.1 tsutsui caddr_t dh_addr;
71 1.1 tsutsui int dh_len;
72 1.1 tsutsui };
73 1.1 tsutsui
74 1.1 tsutsui struct si_softc {
75 1.1 tsutsui struct ncr5380_softc ncr_sc;
76 1.1 tsutsui int sc_options;
77 1.1 tsutsui volatile struct dma_regs *sc_regs;
78 1.1 tsutsui struct si_dma_handle ncr_dma[SCI_OPENINGS];
79 1.1 tsutsui };
80 1.1 tsutsui
81 1.1 tsutsui void si_attach __P((struct device *, struct device *, void *));
82 1.1 tsutsui int si_match __P((struct device *, struct cfdata *, void *));
83 1.1 tsutsui int si_intr __P((int));
84 1.1 tsutsui
85 1.1 tsutsui void si_dma_alloc __P((struct ncr5380_softc *));
86 1.1 tsutsui void si_dma_free __P((struct ncr5380_softc *));
87 1.1 tsutsui void si_dma_setup __P((struct ncr5380_softc *));
88 1.1 tsutsui void si_dma_start __P((struct ncr5380_softc *));
89 1.1 tsutsui void si_dma_poll __P((struct ncr5380_softc *));
90 1.1 tsutsui void si_dma_eop __P((struct ncr5380_softc *));
91 1.1 tsutsui void si_dma_stop __P((struct ncr5380_softc *));
92 1.1 tsutsui
93 1.1 tsutsui struct cfattach si_ca = {
94 1.1 tsutsui sizeof(struct si_softc), si_match, si_attach
95 1.1 tsutsui };
96 1.1 tsutsui
97 1.1 tsutsui /*
98 1.1 tsutsui * Options for disconnect/reselect, DMA, and interrupts.
99 1.1 tsutsui * By default, allow disconnect/reselect on targets 4-6.
100 1.1 tsutsui * Those are normally tapes that really need it enabled.
101 1.1 tsutsui * The options are taken from the config file.
102 1.1 tsutsui */
103 1.1 tsutsui #define SI_NO_DISCONNECT 0x000ff
104 1.1 tsutsui #define SI_NO_PARITY_CHK 0x0ff00
105 1.1 tsutsui #define SI_FORCE_POLLING 0x10000
106 1.1 tsutsui #define SI_DISABLE_DMA 0x20000
107 1.1 tsutsui
108 1.1 tsutsui int si_options = 0x0f;
109 1.1 tsutsui
110 1.1 tsutsui
111 1.1 tsutsui int
112 1.1 tsutsui si_match(parent, cf, aux)
113 1.1 tsutsui struct device *parent;
114 1.1 tsutsui struct cfdata *cf;
115 1.1 tsutsui void *aux;
116 1.1 tsutsui {
117 1.1 tsutsui struct hb_attach_args *ha = aux;
118 1.1 tsutsui int addr;
119 1.1 tsutsui
120 1.1 tsutsui if (strcmp(ha->ha_name, "si"))
121 1.1 tsutsui return 0;
122 1.1 tsutsui
123 1.3 tsutsui addr = IIOV(ha->ha_address);
124 1.1 tsutsui
125 1.1 tsutsui if (badaddr((void *)addr, 1))
126 1.1 tsutsui return 0;
127 1.1 tsutsui
128 1.1 tsutsui return 1;
129 1.1 tsutsui }
130 1.1 tsutsui
131 1.1 tsutsui /*
132 1.1 tsutsui * Card attach function
133 1.1 tsutsui */
134 1.1 tsutsui
135 1.1 tsutsui void
136 1.1 tsutsui si_attach(parent, self, aux)
137 1.1 tsutsui struct device *parent, *self;
138 1.1 tsutsui void *aux;
139 1.1 tsutsui {
140 1.1 tsutsui struct si_softc *sc = (struct si_softc *)self;
141 1.1 tsutsui struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
142 1.1 tsutsui struct cfdata *cf = self->dv_cfdata;
143 1.3 tsutsui struct hb_attach_args *ha = aux;
144 1.1 tsutsui u_char *addr;
145 1.1 tsutsui
146 1.1 tsutsui /* Get options from config flags if specified. */
147 1.1 tsutsui if (cf->cf_flags)
148 1.1 tsutsui sc->sc_options = cf->cf_flags;
149 1.1 tsutsui else
150 1.1 tsutsui sc->sc_options = si_options;
151 1.1 tsutsui
152 1.1 tsutsui printf(": options=0x%x\n", sc->sc_options);
153 1.1 tsutsui
154 1.1 tsutsui ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT);
155 1.1 tsutsui ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8;
156 1.1 tsutsui if (sc->sc_options & SI_FORCE_POLLING)
157 1.1 tsutsui ncr_sc->sc_flags |= NCR5380_FORCE_POLLING;
158 1.1 tsutsui
159 1.1 tsutsui ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
160 1.1 tsutsui ncr_sc->sc_dma_alloc = si_dma_alloc;
161 1.1 tsutsui ncr_sc->sc_dma_free = si_dma_free;
162 1.1 tsutsui ncr_sc->sc_dma_poll = si_dma_poll;
163 1.1 tsutsui ncr_sc->sc_dma_setup = si_dma_setup;
164 1.1 tsutsui ncr_sc->sc_dma_start = si_dma_start;
165 1.1 tsutsui ncr_sc->sc_dma_eop = si_dma_eop;
166 1.1 tsutsui ncr_sc->sc_dma_stop = si_dma_stop;
167 1.1 tsutsui
168 1.1 tsutsui if (sc->sc_options & SI_DISABLE_DMA)
169 1.1 tsutsui /* Override this function pointer. */
170 1.1 tsutsui ncr_sc->sc_dma_alloc = NULL;
171 1.1 tsutsui
172 1.3 tsutsui addr = (u_char *)IIOV(ha->ha_address);
173 1.3 tsutsui ncr_sc->sci_r0 = addr + 0;
174 1.3 tsutsui ncr_sc->sci_r1 = addr + 1;
175 1.3 tsutsui ncr_sc->sci_r2 = addr + 2;
176 1.3 tsutsui ncr_sc->sci_r3 = addr + 3;
177 1.3 tsutsui ncr_sc->sci_r4 = addr + 4;
178 1.3 tsutsui ncr_sc->sci_r5 = addr + 5;
179 1.3 tsutsui ncr_sc->sci_r6 = addr + 6;
180 1.3 tsutsui ncr_sc->sci_r7 = addr + 7;
181 1.5 tsutsui
182 1.5 tsutsui ncr_sc->sc_rev = NCR_VARIANT_CXD1180;
183 1.1 tsutsui
184 1.1 tsutsui ncr_sc->sc_pio_in = ncr5380_pio_in;
185 1.1 tsutsui ncr_sc->sc_pio_out = ncr5380_pio_out;
186 1.1 tsutsui
187 1.6 bouyer ncr_sc->sc_adapter.adapt_minphys = minphys;
188 1.6 bouyer ncr_sc->sc_channel.chan_id = 7;
189 1.1 tsutsui
190 1.1 tsutsui /* soft reset DMAC */
191 1.1 tsutsui sc->sc_regs = (void *)IIOV(DMAC_BASE);
192 1.1 tsutsui sc->sc_regs->ctl = DC_CTL_RST;
193 1.1 tsutsui
194 1.4 tsutsui ncr5380_attach(ncr_sc);
195 1.1 tsutsui }
196 1.1 tsutsui
197 1.1 tsutsui int
198 1.1 tsutsui si_intr(unit)
199 1.1 tsutsui int unit;
200 1.1 tsutsui {
201 1.1 tsutsui struct si_softc *sc;
202 1.1 tsutsui extern struct cfdriver si_cd;
203 1.1 tsutsui
204 1.1 tsutsui if (unit >= si_cd.cd_ndevs)
205 1.1 tsutsui return 0;
206 1.1 tsutsui
207 1.1 tsutsui sc = si_cd.cd_devs[unit];
208 1.1 tsutsui (void)ncr5380_intr(&sc->ncr_sc);
209 1.1 tsutsui
210 1.1 tsutsui return 0;
211 1.1 tsutsui }
212 1.1 tsutsui
213 1.1 tsutsui /*
214 1.1 tsutsui * DMA routines for news1700 machines
215 1.1 tsutsui */
216 1.1 tsutsui
217 1.1 tsutsui void
218 1.1 tsutsui si_dma_alloc(ncr_sc)
219 1.1 tsutsui struct ncr5380_softc *ncr_sc;
220 1.1 tsutsui {
221 1.1 tsutsui struct si_softc *sc = (struct si_softc *)ncr_sc;
222 1.1 tsutsui struct sci_req *sr = ncr_sc->sc_current;
223 1.1 tsutsui struct scsipi_xfer *xs = sr->sr_xs;
224 1.1 tsutsui struct si_dma_handle *dh;
225 1.1 tsutsui int xlen, i;
226 1.1 tsutsui
227 1.1 tsutsui #ifdef DIAGNOSTIC
228 1.1 tsutsui if (sr->sr_dma_hand != NULL)
229 1.1 tsutsui panic("si_dma_alloc: already have DMA handle");
230 1.1 tsutsui #endif
231 1.1 tsutsui
232 1.1 tsutsui /* Polled transfers shouldn't allocate a DMA handle. */
233 1.1 tsutsui if (sr->sr_flags & SR_IMMED)
234 1.1 tsutsui return;
235 1.1 tsutsui
236 1.1 tsutsui xlen = ncr_sc->sc_datalen;
237 1.1 tsutsui
238 1.1 tsutsui /* Make sure our caller checked sc_min_dma_len. */
239 1.1 tsutsui if (xlen < MIN_DMA_LEN)
240 1.7 provos panic("si_dma_alloc: len=0x%x", xlen);
241 1.1 tsutsui
242 1.1 tsutsui /*
243 1.1 tsutsui * Find free DMA handle. Guaranteed to find one since we
244 1.1 tsutsui * have as many DMA handles as the driver has processes.
245 1.1 tsutsui * (instances?)
246 1.1 tsutsui */
247 1.1 tsutsui for (i = 0; i < SCI_OPENINGS; i++) {
248 1.1 tsutsui if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0)
249 1.1 tsutsui goto found;
250 1.1 tsutsui }
251 1.1 tsutsui panic("si_dma_alloc(): no free DMA handles");
252 1.1 tsutsui found:
253 1.1 tsutsui dh = &sc->ncr_dma[i];
254 1.1 tsutsui dh->dh_flags = SIDH_BUSY;
255 1.1 tsutsui dh->dh_addr = ncr_sc->sc_dataptr;
256 1.1 tsutsui dh->dh_len = xlen;
257 1.1 tsutsui
258 1.1 tsutsui /* Remember dest buffer parameters */
259 1.1 tsutsui if (xs->xs_control & XS_CTL_DATA_OUT)
260 1.1 tsutsui dh->dh_flags |= SIDH_OUT;
261 1.1 tsutsui
262 1.1 tsutsui sr->sr_dma_hand = dh;
263 1.1 tsutsui }
264 1.1 tsutsui
265 1.1 tsutsui void
266 1.1 tsutsui si_dma_free(ncr_sc)
267 1.1 tsutsui struct ncr5380_softc *ncr_sc;
268 1.1 tsutsui {
269 1.1 tsutsui struct sci_req *sr = ncr_sc->sc_current;
270 1.1 tsutsui struct si_dma_handle *dh = sr->sr_dma_hand;
271 1.1 tsutsui
272 1.1 tsutsui if (dh->dh_flags & SIDH_BUSY)
273 1.1 tsutsui dh->dh_flags = 0;
274 1.1 tsutsui else
275 1.1 tsutsui printf("si_dma_free: free'ing unused buffer\n");
276 1.1 tsutsui
277 1.1 tsutsui sr->sr_dma_hand = NULL;
278 1.1 tsutsui }
279 1.1 tsutsui
280 1.1 tsutsui void
281 1.1 tsutsui si_dma_setup(ncr_sc)
282 1.1 tsutsui struct ncr5380_softc *ncr_sc;
283 1.1 tsutsui {
284 1.1 tsutsui /* Do nothing here */
285 1.1 tsutsui }
286 1.1 tsutsui
287 1.1 tsutsui void
288 1.1 tsutsui si_dma_start(ncr_sc)
289 1.1 tsutsui struct ncr5380_softc *ncr_sc;
290 1.1 tsutsui {
291 1.1 tsutsui struct si_softc *sc = (struct si_softc *)ncr_sc;
292 1.1 tsutsui volatile struct dma_regs *dmac = sc->sc_regs;
293 1.1 tsutsui struct sci_req *sr = ncr_sc->sc_current;
294 1.1 tsutsui struct si_dma_handle *dh = sr->sr_dma_hand;
295 1.1 tsutsui u_int addr, offset, rest;
296 1.1 tsutsui long len;
297 1.1 tsutsui int i;
298 1.1 tsutsui
299 1.1 tsutsui /*
300 1.1 tsutsui * Set the news68k-specific registers.
301 1.1 tsutsui */
302 1.1 tsutsui
303 1.1 tsutsui /* reset DMAC */
304 1.1 tsutsui dmac->ctl = DC_CTL_RST;
305 1.1 tsutsui dmac->ctl = 0;
306 1.1 tsutsui
307 1.1 tsutsui addr = (u_int)dh->dh_addr;
308 1.1 tsutsui offset = addr & DMAC_SEG_OFFSET;
309 1.1 tsutsui len = (u_int)dh->dh_len;
310 1.1 tsutsui
311 1.1 tsutsui /* set DMA transfer length and offset of first segment */
312 1.1 tsutsui dmac->tcnt = len;
313 1.1 tsutsui dmac->offset = offset;
314 1.1 tsutsui
315 1.1 tsutsui /* set first DMA segment address */
316 1.1 tsutsui dmac->tag = 0;
317 1.1 tsutsui dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT;
318 1.1 tsutsui rest = DMAC_SEG_SIZE - offset;
319 1.1 tsutsui addr += rest;
320 1.1 tsutsui len -= rest;
321 1.1 tsutsui
322 1.1 tsutsui /* set all the rest segments */
323 1.1 tsutsui for (i = 1; len > 0; i++) {
324 1.1 tsutsui dmac->tag = i;
325 1.1 tsutsui dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT;
326 1.1 tsutsui len -= DMAC_SEG_SIZE;
327 1.1 tsutsui addr += DMAC_SEG_SIZE;
328 1.1 tsutsui }
329 1.1 tsutsui /* terminate TAG */
330 1.1 tsutsui dmac->tag = 0;
331 1.1 tsutsui
332 1.1 tsutsui /*
333 1.1 tsutsui * Now from the 5380-internal DMA registers.
334 1.1 tsutsui */
335 1.1 tsutsui if (dh->dh_flags & SIDH_OUT) {
336 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT);
337 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA);
338 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
339 1.1 tsutsui | SCI_MODE_DMA);
340 1.1 tsutsui
341 1.1 tsutsui /* set Dir */
342 1.1 tsutsui dmac->ctl = 0;
343 1.1 tsutsui
344 1.1 tsutsui /* start DMA */
345 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_dma_send, 0);
346 1.1 tsutsui dmac->ctl = DC_CTL_ENB;
347 1.1 tsutsui } else {
348 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN);
349 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_icmd, 0);
350 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
351 1.1 tsutsui | SCI_MODE_DMA);
352 1.1 tsutsui
353 1.1 tsutsui /* set Dir */
354 1.1 tsutsui dmac->ctl = DC_CTL_MOD;
355 1.1 tsutsui
356 1.1 tsutsui /* start DMA */
357 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_irecv, 0);
358 1.1 tsutsui dmac->ctl = DC_CTL_MOD | DC_CTL_ENB;
359 1.1 tsutsui }
360 1.1 tsutsui ncr_sc->sc_state |= NCR_DOINGDMA;
361 1.1 tsutsui }
362 1.1 tsutsui
363 1.1 tsutsui /*
364 1.1 tsutsui * When?
365 1.1 tsutsui */
366 1.1 tsutsui void
367 1.1 tsutsui si_dma_poll(ncr_sc)
368 1.1 tsutsui struct ncr5380_softc *ncr_sc;
369 1.1 tsutsui {
370 1.1 tsutsui printf("si_dma_poll\n");
371 1.1 tsutsui }
372 1.1 tsutsui
373 1.1 tsutsui /*
374 1.1 tsutsui * news68k (probabry) does not use the EOP signal.
375 1.1 tsutsui */
376 1.1 tsutsui void
377 1.1 tsutsui si_dma_eop(ncr_sc)
378 1.1 tsutsui struct ncr5380_softc *ncr_sc;
379 1.1 tsutsui {
380 1.1 tsutsui printf("si_dma_eop\n");
381 1.1 tsutsui }
382 1.1 tsutsui
383 1.1 tsutsui void
384 1.1 tsutsui si_dma_stop(ncr_sc)
385 1.1 tsutsui struct ncr5380_softc *ncr_sc;
386 1.1 tsutsui {
387 1.1 tsutsui struct si_softc *sc = (struct si_softc *)ncr_sc;
388 1.1 tsutsui volatile struct dma_regs *dmac = sc->sc_regs;
389 1.1 tsutsui struct sci_req *sr = ncr_sc->sc_current;
390 1.1 tsutsui struct si_dma_handle *dh = sr->sr_dma_hand;
391 1.1 tsutsui int resid, ntrans, i;
392 1.1 tsutsui
393 1.1 tsutsui /* check DMAC interrupt status */
394 1.1 tsutsui if ((dmac->stat & DC_ST_INT) == 0) {
395 1.1 tsutsui #ifdef DEBUG
396 1.1 tsutsui printf("si_dma_stop: no DMA interrupt");
397 1.1 tsutsui #endif
398 1.1 tsutsui return; /* XXX */
399 1.1 tsutsui }
400 1.1 tsutsui
401 1.1 tsutsui if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
402 1.1 tsutsui #ifdef DEBUG
403 1.1 tsutsui printf("si_dma_stop: dma not running\n");
404 1.1 tsutsui #endif
405 1.1 tsutsui return;
406 1.1 tsutsui }
407 1.1 tsutsui ncr_sc->sc_state &= ~NCR_DOINGDMA;
408 1.1 tsutsui
409 1.1 tsutsui /* OK, have either phase mis-match or end of DMA. */
410 1.1 tsutsui /* Set an impossible phase to prevent data movement? */
411 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID);
412 1.1 tsutsui
413 1.1 tsutsui /* Note that timeout may have set the error flag. */
414 1.1 tsutsui if (ncr_sc->sc_state & NCR_ABORTING)
415 1.1 tsutsui goto out;
416 1.1 tsutsui
417 1.1 tsutsui /*
418 1.1 tsutsui * Sometimes the FIFO buffer isn't drained when the
419 1.1 tsutsui * interrupt is posted. Just loop here and hope that
420 1.1 tsutsui * it will drain soon.
421 1.1 tsutsui */
422 1.1 tsutsui for (i = 0; i < 200000; i++) { /* 2 sec */
423 1.1 tsutsui resid = dmac->tcnt;
424 1.1 tsutsui if (resid == 0)
425 1.1 tsutsui break;
426 1.1 tsutsui DELAY(10);
427 1.1 tsutsui }
428 1.1 tsutsui
429 1.1 tsutsui if (resid)
430 1.1 tsutsui printf("si_dma_stop: resid=0x%x\n", resid);
431 1.1 tsutsui
432 1.1 tsutsui ntrans = dh->dh_len - resid;
433 1.1 tsutsui
434 1.1 tsutsui ncr_sc->sc_dataptr += ntrans;
435 1.1 tsutsui ncr_sc->sc_datalen -= ntrans;
436 1.1 tsutsui
437 1.1 tsutsui if ((dh->dh_flags & SIDH_OUT) == 0) {
438 1.1 tsutsui PCIA();
439 1.1 tsutsui }
440 1.1 tsutsui
441 1.1 tsutsui out:
442 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) &
443 1.1 tsutsui ~(SCI_MODE_DMA));
444 1.1 tsutsui NCR5380_WRITE(ncr_sc, sci_icmd, 0);
445 1.1 tsutsui }
446