si.c revision 1.1
1 /* $NetBSD: si.c,v 1.1 1999/12/09 14:53:06 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * This file contains the machine-dependent parts of the Sony CXD1180 41 * controller. The machine-independent parts are in ncr5380sbc.c. 42 * Written by Izumi Tsutsui. 43 * 44 * This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/buf.h> 51 52 #include <dev/scsipi/scsipi_all.h> 53 #include <dev/scsipi/scsiconf.h> 54 55 #include <dev/ic/ncr5380reg.h> 56 #include <dev/ic/ncr5380var.h> 57 58 #include <news68k/dev/hbvar.h> 59 #include <news68k/dev/dmac_0266.h> 60 61 #define MIN_DMA_LEN 128 62 63 struct si_dma_handle { 64 int dh_flags; 65 #define SIDH_BUSY 0x01 66 #define SIDH_OUT 0x02 67 caddr_t dh_addr; 68 int dh_len; 69 }; 70 71 struct si_softc { 72 struct ncr5380_softc ncr_sc; 73 int sc_options; 74 volatile struct dma_regs *sc_regs; 75 struct si_dma_handle ncr_dma[SCI_OPENINGS]; 76 }; 77 78 void si_attach __P((struct device *, struct device *, void *)); 79 int si_match __P((struct device *, struct cfdata *, void *)); 80 int si_intr __P((int)); 81 82 void si_dma_alloc __P((struct ncr5380_softc *)); 83 void si_dma_free __P((struct ncr5380_softc *)); 84 void si_dma_setup __P((struct ncr5380_softc *)); 85 void si_dma_start __P((struct ncr5380_softc *)); 86 void si_dma_poll __P((struct ncr5380_softc *)); 87 void si_dma_eop __P((struct ncr5380_softc *)); 88 void si_dma_stop __P((struct ncr5380_softc *)); 89 90 struct scsipi_device si_scsidev = { 91 NULL, /* use default error handler */ 92 NULL, /* do not have a start functio */ 93 NULL, /* have no async handler */ 94 NULL, /* Use default done routine */ 95 }; 96 97 struct cfattach si_ca = { 98 sizeof(struct si_softc), si_match, si_attach 99 }; 100 101 /* 102 * Options for disconnect/reselect, DMA, and interrupts. 103 * By default, allow disconnect/reselect on targets 4-6. 104 * Those are normally tapes that really need it enabled. 105 * The options are taken from the config file. 106 */ 107 #define SI_NO_DISCONNECT 0x000ff 108 #define SI_NO_PARITY_CHK 0x0ff00 109 #define SI_FORCE_POLLING 0x10000 110 #define SI_DISABLE_DMA 0x20000 111 112 int si_options = 0x0f; 113 114 115 int 116 si_match(parent, cf, aux) 117 struct device *parent; 118 struct cfdata *cf; 119 void *aux; 120 { 121 struct hb_attach_args *ha = aux; 122 int addr; 123 124 if (strcmp(ha->ha_name, "si")) 125 return 0; 126 127 switch(cf->cf_unit) { 128 129 case 0: 130 addr = IIOV(SCSI_BASE); /* XXX hard coded now... */ 131 break; 132 default: 133 return 0; 134 } 135 136 if (badaddr((void *)addr, 1)) 137 return 0; 138 139 return 1; 140 } 141 142 /* 143 * Card attach function 144 */ 145 146 void 147 si_attach(parent, self, aux) 148 struct device *parent, *self; 149 void *aux; 150 { 151 struct si_softc *sc = (struct si_softc *)self; 152 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 153 struct cfdata *cf = self->dv_cfdata; 154 /* struct hb_attach_args *ha = aux; */ 155 u_char *addr; 156 157 /* Get options from config flags if specified. */ 158 if (cf->cf_flags) 159 sc->sc_options = cf->cf_flags; 160 else 161 sc->sc_options = si_options; 162 163 printf(": options=0x%x\n", sc->sc_options); 164 165 ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT); 166 ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8; 167 if (sc->sc_options & SI_FORCE_POLLING) 168 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 169 170 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 171 ncr_sc->sc_dma_alloc = si_dma_alloc; 172 ncr_sc->sc_dma_free = si_dma_free; 173 ncr_sc->sc_dma_poll = si_dma_poll; 174 ncr_sc->sc_dma_setup = si_dma_setup; 175 ncr_sc->sc_dma_start = si_dma_start; 176 ncr_sc->sc_dma_eop = si_dma_eop; 177 ncr_sc->sc_dma_stop = si_dma_stop; 178 179 if (sc->sc_options & SI_DISABLE_DMA) 180 /* Override this function pointer. */ 181 ncr_sc->sc_dma_alloc = NULL; 182 183 addr = (u_char *)IIOV(SCSI_BASE); 184 ncr_sc->sci_r0 = addr++; 185 ncr_sc->sci_r1 = addr++; 186 ncr_sc->sci_r2 = addr++; 187 ncr_sc->sci_r3 = addr++; 188 ncr_sc->sci_r4 = addr++; 189 ncr_sc->sci_r5 = addr++; 190 ncr_sc->sci_r6 = addr++; 191 ncr_sc->sci_r7 = addr; 192 193 ncr_sc->sc_pio_in = ncr5380_pio_in; 194 ncr_sc->sc_pio_out = ncr5380_pio_out; 195 196 ncr_sc->sc_adapter.scsipi_cmd = ncr5380_scsi_cmd; 197 ncr_sc->sc_adapter.scsipi_minphys = minphys; 198 199 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 200 ncr_sc->sc_link.adapter_softc = sc; 201 ncr_sc->sc_link.scsipi_scsi.adapter_target = 7; 202 ncr_sc->sc_link.adapter = &ncr_sc->sc_adapter; 203 ncr_sc->sc_link.device = &si_scsidev; 204 ncr_sc->sc_link.type = BUS_SCSI; 205 206 /* soft reset DMAC */ 207 sc->sc_regs = (void *)IIOV(DMAC_BASE); 208 sc->sc_regs->ctl = DC_CTL_RST; 209 210 ncr5380_init(ncr_sc); 211 ncr5380_reset_scsibus(ncr_sc); 212 config_found(&(ncr_sc->sc_dev), &(ncr_sc->sc_link), scsiprint); 213 } 214 215 int 216 si_intr(unit) 217 int unit; 218 { 219 struct si_softc *sc; 220 extern struct cfdriver si_cd; 221 222 if (unit >= si_cd.cd_ndevs) 223 return 0; 224 225 sc = si_cd.cd_devs[unit]; 226 (void)ncr5380_intr(&sc->ncr_sc); 227 228 return 0; 229 } 230 231 /* 232 * DMA routines for news1700 machines 233 */ 234 235 void 236 si_dma_alloc(ncr_sc) 237 struct ncr5380_softc *ncr_sc; 238 { 239 struct si_softc *sc = (struct si_softc *)ncr_sc; 240 struct sci_req *sr = ncr_sc->sc_current; 241 struct scsipi_xfer *xs = sr->sr_xs; 242 struct si_dma_handle *dh; 243 int xlen, i; 244 245 #ifdef DIAGNOSTIC 246 if (sr->sr_dma_hand != NULL) 247 panic("si_dma_alloc: already have DMA handle"); 248 #endif 249 250 /* Polled transfers shouldn't allocate a DMA handle. */ 251 if (sr->sr_flags & SR_IMMED) 252 return; 253 254 xlen = ncr_sc->sc_datalen; 255 256 /* Make sure our caller checked sc_min_dma_len. */ 257 if (xlen < MIN_DMA_LEN) 258 panic("si_dma_alloc: len=0x%x\n", xlen); 259 260 /* 261 * Find free DMA handle. Guaranteed to find one since we 262 * have as many DMA handles as the driver has processes. 263 * (instances?) 264 */ 265 for (i = 0; i < SCI_OPENINGS; i++) { 266 if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0) 267 goto found; 268 } 269 panic("si_dma_alloc(): no free DMA handles"); 270 found: 271 dh = &sc->ncr_dma[i]; 272 dh->dh_flags = SIDH_BUSY; 273 dh->dh_addr = ncr_sc->sc_dataptr; 274 dh->dh_len = xlen; 275 276 /* Remember dest buffer parameters */ 277 if (xs->xs_control & XS_CTL_DATA_OUT) 278 dh->dh_flags |= SIDH_OUT; 279 280 sr->sr_dma_hand = dh; 281 } 282 283 void 284 si_dma_free(ncr_sc) 285 struct ncr5380_softc *ncr_sc; 286 { 287 struct sci_req *sr = ncr_sc->sc_current; 288 struct si_dma_handle *dh = sr->sr_dma_hand; 289 290 if (dh->dh_flags & SIDH_BUSY) 291 dh->dh_flags = 0; 292 else 293 printf("si_dma_free: free'ing unused buffer\n"); 294 295 sr->sr_dma_hand = NULL; 296 } 297 298 void 299 si_dma_setup(ncr_sc) 300 struct ncr5380_softc *ncr_sc; 301 { 302 /* Do nothing here */ 303 } 304 305 void 306 si_dma_start(ncr_sc) 307 struct ncr5380_softc *ncr_sc; 308 { 309 struct si_softc *sc = (struct si_softc *)ncr_sc; 310 volatile struct dma_regs *dmac = sc->sc_regs; 311 struct sci_req *sr = ncr_sc->sc_current; 312 struct si_dma_handle *dh = sr->sr_dma_hand; 313 u_int addr, offset, rest; 314 long len; 315 int i; 316 317 /* 318 * Set the news68k-specific registers. 319 */ 320 321 /* reset DMAC */ 322 dmac->ctl = DC_CTL_RST; 323 dmac->ctl = 0; 324 325 addr = (u_int)dh->dh_addr; 326 offset = addr & DMAC_SEG_OFFSET; 327 len = (u_int)dh->dh_len; 328 329 /* set DMA transfer length and offset of first segment */ 330 dmac->tcnt = len; 331 dmac->offset = offset; 332 333 /* set first DMA segment address */ 334 dmac->tag = 0; 335 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 336 rest = DMAC_SEG_SIZE - offset; 337 addr += rest; 338 len -= rest; 339 340 /* set all the rest segments */ 341 for (i = 1; len > 0; i++) { 342 dmac->tag = i; 343 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 344 len -= DMAC_SEG_SIZE; 345 addr += DMAC_SEG_SIZE; 346 } 347 /* terminate TAG */ 348 dmac->tag = 0; 349 350 /* 351 * Now from the 5380-internal DMA registers. 352 */ 353 if (dh->dh_flags & SIDH_OUT) { 354 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT); 355 NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA); 356 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 357 | SCI_MODE_DMA); 358 359 /* set Dir */ 360 dmac->ctl = 0; 361 362 /* start DMA */ 363 NCR5380_WRITE(ncr_sc, sci_dma_send, 0); 364 dmac->ctl = DC_CTL_ENB; 365 } else { 366 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN); 367 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 368 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 369 | SCI_MODE_DMA); 370 371 /* set Dir */ 372 dmac->ctl = DC_CTL_MOD; 373 374 /* start DMA */ 375 NCR5380_WRITE(ncr_sc, sci_irecv, 0); 376 dmac->ctl = DC_CTL_MOD | DC_CTL_ENB; 377 } 378 ncr_sc->sc_state |= NCR_DOINGDMA; 379 } 380 381 /* 382 * When? 383 */ 384 void 385 si_dma_poll(ncr_sc) 386 struct ncr5380_softc *ncr_sc; 387 { 388 printf("si_dma_poll\n"); 389 } 390 391 /* 392 * news68k (probabry) does not use the EOP signal. 393 */ 394 void 395 si_dma_eop(ncr_sc) 396 struct ncr5380_softc *ncr_sc; 397 { 398 printf("si_dma_eop\n"); 399 } 400 401 void 402 si_dma_stop(ncr_sc) 403 struct ncr5380_softc *ncr_sc; 404 { 405 struct si_softc *sc = (struct si_softc *)ncr_sc; 406 volatile struct dma_regs *dmac = sc->sc_regs; 407 struct sci_req *sr = ncr_sc->sc_current; 408 struct si_dma_handle *dh = sr->sr_dma_hand; 409 int resid, ntrans, i; 410 411 /* check DMAC interrupt status */ 412 if ((dmac->stat & DC_ST_INT) == 0) { 413 #ifdef DEBUG 414 printf("si_dma_stop: no DMA interrupt"); 415 #endif 416 return; /* XXX */ 417 } 418 419 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 420 #ifdef DEBUG 421 printf("si_dma_stop: dma not running\n"); 422 #endif 423 return; 424 } 425 ncr_sc->sc_state &= ~NCR_DOINGDMA; 426 427 /* OK, have either phase mis-match or end of DMA. */ 428 /* Set an impossible phase to prevent data movement? */ 429 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID); 430 431 /* Note that timeout may have set the error flag. */ 432 if (ncr_sc->sc_state & NCR_ABORTING) 433 goto out; 434 435 /* 436 * Sometimes the FIFO buffer isn't drained when the 437 * interrupt is posted. Just loop here and hope that 438 * it will drain soon. 439 */ 440 for (i = 0; i < 200000; i++) { /* 2 sec */ 441 resid = dmac->tcnt; 442 if (resid == 0) 443 break; 444 DELAY(10); 445 } 446 447 if (resid) 448 printf("si_dma_stop: resid=0x%x\n", resid); 449 450 ntrans = dh->dh_len - resid; 451 452 ncr_sc->sc_dataptr += ntrans; 453 ncr_sc->sc_datalen -= ntrans; 454 455 if ((dh->dh_flags & SIDH_OUT) == 0) { 456 PCIA(); 457 } 458 459 out: 460 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) & 461 ~(SCI_MODE_DMA)); 462 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 463 } 464
Indexes created Thu Sep 25 02:09:54 GMT 2025