si.c revision 1.12.2.2
1 /* $NetBSD: si.c,v 1.12.2.2 2004/08/25 06:57:19 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * This file contains the machine-dependent parts of the Sony CXD1180 41 * controller. The machine-independent parts are in ncr5380sbc.c. 42 * Written by Izumi Tsutsui. 43 * 44 * This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: si.c,v 1.12.2.2 2004/08/25 06:57:19 skrll Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/device.h> 53 #include <sys/buf.h> 54 55 #include <machine/cpu.h> 56 #include <m68k/cacheops.h> 57 58 #include <dev/scsipi/scsipi_all.h> 59 #include <dev/scsipi/scsiconf.h> 60 61 #include <dev/ic/ncr5380reg.h> 62 #include <dev/ic/ncr5380var.h> 63 64 #include <news68k/dev/hbvar.h> 65 #include <news68k/dev/dmac_0266.h> 66 67 #define MIN_DMA_LEN 128 68 #define DMAC_BASE 0xe0e80000 /* XXX */ 69 #define SI_REGSIZE 8 70 71 struct si_dma_handle { 72 int dh_flags; 73 #define SIDH_BUSY 0x01 74 #define SIDH_OUT 0x02 75 caddr_t dh_addr; 76 int dh_len; 77 }; 78 79 struct si_softc { 80 struct ncr5380_softc ncr_sc; 81 int sc_options; 82 volatile struct dma_regs *sc_regs; 83 struct si_dma_handle ncr_dma[SCI_OPENINGS]; 84 }; 85 86 void si_attach(struct device *, struct device *, void *); 87 int si_match(struct device *, struct cfdata *, void *); 88 int si_intr(int); 89 90 void si_dma_alloc(struct ncr5380_softc *); 91 void si_dma_free(struct ncr5380_softc *); 92 void si_dma_setup(struct ncr5380_softc *); 93 void si_dma_start(struct ncr5380_softc *); 94 void si_dma_poll(struct ncr5380_softc *); 95 void si_dma_eop(struct ncr5380_softc *); 96 void si_dma_stop(struct ncr5380_softc *); 97 98 CFATTACH_DECL(si, sizeof(struct si_softc), 99 si_match, si_attach, NULL, NULL); 100 101 /* 102 * Options for disconnect/reselect, DMA, and interrupts. 103 * By default, allow disconnect/reselect on targets 4-6. 104 * Those are normally tapes that really need it enabled. 105 * The options are taken from the config file. 106 */ 107 #define SI_NO_DISCONNECT 0x000ff 108 #define SI_NO_PARITY_CHK 0x0ff00 109 #define SI_FORCE_POLLING 0x10000 110 #define SI_DISABLE_DMA 0x20000 111 112 int si_options = 0x0f; 113 114 115 int 116 si_match(parent, cf, aux) 117 struct device *parent; 118 struct cfdata *cf; 119 void *aux; 120 { 121 struct hb_attach_args *ha = aux; 122 int addr; 123 124 if (strcmp(ha->ha_name, "si")) 125 return 0; 126 127 addr = IIOV(ha->ha_address); 128 129 if (badaddr((void *)addr, 1)) 130 return 0; 131 132 ha->ha_size = SI_REGSIZE; 133 134 return 1; 135 } 136 137 /* 138 * Card attach function 139 */ 140 141 void 142 si_attach(parent, self, aux) 143 struct device *parent, *self; 144 void *aux; 145 { 146 struct si_softc *sc = (struct si_softc *)self; 147 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 148 struct cfdata *cf = self->dv_cfdata; 149 struct hb_attach_args *ha = aux; 150 151 ncr_sc->sc_regt = ha->ha_bust; 152 if (bus_space_map(ncr_sc->sc_regt, (bus_addr_t)ha->ha_address, 153 ha->ha_size, 0, &ncr_sc->sc_regh) != 0) { 154 printf("can't map device space\n"); 155 return; 156 } 157 158 /* Get options from config flags if specified. */ 159 if (cf->cf_flags) 160 sc->sc_options = cf->cf_flags; 161 else 162 sc->sc_options = si_options; 163 164 printf(": options=0x%x\n", sc->sc_options); 165 166 ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT); 167 ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8; 168 if (sc->sc_options & SI_FORCE_POLLING) 169 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 170 171 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 172 ncr_sc->sc_dma_alloc = si_dma_alloc; 173 ncr_sc->sc_dma_free = si_dma_free; 174 ncr_sc->sc_dma_poll = si_dma_poll; 175 ncr_sc->sc_dma_setup = si_dma_setup; 176 ncr_sc->sc_dma_start = si_dma_start; 177 ncr_sc->sc_dma_eop = si_dma_eop; 178 ncr_sc->sc_dma_stop = si_dma_stop; 179 180 if (sc->sc_options & SI_DISABLE_DMA) 181 /* Override this function pointer. */ 182 ncr_sc->sc_dma_alloc = NULL; 183 184 ncr_sc->sci_r0 = 0; 185 ncr_sc->sci_r1 = 1; 186 ncr_sc->sci_r2 = 2; 187 ncr_sc->sci_r3 = 3; 188 ncr_sc->sci_r4 = 4; 189 ncr_sc->sci_r5 = 5; 190 ncr_sc->sci_r6 = 6; 191 ncr_sc->sci_r7 = 7; 192 193 ncr_sc->sc_rev = NCR_VARIANT_CXD1180; 194 195 ncr_sc->sc_pio_in = ncr5380_pio_in; 196 ncr_sc->sc_pio_out = ncr5380_pio_out; 197 198 ncr_sc->sc_adapter.adapt_minphys = minphys; 199 ncr_sc->sc_channel.chan_id = 7; 200 201 /* soft reset DMAC */ 202 sc->sc_regs = (void *)IIOV(DMAC_BASE); 203 sc->sc_regs->ctl = DC_CTL_RST; 204 205 ncr5380_attach(ncr_sc); 206 } 207 208 int 209 si_intr(unit) 210 int unit; 211 { 212 struct si_softc *sc; 213 extern struct cfdriver si_cd; 214 215 if (unit >= si_cd.cd_ndevs) 216 return 0; 217 218 sc = si_cd.cd_devs[unit]; 219 (void)ncr5380_intr(&sc->ncr_sc); 220 221 return 0; 222 } 223 224 /* 225 * DMA routines for news1700 machines 226 */ 227 228 void 229 si_dma_alloc(ncr_sc) 230 struct ncr5380_softc *ncr_sc; 231 { 232 struct si_softc *sc = (struct si_softc *)ncr_sc; 233 struct sci_req *sr = ncr_sc->sc_current; 234 struct scsipi_xfer *xs = sr->sr_xs; 235 struct si_dma_handle *dh; 236 int xlen, i; 237 238 #ifdef DIAGNOSTIC 239 if (sr->sr_dma_hand != NULL) 240 panic("si_dma_alloc: already have DMA handle"); 241 #endif 242 243 /* Polled transfers shouldn't allocate a DMA handle. */ 244 if (sr->sr_flags & SR_IMMED) 245 return; 246 247 xlen = ncr_sc->sc_datalen; 248 249 /* Make sure our caller checked sc_min_dma_len. */ 250 if (xlen < MIN_DMA_LEN) 251 panic("si_dma_alloc: len=0x%x", xlen); 252 253 /* 254 * Find free DMA handle. Guaranteed to find one since we 255 * have as many DMA handles as the driver has processes. 256 * (instances?) 257 */ 258 for (i = 0; i < SCI_OPENINGS; i++) { 259 if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0) 260 goto found; 261 } 262 panic("si_dma_alloc(): no free DMA handles"); 263 found: 264 dh = &sc->ncr_dma[i]; 265 dh->dh_flags = SIDH_BUSY; 266 dh->dh_addr = ncr_sc->sc_dataptr; 267 dh->dh_len = xlen; 268 269 /* Remember dest buffer parameters */ 270 if (xs->xs_control & XS_CTL_DATA_OUT) 271 dh->dh_flags |= SIDH_OUT; 272 273 sr->sr_dma_hand = dh; 274 } 275 276 void 277 si_dma_free(ncr_sc) 278 struct ncr5380_softc *ncr_sc; 279 { 280 struct sci_req *sr = ncr_sc->sc_current; 281 struct si_dma_handle *dh = sr->sr_dma_hand; 282 283 if (dh->dh_flags & SIDH_BUSY) 284 dh->dh_flags = 0; 285 else 286 printf("si_dma_free: free'ing unused buffer\n"); 287 288 sr->sr_dma_hand = NULL; 289 } 290 291 void 292 si_dma_setup(ncr_sc) 293 struct ncr5380_softc *ncr_sc; 294 { 295 296 /* Do nothing here */ 297 } 298 299 void 300 si_dma_start(ncr_sc) 301 struct ncr5380_softc *ncr_sc; 302 { 303 struct si_softc *sc = (struct si_softc *)ncr_sc; 304 volatile struct dma_regs *dmac = sc->sc_regs; 305 struct sci_req *sr = ncr_sc->sc_current; 306 struct si_dma_handle *dh = sr->sr_dma_hand; 307 u_int addr, offset, rest; 308 long len; 309 int i; 310 311 /* 312 * Set the news68k-specific registers. 313 */ 314 315 /* reset DMAC */ 316 dmac->ctl = DC_CTL_RST; 317 dmac->ctl = 0; 318 319 addr = (u_int)dh->dh_addr; 320 offset = addr & DMAC_SEG_OFFSET; 321 len = (u_int)dh->dh_len; 322 323 /* set DMA transfer length and offset of first segment */ 324 dmac->tcnt = len; 325 dmac->offset = offset; 326 327 /* set first DMA segment address */ 328 dmac->tag = 0; 329 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 330 rest = DMAC_SEG_SIZE - offset; 331 addr += rest; 332 len -= rest; 333 334 /* set all the rest segments */ 335 for (i = 1; len > 0; i++) { 336 dmac->tag = i; 337 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 338 len -= DMAC_SEG_SIZE; 339 addr += DMAC_SEG_SIZE; 340 } 341 /* terminate TAG */ 342 dmac->tag = 0; 343 344 /* 345 * Now from the 5380-internal DMA registers. 346 */ 347 if (dh->dh_flags & SIDH_OUT) { 348 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT); 349 NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA); 350 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 351 | SCI_MODE_DMA); 352 353 /* set Dir */ 354 dmac->ctl = 0; 355 356 /* start DMA */ 357 NCR5380_WRITE(ncr_sc, sci_dma_send, 0); 358 dmac->ctl = DC_CTL_ENB; 359 } else { 360 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN); 361 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 362 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 363 | SCI_MODE_DMA); 364 365 /* set Dir */ 366 dmac->ctl = DC_CTL_MOD; 367 368 /* start DMA */ 369 NCR5380_WRITE(ncr_sc, sci_irecv, 0); 370 dmac->ctl = DC_CTL_MOD | DC_CTL_ENB; 371 } 372 ncr_sc->sc_state |= NCR_DOINGDMA; 373 } 374 375 /* 376 * When? 377 */ 378 void 379 si_dma_poll(ncr_sc) 380 struct ncr5380_softc *ncr_sc; 381 { 382 383 printf("si_dma_poll\n"); 384 } 385 386 /* 387 * news68k (probably) does not use the EOP signal. 388 */ 389 void 390 si_dma_eop(ncr_sc) 391 struct ncr5380_softc *ncr_sc; 392 { 393 394 printf("si_dma_eop\n"); 395 } 396 397 void 398 si_dma_stop(ncr_sc) 399 struct ncr5380_softc *ncr_sc; 400 { 401 struct si_softc *sc = (struct si_softc *)ncr_sc; 402 volatile struct dma_regs *dmac = sc->sc_regs; 403 struct sci_req *sr = ncr_sc->sc_current; 404 struct si_dma_handle *dh = sr->sr_dma_hand; 405 int resid, ntrans, i; 406 407 /* check DMAC interrupt status */ 408 if ((dmac->stat & DC_ST_INT) == 0) { 409 #ifdef DEBUG 410 printf("si_dma_stop: no DMA interrupt"); 411 #endif 412 return; /* XXX */ 413 } 414 415 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 416 #ifdef DEBUG 417 printf("si_dma_stop: dma not running\n"); 418 #endif 419 return; 420 } 421 ncr_sc->sc_state &= ~NCR_DOINGDMA; 422 423 /* OK, have either phase mis-match or end of DMA. */ 424 /* Set an impossible phase to prevent data movement? */ 425 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID); 426 427 /* Note that timeout may have set the error flag. */ 428 if (ncr_sc->sc_state & NCR_ABORTING) 429 goto out; 430 431 /* 432 * Sometimes the FIFO buffer isn't drained when the 433 * interrupt is posted. Just loop here and hope that 434 * it will drain soon. 435 */ 436 for (i = 0; i < 200000; i++) { /* 2 sec */ 437 resid = dmac->tcnt; 438 if (resid == 0) 439 break; 440 DELAY(10); 441 } 442 443 if (resid) 444 printf("si_dma_stop: resid=0x%x\n", resid); 445 446 ntrans = dh->dh_len - resid; 447 448 ncr_sc->sc_dataptr += ntrans; 449 ncr_sc->sc_datalen -= ntrans; 450 451 if ((dh->dh_flags & SIDH_OUT) == 0) { 452 PCIA(); 453 } 454 455 out: 456 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) & 457 ~(SCI_MODE_DMA)); 458 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 459 } 460
Indexes created Wed Oct 15 16:09:53 GMT 2025