si.c revision 1.2
1 /* $NetBSD: si.c,v 1.2 2000/01/19 16:13:50 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * This file contains the machine-dependent parts of the Sony CXD1180 41 * controller. The machine-independent parts are in ncr5380sbc.c. 42 * Written by Izumi Tsutsui. 43 * 44 * This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/buf.h> 51 52 #include <machine/cpu.h> 53 54 #include <dev/scsipi/scsipi_all.h> 55 #include <dev/scsipi/scsiconf.h> 56 57 #include <dev/ic/ncr5380reg.h> 58 #include <dev/ic/ncr5380var.h> 59 60 #include <news68k/dev/hbvar.h> 61 #include <news68k/dev/dmac_0266.h> 62 63 #define MIN_DMA_LEN 128 64 65 struct si_dma_handle { 66 int dh_flags; 67 #define SIDH_BUSY 0x01 68 #define SIDH_OUT 0x02 69 caddr_t dh_addr; 70 int dh_len; 71 }; 72 73 struct si_softc { 74 struct ncr5380_softc ncr_sc; 75 int sc_options; 76 volatile struct dma_regs *sc_regs; 77 struct si_dma_handle ncr_dma[SCI_OPENINGS]; 78 }; 79 80 void si_attach __P((struct device *, struct device *, void *)); 81 int si_match __P((struct device *, struct cfdata *, void *)); 82 int si_intr __P((int)); 83 84 void si_dma_alloc __P((struct ncr5380_softc *)); 85 void si_dma_free __P((struct ncr5380_softc *)); 86 void si_dma_setup __P((struct ncr5380_softc *)); 87 void si_dma_start __P((struct ncr5380_softc *)); 88 void si_dma_poll __P((struct ncr5380_softc *)); 89 void si_dma_eop __P((struct ncr5380_softc *)); 90 void si_dma_stop __P((struct ncr5380_softc *)); 91 92 struct scsipi_device si_scsidev = { 93 NULL, /* use default error handler */ 94 NULL, /* do not have a start functio */ 95 NULL, /* have no async handler */ 96 NULL, /* Use default done routine */ 97 }; 98 99 struct cfattach si_ca = { 100 sizeof(struct si_softc), si_match, si_attach 101 }; 102 103 /* 104 * Options for disconnect/reselect, DMA, and interrupts. 105 * By default, allow disconnect/reselect on targets 4-6. 106 * Those are normally tapes that really need it enabled. 107 * The options are taken from the config file. 108 */ 109 #define SI_NO_DISCONNECT 0x000ff 110 #define SI_NO_PARITY_CHK 0x0ff00 111 #define SI_FORCE_POLLING 0x10000 112 #define SI_DISABLE_DMA 0x20000 113 114 int si_options = 0x0f; 115 116 117 int 118 si_match(parent, cf, aux) 119 struct device *parent; 120 struct cfdata *cf; 121 void *aux; 122 { 123 struct hb_attach_args *ha = aux; 124 int addr; 125 126 if (strcmp(ha->ha_name, "si")) 127 return 0; 128 129 switch(cf->cf_unit) { 130 131 case 0: 132 addr = IIOV(SCSI_BASE); /* XXX hard coded now... */ 133 break; 134 default: 135 return 0; 136 } 137 138 if (badaddr((void *)addr, 1)) 139 return 0; 140 141 return 1; 142 } 143 144 /* 145 * Card attach function 146 */ 147 148 void 149 si_attach(parent, self, aux) 150 struct device *parent, *self; 151 void *aux; 152 { 153 struct si_softc *sc = (struct si_softc *)self; 154 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 155 struct cfdata *cf = self->dv_cfdata; 156 /* struct hb_attach_args *ha = aux; */ 157 u_char *addr; 158 159 /* Get options from config flags if specified. */ 160 if (cf->cf_flags) 161 sc->sc_options = cf->cf_flags; 162 else 163 sc->sc_options = si_options; 164 165 printf(": options=0x%x\n", sc->sc_options); 166 167 ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT); 168 ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8; 169 if (sc->sc_options & SI_FORCE_POLLING) 170 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 171 172 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 173 ncr_sc->sc_dma_alloc = si_dma_alloc; 174 ncr_sc->sc_dma_free = si_dma_free; 175 ncr_sc->sc_dma_poll = si_dma_poll; 176 ncr_sc->sc_dma_setup = si_dma_setup; 177 ncr_sc->sc_dma_start = si_dma_start; 178 ncr_sc->sc_dma_eop = si_dma_eop; 179 ncr_sc->sc_dma_stop = si_dma_stop; 180 181 if (sc->sc_options & SI_DISABLE_DMA) 182 /* Override this function pointer. */ 183 ncr_sc->sc_dma_alloc = NULL; 184 185 addr = (u_char *)IIOV(SCSI_BASE); 186 ncr_sc->sci_r0 = addr++; 187 ncr_sc->sci_r1 = addr++; 188 ncr_sc->sci_r2 = addr++; 189 ncr_sc->sci_r3 = addr++; 190 ncr_sc->sci_r4 = addr++; 191 ncr_sc->sci_r5 = addr++; 192 ncr_sc->sci_r6 = addr++; 193 ncr_sc->sci_r7 = addr; 194 195 ncr_sc->sc_pio_in = ncr5380_pio_in; 196 ncr_sc->sc_pio_out = ncr5380_pio_out; 197 198 ncr_sc->sc_adapter.scsipi_cmd = ncr5380_scsi_cmd; 199 ncr_sc->sc_adapter.scsipi_minphys = minphys; 200 201 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 202 ncr_sc->sc_link.adapter_softc = sc; 203 ncr_sc->sc_link.scsipi_scsi.adapter_target = 7; 204 ncr_sc->sc_link.adapter = &ncr_sc->sc_adapter; 205 ncr_sc->sc_link.device = &si_scsidev; 206 ncr_sc->sc_link.type = BUS_SCSI; 207 208 /* soft reset DMAC */ 209 sc->sc_regs = (void *)IIOV(DMAC_BASE); 210 sc->sc_regs->ctl = DC_CTL_RST; 211 212 ncr5380_init(ncr_sc); 213 ncr5380_reset_scsibus(ncr_sc); 214 config_found(&(ncr_sc->sc_dev), &(ncr_sc->sc_link), scsiprint); 215 } 216 217 int 218 si_intr(unit) 219 int unit; 220 { 221 struct si_softc *sc; 222 extern struct cfdriver si_cd; 223 224 if (unit >= si_cd.cd_ndevs) 225 return 0; 226 227 sc = si_cd.cd_devs[unit]; 228 (void)ncr5380_intr(&sc->ncr_sc); 229 230 return 0; 231 } 232 233 /* 234 * DMA routines for news1700 machines 235 */ 236 237 void 238 si_dma_alloc(ncr_sc) 239 struct ncr5380_softc *ncr_sc; 240 { 241 struct si_softc *sc = (struct si_softc *)ncr_sc; 242 struct sci_req *sr = ncr_sc->sc_current; 243 struct scsipi_xfer *xs = sr->sr_xs; 244 struct si_dma_handle *dh; 245 int xlen, i; 246 247 #ifdef DIAGNOSTIC 248 if (sr->sr_dma_hand != NULL) 249 panic("si_dma_alloc: already have DMA handle"); 250 #endif 251 252 /* Polled transfers shouldn't allocate a DMA handle. */ 253 if (sr->sr_flags & SR_IMMED) 254 return; 255 256 xlen = ncr_sc->sc_datalen; 257 258 /* Make sure our caller checked sc_min_dma_len. */ 259 if (xlen < MIN_DMA_LEN) 260 panic("si_dma_alloc: len=0x%x\n", xlen); 261 262 /* 263 * Find free DMA handle. Guaranteed to find one since we 264 * have as many DMA handles as the driver has processes. 265 * (instances?) 266 */ 267 for (i = 0; i < SCI_OPENINGS; i++) { 268 if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0) 269 goto found; 270 } 271 panic("si_dma_alloc(): no free DMA handles"); 272 found: 273 dh = &sc->ncr_dma[i]; 274 dh->dh_flags = SIDH_BUSY; 275 dh->dh_addr = ncr_sc->sc_dataptr; 276 dh->dh_len = xlen; 277 278 /* Remember dest buffer parameters */ 279 if (xs->xs_control & XS_CTL_DATA_OUT) 280 dh->dh_flags |= SIDH_OUT; 281 282 sr->sr_dma_hand = dh; 283 } 284 285 void 286 si_dma_free(ncr_sc) 287 struct ncr5380_softc *ncr_sc; 288 { 289 struct sci_req *sr = ncr_sc->sc_current; 290 struct si_dma_handle *dh = sr->sr_dma_hand; 291 292 if (dh->dh_flags & SIDH_BUSY) 293 dh->dh_flags = 0; 294 else 295 printf("si_dma_free: free'ing unused buffer\n"); 296 297 sr->sr_dma_hand = NULL; 298 } 299 300 void 301 si_dma_setup(ncr_sc) 302 struct ncr5380_softc *ncr_sc; 303 { 304 /* Do nothing here */ 305 } 306 307 void 308 si_dma_start(ncr_sc) 309 struct ncr5380_softc *ncr_sc; 310 { 311 struct si_softc *sc = (struct si_softc *)ncr_sc; 312 volatile struct dma_regs *dmac = sc->sc_regs; 313 struct sci_req *sr = ncr_sc->sc_current; 314 struct si_dma_handle *dh = sr->sr_dma_hand; 315 u_int addr, offset, rest; 316 long len; 317 int i; 318 319 /* 320 * Set the news68k-specific registers. 321 */ 322 323 /* reset DMAC */ 324 dmac->ctl = DC_CTL_RST; 325 dmac->ctl = 0; 326 327 addr = (u_int)dh->dh_addr; 328 offset = addr & DMAC_SEG_OFFSET; 329 len = (u_int)dh->dh_len; 330 331 /* set DMA transfer length and offset of first segment */ 332 dmac->tcnt = len; 333 dmac->offset = offset; 334 335 /* set first DMA segment address */ 336 dmac->tag = 0; 337 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 338 rest = DMAC_SEG_SIZE - offset; 339 addr += rest; 340 len -= rest; 341 342 /* set all the rest segments */ 343 for (i = 1; len > 0; i++) { 344 dmac->tag = i; 345 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 346 len -= DMAC_SEG_SIZE; 347 addr += DMAC_SEG_SIZE; 348 } 349 /* terminate TAG */ 350 dmac->tag = 0; 351 352 /* 353 * Now from the 5380-internal DMA registers. 354 */ 355 if (dh->dh_flags & SIDH_OUT) { 356 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT); 357 NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA); 358 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 359 | SCI_MODE_DMA); 360 361 /* set Dir */ 362 dmac->ctl = 0; 363 364 /* start DMA */ 365 NCR5380_WRITE(ncr_sc, sci_dma_send, 0); 366 dmac->ctl = DC_CTL_ENB; 367 } else { 368 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN); 369 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 370 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 371 | SCI_MODE_DMA); 372 373 /* set Dir */ 374 dmac->ctl = DC_CTL_MOD; 375 376 /* start DMA */ 377 NCR5380_WRITE(ncr_sc, sci_irecv, 0); 378 dmac->ctl = DC_CTL_MOD | DC_CTL_ENB; 379 } 380 ncr_sc->sc_state |= NCR_DOINGDMA; 381 } 382 383 /* 384 * When? 385 */ 386 void 387 si_dma_poll(ncr_sc) 388 struct ncr5380_softc *ncr_sc; 389 { 390 printf("si_dma_poll\n"); 391 } 392 393 /* 394 * news68k (probabry) does not use the EOP signal. 395 */ 396 void 397 si_dma_eop(ncr_sc) 398 struct ncr5380_softc *ncr_sc; 399 { 400 printf("si_dma_eop\n"); 401 } 402 403 void 404 si_dma_stop(ncr_sc) 405 struct ncr5380_softc *ncr_sc; 406 { 407 struct si_softc *sc = (struct si_softc *)ncr_sc; 408 volatile struct dma_regs *dmac = sc->sc_regs; 409 struct sci_req *sr = ncr_sc->sc_current; 410 struct si_dma_handle *dh = sr->sr_dma_hand; 411 int resid, ntrans, i; 412 413 /* check DMAC interrupt status */ 414 if ((dmac->stat & DC_ST_INT) == 0) { 415 #ifdef DEBUG 416 printf("si_dma_stop: no DMA interrupt"); 417 #endif 418 return; /* XXX */ 419 } 420 421 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 422 #ifdef DEBUG 423 printf("si_dma_stop: dma not running\n"); 424 #endif 425 return; 426 } 427 ncr_sc->sc_state &= ~NCR_DOINGDMA; 428 429 /* OK, have either phase mis-match or end of DMA. */ 430 /* Set an impossible phase to prevent data movement? */ 431 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID); 432 433 /* Note that timeout may have set the error flag. */ 434 if (ncr_sc->sc_state & NCR_ABORTING) 435 goto out; 436 437 /* 438 * Sometimes the FIFO buffer isn't drained when the 439 * interrupt is posted. Just loop here and hope that 440 * it will drain soon. 441 */ 442 for (i = 0; i < 200000; i++) { /* 2 sec */ 443 resid = dmac->tcnt; 444 if (resid == 0) 445 break; 446 DELAY(10); 447 } 448 449 if (resid) 450 printf("si_dma_stop: resid=0x%x\n", resid); 451 452 ntrans = dh->dh_len - resid; 453 454 ncr_sc->sc_dataptr += ntrans; 455 ncr_sc->sc_datalen -= ntrans; 456 457 if ((dh->dh_flags & SIDH_OUT) == 0) { 458 PCIA(); 459 } 460 461 out: 462 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) & 463 ~(SCI_MODE_DMA)); 464 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 465 } 466
Indexes created Tue Sep 23 14:10:03 GMT 2025