si.c revision 1.20
1 /* $NetBSD: si.c,v 1.20 2007/03/04 06:00:24 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * This file contains the machine-dependent parts of the Sony CXD1180 41 * controller. The machine-independent parts are in ncr5380sbc.c. 42 * Written by Izumi Tsutsui. 43 * 44 * This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: si.c,v 1.20 2007/03/04 06:00:24 christos Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/device.h> 53 #include <sys/buf.h> 54 55 #include <machine/cpu.h> 56 #include <m68k/cacheops.h> 57 58 #include <dev/scsipi/scsipi_all.h> 59 #include <dev/scsipi/scsiconf.h> 60 61 #include <dev/ic/ncr5380reg.h> 62 #include <dev/ic/ncr5380var.h> 63 64 #include <news68k/dev/hbvar.h> 65 #include <news68k/dev/dmac_0266.h> 66 67 #include "ioconf.h" 68 69 #define MIN_DMA_LEN 128 70 #define DMAC_BASE 0xe0e80000 /* XXX */ 71 #define SI_REGSIZE 8 72 73 struct si_softc { 74 struct ncr5380_softc ncr_sc; 75 int sc_options; 76 volatile struct dma_regs *sc_regs; 77 int sc_xlen; 78 }; 79 80 static void si_attach(struct device *, struct device *, void *); 81 static int si_match(struct device *, struct cfdata *, void *); 82 int si_intr(int); 83 84 static void si_dma_alloc(struct ncr5380_softc *); 85 static void si_dma_free(struct ncr5380_softc *); 86 static void si_dma_start(struct ncr5380_softc *); 87 static void si_dma_poll(struct ncr5380_softc *); 88 static void si_dma_eop(struct ncr5380_softc *); 89 static void si_dma_stop(struct ncr5380_softc *); 90 91 CFATTACH_DECL(si, sizeof(struct si_softc), 92 si_match, si_attach, NULL, NULL); 93 94 /* 95 * Options for disconnect/reselect, DMA, and interrupts. 96 * By default, allow disconnect/reselect on targets 4-6. 97 * Those are normally tapes that really need it enabled. 98 * The options are taken from the config file. 99 */ 100 #define SI_NO_DISCONNECT 0x000ff 101 #define SI_NO_PARITY_CHK 0x0ff00 102 #define SI_FORCE_POLLING 0x10000 103 #define SI_DISABLE_DMA 0x20000 104 105 int si_options = 0x00; 106 107 108 static int 109 si_match(struct device *parent, struct cfdata *cf, void *aux) 110 { 111 struct hb_attach_args *ha = aux; 112 int addr; 113 114 if (strcmp(ha->ha_name, "si")) 115 return 0; 116 117 addr = IIOV(ha->ha_address); 118 119 if (badaddr((void *)addr, 1)) 120 return 0; 121 122 ha->ha_size = SI_REGSIZE; 123 124 return 1; 125 } 126 127 /* 128 * Card attach function 129 */ 130 131 static void 132 si_attach(struct device *parent, struct device *self, void *aux) 133 { 134 struct si_softc *sc = (struct si_softc *)self; 135 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 136 struct cfdata *cf = device_cfdata(self); 137 struct hb_attach_args *ha = aux; 138 139 ncr_sc->sc_regt = ha->ha_bust; 140 if (bus_space_map(ncr_sc->sc_regt, (bus_addr_t)ha->ha_address, 141 ha->ha_size, 0, &ncr_sc->sc_regh) != 0) { 142 printf("can't map device space\n"); 143 return; 144 } 145 146 /* Get options from config flags if specified. */ 147 if (cf->cf_flags) 148 sc->sc_options = cf->cf_flags; 149 else 150 sc->sc_options = si_options; 151 152 printf(": options=0x%x\n", sc->sc_options); 153 154 ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT); 155 ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8; 156 if (sc->sc_options & SI_FORCE_POLLING) 157 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 158 159 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 160 ncr_sc->sc_dma_alloc = si_dma_alloc; 161 ncr_sc->sc_dma_free = si_dma_free; 162 ncr_sc->sc_dma_poll = si_dma_poll; 163 ncr_sc->sc_dma_start = si_dma_start; 164 ncr_sc->sc_dma_eop = si_dma_eop; 165 ncr_sc->sc_dma_stop = si_dma_stop; 166 167 if (sc->sc_options & SI_DISABLE_DMA) 168 /* Override this function pointer. */ 169 ncr_sc->sc_dma_alloc = NULL; 170 171 ncr_sc->sci_r0 = 0; 172 ncr_sc->sci_r1 = 1; 173 ncr_sc->sci_r2 = 2; 174 ncr_sc->sci_r3 = 3; 175 ncr_sc->sci_r4 = 4; 176 ncr_sc->sci_r5 = 5; 177 ncr_sc->sci_r6 = 6; 178 ncr_sc->sci_r7 = 7; 179 180 ncr_sc->sc_rev = NCR_VARIANT_CXD1180; 181 182 ncr_sc->sc_pio_in = ncr5380_pio_in; 183 ncr_sc->sc_pio_out = ncr5380_pio_out; 184 185 ncr_sc->sc_adapter.adapt_minphys = minphys; 186 ncr_sc->sc_channel.chan_id = 7; 187 188 /* soft reset DMAC */ 189 sc->sc_regs = (void *)IIOV(DMAC_BASE); 190 sc->sc_regs->ctl = DC_CTL_RST; 191 192 ncr5380_attach(ncr_sc); 193 } 194 195 int 196 si_intr(int unit) 197 { 198 struct si_softc *sc; 199 200 if (unit >= si_cd.cd_ndevs) 201 return 0; 202 203 sc = si_cd.cd_devs[unit]; 204 (void)ncr5380_intr(&sc->ncr_sc); 205 206 return 0; 207 } 208 209 /* 210 * DMA routines for news1700 machines 211 */ 212 static void 213 si_dma_alloc(struct ncr5380_softc *ncr_sc) 214 { 215 struct sci_req *sr = ncr_sc->sc_current; 216 217 #ifdef DIAGNOSTIC 218 if (sr->sr_dma_hand != NULL) 219 panic("%s: DMA already in use", __func__); 220 #endif 221 222 /* 223 * On news68k, SCSI has its own DMAC so no need allocate it. 224 * Just mark that DMA is available. 225 */ 226 sr->sr_dma_hand = (void *)-1; 227 } 228 229 static void 230 si_dma_free(struct ncr5380_softc *ncr_sc) 231 { 232 struct sci_req *sr = ncr_sc->sc_current; 233 234 #ifdef DIAGNOSTIC 235 if (sr->sr_dma_hand == NULL) 236 panic("%s: DMA not in use", __func__); 237 #endif 238 239 sr->sr_dma_hand = NULL; 240 } 241 242 243 static void 244 si_dma_start(struct ncr5380_softc *ncr_sc) 245 { 246 struct si_softc *sc = (struct si_softc *)ncr_sc; 247 volatile struct dma_regs *dmac = sc->sc_regs; 248 struct sci_req *sr = ncr_sc->sc_current; 249 u_int addr, offset, rest; 250 long len; 251 int i; 252 253 /* reset DMAC */ 254 dmac->ctl = DC_CTL_RST; 255 dmac->ctl = 0; 256 257 addr = (u_int)ncr_sc->sc_dataptr; 258 offset = addr & DMAC_SEG_OFFSET; 259 len = sc->sc_xlen = ncr_sc->sc_datalen; 260 261 /* set DMA transfer length */ 262 dmac->tcnt = (uint32_t)len; 263 264 /* set offset of first segment */ 265 dmac->offset = offset; 266 267 /* set first DMA segment address */ 268 dmac->tag = 0; 269 dmac->mapent = kvtop((void *)addr) >> DMAC_SEG_SHIFT; 270 rest = DMAC_SEG_SIZE - offset; 271 addr += rest; 272 len -= rest; 273 274 /* set all the rest segments */ 275 for (i = 1; len > 0; i++) { 276 dmac->tag = i; 277 dmac->mapent = kvtop((void *)addr) >> DMAC_SEG_SHIFT; 278 len -= DMAC_SEG_SIZE; 279 addr += DMAC_SEG_SIZE; 280 } 281 /* terminate TAG */ 282 dmac->tag = 0; 283 284 if (sr->sr_xs->xs_control & XS_CTL_DATA_OUT) { 285 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT); 286 NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA); 287 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 288 | SCI_MODE_DMA | SCI_MODE_DMA_IE); 289 290 /* set Dir */ 291 dmac->ctl = 0; 292 293 /* start DMA */ 294 NCR5380_WRITE(ncr_sc, sci_dma_send, 0); 295 dmac->ctl = DC_CTL_ENB; 296 } else { 297 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN); 298 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 299 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 300 | SCI_MODE_DMA | SCI_MODE_DMA_IE); 301 302 /* set Dir */ 303 dmac->ctl = DC_CTL_MOD; 304 305 /* start DMA */ 306 NCR5380_WRITE(ncr_sc, sci_irecv, 0); 307 dmac->ctl = DC_CTL_MOD | DC_CTL_ENB; 308 } 309 ncr_sc->sc_state |= NCR_DOINGDMA; 310 } 311 312 /* 313 * When? 314 */ 315 static void 316 si_dma_poll(struct ncr5380_softc *ncr_sc) 317 { 318 319 printf("si_dma_poll\n"); 320 } 321 322 /* 323 * news68k (probably) does not use the EOP signal. 324 */ 325 static void 326 si_dma_eop(struct ncr5380_softc *ncr_sc) 327 { 328 329 printf("si_dma_eop\n"); 330 } 331 332 static void 333 si_dma_stop(struct ncr5380_softc *ncr_sc) 334 { 335 struct si_softc *sc = (struct si_softc *)ncr_sc; 336 volatile struct dma_regs *dmac = sc->sc_regs; 337 struct sci_req *sr = ncr_sc->sc_current; 338 int resid, ntrans; 339 340 /* check DMAC interrupt status */ 341 if ((dmac->stat & DC_ST_INT) == 0) { 342 #ifdef DEBUG 343 printf("si_dma_stop: no DMA interrupt"); 344 #endif 345 return; /* XXX */ 346 } 347 348 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 349 #ifdef DEBUG 350 printf("si_dma_stop: dma not running\n"); 351 #endif 352 return; 353 } 354 ncr_sc->sc_state &= ~NCR_DOINGDMA; 355 356 /* stop DMAC */ 357 resid = dmac->tcnt; 358 dmac->ctl &= ~DC_CTL_ENB; 359 360 /* OK, have either phase mis-match or end of DMA. */ 361 /* Set an impossible phase to prevent data movement? */ 362 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID); 363 364 /* Note that timeout may have set the error flag. */ 365 if (ncr_sc->sc_state & NCR_ABORTING) 366 goto out; 367 368 #ifdef DEBUG 369 if (resid) 370 printf("si_dma_stop: datalen = 0x%x, resid = 0x%x\n", 371 sc->sc_xlen, resid); 372 #endif 373 374 ntrans = sc->sc_xlen - resid; 375 376 ncr_sc->sc_dataptr += ntrans; 377 ncr_sc->sc_datalen -= ntrans; 378 379 if (sr->sr_xs->xs_control & XS_CTL_DATA_IN) { 380 /* flush data cache */ 381 PCIA(); 382 } 383 384 out: 385 /* reset DMAC */ 386 dmac->ctl = DC_CTL_RST; 387 dmac->ctl = 0; 388 389 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) & 390 ~(SCI_MODE_DMA | SCI_MODE_DMA_IE)); 391 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 392 } 393
Indexes created Sat Sep 27 22:09:54 GMT 2025