si.c revision 1.3
1 /* $NetBSD: si.c,v 1.3 2000/02/08 16:17:32 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * This file contains the machine-dependent parts of the Sony CXD1180 41 * controller. The machine-independent parts are in ncr5380sbc.c. 42 * Written by Izumi Tsutsui. 43 * 44 * This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/buf.h> 51 52 #include <machine/cpu.h> 53 54 #include <dev/scsipi/scsipi_all.h> 55 #include <dev/scsipi/scsiconf.h> 56 57 #include <dev/ic/ncr5380reg.h> 58 #include <dev/ic/ncr5380var.h> 59 60 #include <news68k/dev/hbvar.h> 61 #include <news68k/dev/dmac_0266.h> 62 63 #define MIN_DMA_LEN 128 64 #define DMAC_BASE 0xe0e80000 /* XXX */ 65 66 struct si_dma_handle { 67 int dh_flags; 68 #define SIDH_BUSY 0x01 69 #define SIDH_OUT 0x02 70 caddr_t dh_addr; 71 int dh_len; 72 }; 73 74 struct si_softc { 75 struct ncr5380_softc ncr_sc; 76 int sc_options; 77 volatile struct dma_regs *sc_regs; 78 struct si_dma_handle ncr_dma[SCI_OPENINGS]; 79 }; 80 81 void si_attach __P((struct device *, struct device *, void *)); 82 int si_match __P((struct device *, struct cfdata *, void *)); 83 int si_intr __P((int)); 84 85 void si_dma_alloc __P((struct ncr5380_softc *)); 86 void si_dma_free __P((struct ncr5380_softc *)); 87 void si_dma_setup __P((struct ncr5380_softc *)); 88 void si_dma_start __P((struct ncr5380_softc *)); 89 void si_dma_poll __P((struct ncr5380_softc *)); 90 void si_dma_eop __P((struct ncr5380_softc *)); 91 void si_dma_stop __P((struct ncr5380_softc *)); 92 93 struct scsipi_device si_scsidev = { 94 NULL, /* use default error handler */ 95 NULL, /* do not have a start functio */ 96 NULL, /* have no async handler */ 97 NULL, /* Use default done routine */ 98 }; 99 100 struct cfattach si_ca = { 101 sizeof(struct si_softc), si_match, si_attach 102 }; 103 104 /* 105 * Options for disconnect/reselect, DMA, and interrupts. 106 * By default, allow disconnect/reselect on targets 4-6. 107 * Those are normally tapes that really need it enabled. 108 * The options are taken from the config file. 109 */ 110 #define SI_NO_DISCONNECT 0x000ff 111 #define SI_NO_PARITY_CHK 0x0ff00 112 #define SI_FORCE_POLLING 0x10000 113 #define SI_DISABLE_DMA 0x20000 114 115 int si_options = 0x0f; 116 117 118 int 119 si_match(parent, cf, aux) 120 struct device *parent; 121 struct cfdata *cf; 122 void *aux; 123 { 124 struct hb_attach_args *ha = aux; 125 int addr; 126 127 if (strcmp(ha->ha_name, "si")) 128 return 0; 129 130 addr = IIOV(ha->ha_address); 131 132 if (badaddr((void *)addr, 1)) 133 return 0; 134 135 return 1; 136 } 137 138 /* 139 * Card attach function 140 */ 141 142 void 143 si_attach(parent, self, aux) 144 struct device *parent, *self; 145 void *aux; 146 { 147 struct si_softc *sc = (struct si_softc *)self; 148 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 149 struct cfdata *cf = self->dv_cfdata; 150 struct hb_attach_args *ha = aux; 151 u_char *addr; 152 153 /* Get options from config flags if specified. */ 154 if (cf->cf_flags) 155 sc->sc_options = cf->cf_flags; 156 else 157 sc->sc_options = si_options; 158 159 printf(": options=0x%x\n", sc->sc_options); 160 161 ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT); 162 ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8; 163 if (sc->sc_options & SI_FORCE_POLLING) 164 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 165 166 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 167 ncr_sc->sc_dma_alloc = si_dma_alloc; 168 ncr_sc->sc_dma_free = si_dma_free; 169 ncr_sc->sc_dma_poll = si_dma_poll; 170 ncr_sc->sc_dma_setup = si_dma_setup; 171 ncr_sc->sc_dma_start = si_dma_start; 172 ncr_sc->sc_dma_eop = si_dma_eop; 173 ncr_sc->sc_dma_stop = si_dma_stop; 174 175 if (sc->sc_options & SI_DISABLE_DMA) 176 /* Override this function pointer. */ 177 ncr_sc->sc_dma_alloc = NULL; 178 179 addr = (u_char *)IIOV(ha->ha_address); 180 ncr_sc->sci_r0 = addr + 0; 181 ncr_sc->sci_r1 = addr + 1; 182 ncr_sc->sci_r2 = addr + 2; 183 ncr_sc->sci_r3 = addr + 3; 184 ncr_sc->sci_r4 = addr + 4; 185 ncr_sc->sci_r5 = addr + 5; 186 ncr_sc->sci_r6 = addr + 6; 187 ncr_sc->sci_r7 = addr + 7; 188 189 ncr_sc->sc_pio_in = ncr5380_pio_in; 190 ncr_sc->sc_pio_out = ncr5380_pio_out; 191 192 ncr_sc->sc_adapter.scsipi_cmd = ncr5380_scsi_cmd; 193 ncr_sc->sc_adapter.scsipi_minphys = minphys; 194 195 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 196 ncr_sc->sc_link.adapter_softc = sc; 197 ncr_sc->sc_link.scsipi_scsi.adapter_target = 7; 198 ncr_sc->sc_link.adapter = &ncr_sc->sc_adapter; 199 ncr_sc->sc_link.device = &si_scsidev; 200 ncr_sc->sc_link.type = BUS_SCSI; 201 202 /* soft reset DMAC */ 203 sc->sc_regs = (void *)IIOV(DMAC_BASE); 204 sc->sc_regs->ctl = DC_CTL_RST; 205 206 ncr5380_init(ncr_sc); 207 ncr5380_reset_scsibus(ncr_sc); 208 config_found(&(ncr_sc->sc_dev), &(ncr_sc->sc_link), scsiprint); 209 } 210 211 int 212 si_intr(unit) 213 int unit; 214 { 215 struct si_softc *sc; 216 extern struct cfdriver si_cd; 217 218 if (unit >= si_cd.cd_ndevs) 219 return 0; 220 221 sc = si_cd.cd_devs[unit]; 222 (void)ncr5380_intr(&sc->ncr_sc); 223 224 return 0; 225 } 226 227 /* 228 * DMA routines for news1700 machines 229 */ 230 231 void 232 si_dma_alloc(ncr_sc) 233 struct ncr5380_softc *ncr_sc; 234 { 235 struct si_softc *sc = (struct si_softc *)ncr_sc; 236 struct sci_req *sr = ncr_sc->sc_current; 237 struct scsipi_xfer *xs = sr->sr_xs; 238 struct si_dma_handle *dh; 239 int xlen, i; 240 241 #ifdef DIAGNOSTIC 242 if (sr->sr_dma_hand != NULL) 243 panic("si_dma_alloc: already have DMA handle"); 244 #endif 245 246 /* Polled transfers shouldn't allocate a DMA handle. */ 247 if (sr->sr_flags & SR_IMMED) 248 return; 249 250 xlen = ncr_sc->sc_datalen; 251 252 /* Make sure our caller checked sc_min_dma_len. */ 253 if (xlen < MIN_DMA_LEN) 254 panic("si_dma_alloc: len=0x%x\n", xlen); 255 256 /* 257 * Find free DMA handle. Guaranteed to find one since we 258 * have as many DMA handles as the driver has processes. 259 * (instances?) 260 */ 261 for (i = 0; i < SCI_OPENINGS; i++) { 262 if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0) 263 goto found; 264 } 265 panic("si_dma_alloc(): no free DMA handles"); 266 found: 267 dh = &sc->ncr_dma[i]; 268 dh->dh_flags = SIDH_BUSY; 269 dh->dh_addr = ncr_sc->sc_dataptr; 270 dh->dh_len = xlen; 271 272 /* Remember dest buffer parameters */ 273 if (xs->xs_control & XS_CTL_DATA_OUT) 274 dh->dh_flags |= SIDH_OUT; 275 276 sr->sr_dma_hand = dh; 277 } 278 279 void 280 si_dma_free(ncr_sc) 281 struct ncr5380_softc *ncr_sc; 282 { 283 struct sci_req *sr = ncr_sc->sc_current; 284 struct si_dma_handle *dh = sr->sr_dma_hand; 285 286 if (dh->dh_flags & SIDH_BUSY) 287 dh->dh_flags = 0; 288 else 289 printf("si_dma_free: free'ing unused buffer\n"); 290 291 sr->sr_dma_hand = NULL; 292 } 293 294 void 295 si_dma_setup(ncr_sc) 296 struct ncr5380_softc *ncr_sc; 297 { 298 /* Do nothing here */ 299 } 300 301 void 302 si_dma_start(ncr_sc) 303 struct ncr5380_softc *ncr_sc; 304 { 305 struct si_softc *sc = (struct si_softc *)ncr_sc; 306 volatile struct dma_regs *dmac = sc->sc_regs; 307 struct sci_req *sr = ncr_sc->sc_current; 308 struct si_dma_handle *dh = sr->sr_dma_hand; 309 u_int addr, offset, rest; 310 long len; 311 int i; 312 313 /* 314 * Set the news68k-specific registers. 315 */ 316 317 /* reset DMAC */ 318 dmac->ctl = DC_CTL_RST; 319 dmac->ctl = 0; 320 321 addr = (u_int)dh->dh_addr; 322 offset = addr & DMAC_SEG_OFFSET; 323 len = (u_int)dh->dh_len; 324 325 /* set DMA transfer length and offset of first segment */ 326 dmac->tcnt = len; 327 dmac->offset = offset; 328 329 /* set first DMA segment address */ 330 dmac->tag = 0; 331 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 332 rest = DMAC_SEG_SIZE - offset; 333 addr += rest; 334 len -= rest; 335 336 /* set all the rest segments */ 337 for (i = 1; len > 0; i++) { 338 dmac->tag = i; 339 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 340 len -= DMAC_SEG_SIZE; 341 addr += DMAC_SEG_SIZE; 342 } 343 /* terminate TAG */ 344 dmac->tag = 0; 345 346 /* 347 * Now from the 5380-internal DMA registers. 348 */ 349 if (dh->dh_flags & SIDH_OUT) { 350 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT); 351 NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA); 352 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 353 | SCI_MODE_DMA); 354 355 /* set Dir */ 356 dmac->ctl = 0; 357 358 /* start DMA */ 359 NCR5380_WRITE(ncr_sc, sci_dma_send, 0); 360 dmac->ctl = DC_CTL_ENB; 361 } else { 362 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN); 363 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 364 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 365 | SCI_MODE_DMA); 366 367 /* set Dir */ 368 dmac->ctl = DC_CTL_MOD; 369 370 /* start DMA */ 371 NCR5380_WRITE(ncr_sc, sci_irecv, 0); 372 dmac->ctl = DC_CTL_MOD | DC_CTL_ENB; 373 } 374 ncr_sc->sc_state |= NCR_DOINGDMA; 375 } 376 377 /* 378 * When? 379 */ 380 void 381 si_dma_poll(ncr_sc) 382 struct ncr5380_softc *ncr_sc; 383 { 384 printf("si_dma_poll\n"); 385 } 386 387 /* 388 * news68k (probabry) does not use the EOP signal. 389 */ 390 void 391 si_dma_eop(ncr_sc) 392 struct ncr5380_softc *ncr_sc; 393 { 394 printf("si_dma_eop\n"); 395 } 396 397 void 398 si_dma_stop(ncr_sc) 399 struct ncr5380_softc *ncr_sc; 400 { 401 struct si_softc *sc = (struct si_softc *)ncr_sc; 402 volatile struct dma_regs *dmac = sc->sc_regs; 403 struct sci_req *sr = ncr_sc->sc_current; 404 struct si_dma_handle *dh = sr->sr_dma_hand; 405 int resid, ntrans, i; 406 407 /* check DMAC interrupt status */ 408 if ((dmac->stat & DC_ST_INT) == 0) { 409 #ifdef DEBUG 410 printf("si_dma_stop: no DMA interrupt"); 411 #endif 412 return; /* XXX */ 413 } 414 415 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 416 #ifdef DEBUG 417 printf("si_dma_stop: dma not running\n"); 418 #endif 419 return; 420 } 421 ncr_sc->sc_state &= ~NCR_DOINGDMA; 422 423 /* OK, have either phase mis-match or end of DMA. */ 424 /* Set an impossible phase to prevent data movement? */ 425 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID); 426 427 /* Note that timeout may have set the error flag. */ 428 if (ncr_sc->sc_state & NCR_ABORTING) 429 goto out; 430 431 /* 432 * Sometimes the FIFO buffer isn't drained when the 433 * interrupt is posted. Just loop here and hope that 434 * it will drain soon. 435 */ 436 for (i = 0; i < 200000; i++) { /* 2 sec */ 437 resid = dmac->tcnt; 438 if (resid == 0) 439 break; 440 DELAY(10); 441 } 442 443 if (resid) 444 printf("si_dma_stop: resid=0x%x\n", resid); 445 446 ntrans = dh->dh_len - resid; 447 448 ncr_sc->sc_dataptr += ntrans; 449 ncr_sc->sc_datalen -= ntrans; 450 451 if ((dh->dh_flags & SIDH_OUT) == 0) { 452 PCIA(); 453 } 454 455 out: 456 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) & 457 ~(SCI_MODE_DMA)); 458 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 459 } 460
Indexes created Wed Sep 24 05:09:52 GMT 2025