si.c revision 1.4
1 /* $NetBSD: si.c,v 1.4 2000/03/19 16:28:04 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * This file contains the machine-dependent parts of the Sony CXD1180 41 * controller. The machine-independent parts are in ncr5380sbc.c. 42 * Written by Izumi Tsutsui. 43 * 44 * This code is based on arch/vax/vsa/ncr.c and sun3/dev/si.c 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/buf.h> 51 52 #include <machine/cpu.h> 53 54 #include <dev/scsipi/scsipi_all.h> 55 #include <dev/scsipi/scsiconf.h> 56 57 #include <dev/ic/ncr5380reg.h> 58 #include <dev/ic/ncr5380var.h> 59 60 #include <news68k/dev/hbvar.h> 61 #include <news68k/dev/dmac_0266.h> 62 63 #define MIN_DMA_LEN 128 64 #define DMAC_BASE 0xe0e80000 /* XXX */ 65 66 struct si_dma_handle { 67 int dh_flags; 68 #define SIDH_BUSY 0x01 69 #define SIDH_OUT 0x02 70 caddr_t dh_addr; 71 int dh_len; 72 }; 73 74 struct si_softc { 75 struct ncr5380_softc ncr_sc; 76 int sc_options; 77 volatile struct dma_regs *sc_regs; 78 struct si_dma_handle ncr_dma[SCI_OPENINGS]; 79 }; 80 81 void si_attach __P((struct device *, struct device *, void *)); 82 int si_match __P((struct device *, struct cfdata *, void *)); 83 int si_intr __P((int)); 84 85 void si_dma_alloc __P((struct ncr5380_softc *)); 86 void si_dma_free __P((struct ncr5380_softc *)); 87 void si_dma_setup __P((struct ncr5380_softc *)); 88 void si_dma_start __P((struct ncr5380_softc *)); 89 void si_dma_poll __P((struct ncr5380_softc *)); 90 void si_dma_eop __P((struct ncr5380_softc *)); 91 void si_dma_stop __P((struct ncr5380_softc *)); 92 93 struct cfattach si_ca = { 94 sizeof(struct si_softc), si_match, si_attach 95 }; 96 97 /* 98 * Options for disconnect/reselect, DMA, and interrupts. 99 * By default, allow disconnect/reselect on targets 4-6. 100 * Those are normally tapes that really need it enabled. 101 * The options are taken from the config file. 102 */ 103 #define SI_NO_DISCONNECT 0x000ff 104 #define SI_NO_PARITY_CHK 0x0ff00 105 #define SI_FORCE_POLLING 0x10000 106 #define SI_DISABLE_DMA 0x20000 107 108 int si_options = 0x0f; 109 110 111 int 112 si_match(parent, cf, aux) 113 struct device *parent; 114 struct cfdata *cf; 115 void *aux; 116 { 117 struct hb_attach_args *ha = aux; 118 int addr; 119 120 if (strcmp(ha->ha_name, "si")) 121 return 0; 122 123 addr = IIOV(ha->ha_address); 124 125 if (badaddr((void *)addr, 1)) 126 return 0; 127 128 return 1; 129 } 130 131 /* 132 * Card attach function 133 */ 134 135 void 136 si_attach(parent, self, aux) 137 struct device *parent, *self; 138 void *aux; 139 { 140 struct si_softc *sc = (struct si_softc *)self; 141 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 142 struct cfdata *cf = self->dv_cfdata; 143 struct hb_attach_args *ha = aux; 144 u_char *addr; 145 146 /* Get options from config flags if specified. */ 147 if (cf->cf_flags) 148 sc->sc_options = cf->cf_flags; 149 else 150 sc->sc_options = si_options; 151 152 printf(": options=0x%x\n", sc->sc_options); 153 154 ncr_sc->sc_no_disconnect = (sc->sc_options & SI_NO_DISCONNECT); 155 ncr_sc->sc_parity_disable = (sc->sc_options & SI_NO_PARITY_CHK) >> 8; 156 if (sc->sc_options & SI_FORCE_POLLING) 157 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 158 159 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 160 ncr_sc->sc_dma_alloc = si_dma_alloc; 161 ncr_sc->sc_dma_free = si_dma_free; 162 ncr_sc->sc_dma_poll = si_dma_poll; 163 ncr_sc->sc_dma_setup = si_dma_setup; 164 ncr_sc->sc_dma_start = si_dma_start; 165 ncr_sc->sc_dma_eop = si_dma_eop; 166 ncr_sc->sc_dma_stop = si_dma_stop; 167 168 if (sc->sc_options & SI_DISABLE_DMA) 169 /* Override this function pointer. */ 170 ncr_sc->sc_dma_alloc = NULL; 171 172 addr = (u_char *)IIOV(ha->ha_address); 173 ncr_sc->sci_r0 = addr + 0; 174 ncr_sc->sci_r1 = addr + 1; 175 ncr_sc->sci_r2 = addr + 2; 176 ncr_sc->sci_r3 = addr + 3; 177 ncr_sc->sci_r4 = addr + 4; 178 ncr_sc->sci_r5 = addr + 5; 179 ncr_sc->sci_r6 = addr + 6; 180 ncr_sc->sci_r7 = addr + 7; 181 182 ncr_sc->sc_pio_in = ncr5380_pio_in; 183 ncr_sc->sc_pio_out = ncr5380_pio_out; 184 185 ncr_sc->sc_adapter.scsipi_minphys = minphys; 186 ncr_sc->sc_link.scsipi_scsi.adapter_target = 7; 187 188 /* soft reset DMAC */ 189 sc->sc_regs = (void *)IIOV(DMAC_BASE); 190 sc->sc_regs->ctl = DC_CTL_RST; 191 192 ncr5380_attach(ncr_sc); 193 } 194 195 int 196 si_intr(unit) 197 int unit; 198 { 199 struct si_softc *sc; 200 extern struct cfdriver si_cd; 201 202 if (unit >= si_cd.cd_ndevs) 203 return 0; 204 205 sc = si_cd.cd_devs[unit]; 206 (void)ncr5380_intr(&sc->ncr_sc); 207 208 return 0; 209 } 210 211 /* 212 * DMA routines for news1700 machines 213 */ 214 215 void 216 si_dma_alloc(ncr_sc) 217 struct ncr5380_softc *ncr_sc; 218 { 219 struct si_softc *sc = (struct si_softc *)ncr_sc; 220 struct sci_req *sr = ncr_sc->sc_current; 221 struct scsipi_xfer *xs = sr->sr_xs; 222 struct si_dma_handle *dh; 223 int xlen, i; 224 225 #ifdef DIAGNOSTIC 226 if (sr->sr_dma_hand != NULL) 227 panic("si_dma_alloc: already have DMA handle"); 228 #endif 229 230 /* Polled transfers shouldn't allocate a DMA handle. */ 231 if (sr->sr_flags & SR_IMMED) 232 return; 233 234 xlen = ncr_sc->sc_datalen; 235 236 /* Make sure our caller checked sc_min_dma_len. */ 237 if (xlen < MIN_DMA_LEN) 238 panic("si_dma_alloc: len=0x%x\n", xlen); 239 240 /* 241 * Find free DMA handle. Guaranteed to find one since we 242 * have as many DMA handles as the driver has processes. 243 * (instances?) 244 */ 245 for (i = 0; i < SCI_OPENINGS; i++) { 246 if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0) 247 goto found; 248 } 249 panic("si_dma_alloc(): no free DMA handles"); 250 found: 251 dh = &sc->ncr_dma[i]; 252 dh->dh_flags = SIDH_BUSY; 253 dh->dh_addr = ncr_sc->sc_dataptr; 254 dh->dh_len = xlen; 255 256 /* Remember dest buffer parameters */ 257 if (xs->xs_control & XS_CTL_DATA_OUT) 258 dh->dh_flags |= SIDH_OUT; 259 260 sr->sr_dma_hand = dh; 261 } 262 263 void 264 si_dma_free(ncr_sc) 265 struct ncr5380_softc *ncr_sc; 266 { 267 struct sci_req *sr = ncr_sc->sc_current; 268 struct si_dma_handle *dh = sr->sr_dma_hand; 269 270 if (dh->dh_flags & SIDH_BUSY) 271 dh->dh_flags = 0; 272 else 273 printf("si_dma_free: free'ing unused buffer\n"); 274 275 sr->sr_dma_hand = NULL; 276 } 277 278 void 279 si_dma_setup(ncr_sc) 280 struct ncr5380_softc *ncr_sc; 281 { 282 /* Do nothing here */ 283 } 284 285 void 286 si_dma_start(ncr_sc) 287 struct ncr5380_softc *ncr_sc; 288 { 289 struct si_softc *sc = (struct si_softc *)ncr_sc; 290 volatile struct dma_regs *dmac = sc->sc_regs; 291 struct sci_req *sr = ncr_sc->sc_current; 292 struct si_dma_handle *dh = sr->sr_dma_hand; 293 u_int addr, offset, rest; 294 long len; 295 int i; 296 297 /* 298 * Set the news68k-specific registers. 299 */ 300 301 /* reset DMAC */ 302 dmac->ctl = DC_CTL_RST; 303 dmac->ctl = 0; 304 305 addr = (u_int)dh->dh_addr; 306 offset = addr & DMAC_SEG_OFFSET; 307 len = (u_int)dh->dh_len; 308 309 /* set DMA transfer length and offset of first segment */ 310 dmac->tcnt = len; 311 dmac->offset = offset; 312 313 /* set first DMA segment address */ 314 dmac->tag = 0; 315 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 316 rest = DMAC_SEG_SIZE - offset; 317 addr += rest; 318 len -= rest; 319 320 /* set all the rest segments */ 321 for (i = 1; len > 0; i++) { 322 dmac->tag = i; 323 dmac->mapent = kvtop((caddr_t)addr) >> DMAC_SEG_SHIFT; 324 len -= DMAC_SEG_SIZE; 325 addr += DMAC_SEG_SIZE; 326 } 327 /* terminate TAG */ 328 dmac->tag = 0; 329 330 /* 331 * Now from the 5380-internal DMA registers. 332 */ 333 if (dh->dh_flags & SIDH_OUT) { 334 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT); 335 NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA); 336 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 337 | SCI_MODE_DMA); 338 339 /* set Dir */ 340 dmac->ctl = 0; 341 342 /* start DMA */ 343 NCR5380_WRITE(ncr_sc, sci_dma_send, 0); 344 dmac->ctl = DC_CTL_ENB; 345 } else { 346 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN); 347 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 348 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) 349 | SCI_MODE_DMA); 350 351 /* set Dir */ 352 dmac->ctl = DC_CTL_MOD; 353 354 /* start DMA */ 355 NCR5380_WRITE(ncr_sc, sci_irecv, 0); 356 dmac->ctl = DC_CTL_MOD | DC_CTL_ENB; 357 } 358 ncr_sc->sc_state |= NCR_DOINGDMA; 359 } 360 361 /* 362 * When? 363 */ 364 void 365 si_dma_poll(ncr_sc) 366 struct ncr5380_softc *ncr_sc; 367 { 368 printf("si_dma_poll\n"); 369 } 370 371 /* 372 * news68k (probabry) does not use the EOP signal. 373 */ 374 void 375 si_dma_eop(ncr_sc) 376 struct ncr5380_softc *ncr_sc; 377 { 378 printf("si_dma_eop\n"); 379 } 380 381 void 382 si_dma_stop(ncr_sc) 383 struct ncr5380_softc *ncr_sc; 384 { 385 struct si_softc *sc = (struct si_softc *)ncr_sc; 386 volatile struct dma_regs *dmac = sc->sc_regs; 387 struct sci_req *sr = ncr_sc->sc_current; 388 struct si_dma_handle *dh = sr->sr_dma_hand; 389 int resid, ntrans, i; 390 391 /* check DMAC interrupt status */ 392 if ((dmac->stat & DC_ST_INT) == 0) { 393 #ifdef DEBUG 394 printf("si_dma_stop: no DMA interrupt"); 395 #endif 396 return; /* XXX */ 397 } 398 399 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 400 #ifdef DEBUG 401 printf("si_dma_stop: dma not running\n"); 402 #endif 403 return; 404 } 405 ncr_sc->sc_state &= ~NCR_DOINGDMA; 406 407 /* OK, have either phase mis-match or end of DMA. */ 408 /* Set an impossible phase to prevent data movement? */ 409 NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_INVALID); 410 411 /* Note that timeout may have set the error flag. */ 412 if (ncr_sc->sc_state & NCR_ABORTING) 413 goto out; 414 415 /* 416 * Sometimes the FIFO buffer isn't drained when the 417 * interrupt is posted. Just loop here and hope that 418 * it will drain soon. 419 */ 420 for (i = 0; i < 200000; i++) { /* 2 sec */ 421 resid = dmac->tcnt; 422 if (resid == 0) 423 break; 424 DELAY(10); 425 } 426 427 if (resid) 428 printf("si_dma_stop: resid=0x%x\n", resid); 429 430 ntrans = dh->dh_len - resid; 431 432 ncr_sc->sc_dataptr += ntrans; 433 ncr_sc->sc_datalen -= ntrans; 434 435 if ((dh->dh_flags & SIDH_OUT) == 0) { 436 PCIA(); 437 } 438 439 out: 440 NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) & 441 ~(SCI_MODE_DMA)); 442 NCR5380_WRITE(ncr_sc, sci_icmd, 0); 443 } 444
Indexes created Wed Sep 24 05:09:52 GMT 2025