Home | History | Annotate | Line # | Download | only in apbus
if_sn_ap.c revision 1.1
      1 /*	$NetBSD: if_sn_ap.c,v 1.1 1999/12/22 05:55:24 tsubai Exp $	*/
      2 
      3 /*
      4  * Copyright (C) 1997 Allen Briggs
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *      This product includes software developed by Allen Briggs
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 #include "opt_inet.h"
     34 
     35 #include <sys/param.h>
     36 #include <sys/device.h>
     37 #include <sys/errno.h>
     38 #include <sys/ioctl.h>
     39 #include <sys/socket.h>
     40 #include <sys/syslog.h>
     41 #include <sys/systm.h>
     42 
     43 #include <net/if.h>
     44 #include <net/if_ether.h>
     45 
     46 #include <machine/cpu.h>
     47 #include <machine/adrsmap.h>
     48 
     49 #include <newsmips/apbus/apbusvar.h>
     50 #include <newsmips/apbus/if_snreg.h>
     51 #include <newsmips/apbus/if_snvar.h>
     52 
     53 #define SONIC_MACROM_OFFSET	0x40
     54 
     55 #define SONIC_APBUS_REG_OFFSET	0x00010000
     56 #define SONIC_APBUS_MEM_OFFSET	0x00020000
     57 #define SONIC_APBUS_CTL_OFFSET	(-0x00100000)
     58 
     59 static int	sn_ap_match __P((struct device *, struct cfdata *, void *));
     60 static void	sn_ap_attach __P((struct device *, struct device *, void *));
     61 static int	sn_ap_getaddr __P((struct sn_softc *, u_int8_t *));
     62 
     63 struct cfattach sn_ap_ca = {
     64 	sizeof(struct sn_softc), sn_ap_match, sn_ap_attach
     65 };
     66 
     67 static int
     68 sn_ap_match(parent, cf, aux)
     69 	struct device *parent;
     70 	struct cfdata *cf;
     71 	void *aux;
     72 {
     73 	struct apbus_attach_args *apa = aux;
     74 
     75 	if (strcmp(apa->apa_name, "sonic") != 0)
     76 		return 0;
     77 
     78 	return 1;
     79 }
     80 
     81 /*
     82  * Install interface into kernel networking data structures
     83  */
     84 static void
     85 sn_ap_attach(parent, self, aux)
     86 	struct device *parent, *self;
     87 	void   *aux;
     88 {
     89 	struct sn_softc *sc = (void *)self;
     90 	struct apbus_attach_args *apa = aux;
     91 	u_int8_t myaddr[ETHER_ADDR_LEN];
     92 	u_int intrmask;
     93 
     94 	sc->sc_hwbase = (caddr_t)apa->apa_hwbase;
     95 	sc->sc_regbase = (void *)(apa->apa_hwbase + SONIC_APBUS_REG_OFFSET);
     96 	sc->space = (void *)(apa->apa_hwbase + SONIC_APBUS_MEM_OFFSET);
     97 
     98 	printf(" slot%d addr 0x%lx", apa->apa_slotno, apa->apa_hwbase);
     99 
    100 	sc->snr_dcr = DCR_WAIT0 | DCR_DMABLOCK | DCR_RFT16 | DCR_TFT16;
    101 	sc->snr_dcr2 = 0;
    102 	sc->snr_dcr |= DCR_EXBUS;
    103 	sc->bitmode = 1;
    104 
    105 	if (sn_ap_getaddr(sc, myaddr)) {
    106 		printf(": failed to get MAC address\n");
    107 		return;
    108 	}
    109 
    110 	printf("\n");
    111 
    112 	/* snsetup returns 1 if something fails */
    113 	if (snsetup(sc, myaddr))
    114 		return;
    115 
    116 	intrmask = (apa->apa_slotno == 0) ?
    117 		NEWS5000_INT0_SONIC : SLOTTOMASK(apa->apa_slotno);
    118 
    119 	apbus_intr_establish(0, /* interrupt level (0 or 1) */
    120 			     intrmask,
    121 			     0, /* priority */
    122 			     snintr, sc, apa->apa_name, apa->apa_ctlnum);
    123 }
    124 
    125 int
    126 sn_ap_getaddr(sc, lladdr)
    127 	struct sn_softc	*sc;
    128 	u_int8_t *lladdr;
    129 {
    130 	u_int *p = (u_int *)(sc->sc_hwbase + SONIC_MACROM_OFFSET);
    131 	int i;
    132 
    133 	for (i = 0; i < 6; i++) {
    134 		int h = *p++ & 0x0f;
    135 		int l = *p++ & 0x0f;
    136 		*lladdr++ = (h << 4) + l;
    137 	}
    138 
    139 	return 0;
    140 }
    141 
    142 #define APSONIC_REG	0x00
    143 #define APSONIC_NREGS	0x10
    144 
    145 #define APSONIC_ENDIAN		0x80000000 /* Endian Display bit	*/
    146 #define APSONIC_RDERR		0x00020000 /* DMA Error occur in RDMAC	*/
    147 #define APSONIC_TDERR		0x00010000 /* DMA Error occur in TDMAC	*/
    148 #define APSONIC_RDMACEN		0x00004000 /* RDMAC done Interrupt enable */
    149 #define APSONIC_TDMACEN		0x00002000 /* TDMAC done Interrupt enable */
    150 #define APSONIC_DERREN		0x00001000 /* DMA Error Interrupt enable */
    151 #define APSONIC_CH3_INTEN	0x00000800 /* Channel 3 Interrupt enable */
    152 #define APSONIC_CH2_INTEN	0x00000400 /* Channel 2 Interrupt enable */
    153 #define APSONIC_CH1_INTEN	0x00000200 /* Channel 1 Interrupt enable */
    154 #define APSONIC_CH0_INTEN	0x00000100 /* Channel 0 Interrupt enable */
    155 #define APSONIC_RDMAC		0x00000040 /* RDMAC done Interrupt	*/
    156 #define APSONIC_TDMAC		0x00000020 /* TDMAC done Interrupt	*/
    157 #define APSONIC_DERR		0x00000010 /* DMA Error Interrupt	*/
    158 #define APSONIC_CH3_INT		0x00000008 /* Channel 3 Interrupt	*/
    159 #define APSONIC_CH2_INT		0x00000004 /* Channel 2 Interrupt	*/
    160 #define APSONIC_CH1_INT		0x00000002 /* Channel 1 Interrupt	*/
    161 #define APSONIC_CH0_INT		0x00000001 /* Channel 0 Interrupt	*/
    162 
    163 #define APSONIC_INT_MASK (APSONIC_CH0_INTEN | \
    164 			  APSONIC_CH1_INTEN | \
    165 			  APSONIC_CH2_INTEN | \
    166 			  APSONIC_CH3_INTEN | \
    167 			  APSONIC_RDMACEN | \
    168 			  APSONIC_TDMACEN | \
    169 			  APSONIC_DERREN)
    170 
    171 void
    172 sn_md_init(sc)
    173 	struct sn_softc *sc;
    174 {
    175 	u_int *reg = (u_int *)(sc->sc_hwbase - 0x00100000);
    176 
    177 	reg[APSONIC_REG] = APSONIC_INT_MASK;
    178 	wbflush();
    179 	apbus_wbflush();
    180 	delay(10000);
    181 }
    182