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if_snvar.h revision 1.4.8.1
      1  1.4.8.1    kent /*	$NetBSD: if_snvar.h,v 1.4.8.1 2005/04/29 11:28:17 kent Exp $	*/
      2      1.1  tsubai 
      3      1.1  tsubai /*
      4      1.1  tsubai  * Copyright (c) 1991   Algorithmics Ltd (http://www.algor.co.uk)
      5      1.1  tsubai  * You may use, copy, and modify this program so long as you retain the
      6      1.1  tsubai  * copyright line.
      7      1.1  tsubai  */
      8      1.1  tsubai 
      9      1.1  tsubai /*
     10      1.1  tsubai  * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/newsmips vars
     11      1.1  tsubai  */
     12      1.1  tsubai 
     13      1.1  tsubai /*
     14      1.1  tsubai  * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
     15      1.1  tsubai  * and 32 bit mode (everything else) using a single GENERIC kernel
     16      1.1  tsubai  * binary, all structures have to be accessed using macros which can
     17      1.1  tsubai  * adjust the offsets appropriately.
     18      1.1  tsubai  */
     19  1.4.8.1    kent #define	SWO(m, a, o, x)	(*(uint32_t *)((uint32_t *)(a) + (o)) = (x))
     20  1.4.8.1    kent #define	SRO(m, a, o)	(*(uint32_t *)((uint32_t *)(a) + (o)) & 0xffff)
     21      1.1  tsubai 
     22      1.1  tsubai /*
     23      1.1  tsubai  * Register access macros. We use bus_space_* to talk to the Sonic
     24      1.1  tsubai  * registers. A mapping table is used in case a particular configuration
     25      1.1  tsubai  * hooked the regs up at non-word offsets.
     26      1.1  tsubai  */
     27      1.1  tsubai #define	NIC_GET(sc, reg)	((sc)->sc_regbase[(reg) * 4 + 3])
     28      1.1  tsubai #define	NIC_PUT(sc, reg, val)	((sc)->sc_regbase[(reg) * 4 + 3] = val)
     29      1.1  tsubai 
     30  1.4.8.1    kent #define	SONIC_GETDMA(p)	((uint32_t)(p))
     31      1.1  tsubai 
     32  1.4.8.1    kent #define	SN_REGSIZE	(SN_NREGS * 4)
     33      1.1  tsubai 
     34  1.4.8.1    kent void mips3_wbflush(void);
     35  1.4.8.1    kent void apbus_wbflush(void);
     36      1.1  tsubai 
     37      1.1  tsubai static __inline void
     38      1.3    matt wbflush(void)
     39      1.1  tsubai {
     40      1.1  tsubai 	mips3_wbflush();
     41      1.1  tsubai 	apbus_wbflush();
     42      1.1  tsubai };
     43      1.1  tsubai 
     44      1.1  tsubai /*
     45      1.1  tsubai  * buffer sizes in 32 bit mode
     46      1.1  tsubai  * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes
     47      1.1  tsubai  *
     48      1.1  tsubai  * 1 RxPkt is 7 words == 28 bytes
     49      1.1  tsubai  * 1 Rda   is 4 words == 16 bytes
     50      1.1  tsubai  *
     51      1.1  tsubai  * The CDA is 17 words == 68 bytes
     52      1.1  tsubai  *
     53      1.1  tsubai  * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68
     54      1.1  tsubai  */
     55      1.1  tsubai 
     56      1.1  tsubai #define NRBA    4		/* # receive buffers < NRRA */
     57  1.4.8.1    kent #define RBAMASK (NRBA - 1)
     58      1.1  tsubai #define NTDA    4		/* # transmit descriptors */
     59      1.1  tsubai #define NRRA    8		/* # receive resource descriptors */
     60  1.4.8.1    kent #define RRAMASK (NRRA - 1)	/* the reason why NRRA must be power of two */
     61      1.1  tsubai 
     62      1.1  tsubai #define FCSSIZE 4		/* size of FCS appended to packets */
     63      1.1  tsubai 
     64      1.1  tsubai /*
     65      1.1  tsubai  * maximum receive packet size plus 2 byte pad to make each
     66      1.1  tsubai  * one aligned. 4 byte slop (required for eobc)
     67      1.1  tsubai  */
     68      1.1  tsubai #define RBASIZE(sc)	(sizeof(struct ether_header) + ETHERMTU + FCSSIZE + 6)
     69      1.1  tsubai 
     70      1.1  tsubai /*
     71      1.1  tsubai  * transmit buffer area
     72      1.1  tsubai  */
     73      1.1  tsubai #define TXBSIZE	1536	/* 6*2^8 -- the same size as the 8390 TXBUF */
     74      1.1  tsubai 
     75      1.1  tsubai #define	SN_NPAGES	2 + NRBA + (NTDA/2)
     76      1.1  tsubai 
     77      1.1  tsubai typedef struct mtd {
     78      1.1  tsubai 	void		*mtd_txp;
     79  1.4.8.1    kent 	uint32_t	mtd_vtxp;
     80      1.1  tsubai 	caddr_t		mtd_buf;
     81  1.4.8.1    kent 	uint32_t	mtd_vbuf;
     82      1.1  tsubai 	struct mbuf	*mtd_mbuf;
     83      1.1  tsubai } mtd_t;
     84      1.1  tsubai 
     85      1.1  tsubai /*
     86      1.1  tsubai  * The sn_softc for NEWS5000 if_sn.
     87      1.1  tsubai  */
     88      1.1  tsubai struct sn_softc {
     89      1.1  tsubai 	struct device	sc_dev;
     90      1.1  tsubai 	struct ethercom	sc_ethercom;
     91      1.1  tsubai #define sc_if	sc_ethercom.ec_if	/* network visible interface */
     92      1.1  tsubai 
     93      1.1  tsubai 	caddr_t		sc_hwbase;	/* hardware base address */
     94  1.4.8.1    kent 	volatile uint16_t *sc_regbase;	/* register base address */
     95      1.1  tsubai 
     96      1.1  tsubai 	int		bitmode;	/* 32 bit mode == 1, 16 == 0 */
     97      1.1  tsubai 
     98  1.4.8.1    kent 	uint16_t	snr_dcr;	/* DCR for this instance */
     99  1.4.8.1    kent 	uint16_t	snr_dcr2;	/* DCR2 for this instance */
    100      1.1  tsubai 	int		slotno;		/* Slot number */
    101      1.1  tsubai 
    102      1.1  tsubai 	int		sc_rramark;	/* index into p_rra of wp */
    103      1.1  tsubai 	void		*p_rra[NRRA];	/* RX resource descs */
    104  1.4.8.1    kent 	uint32_t	v_rra[NRRA];	/* DMA addresses of p_rra */
    105  1.4.8.1    kent 	uint32_t	v_rea;		/* ptr to the end of the rra space */
    106      1.1  tsubai 
    107      1.1  tsubai 	int		sc_rxmark;	/* current hw pos in rda ring */
    108      1.1  tsubai 	int		sc_rdamark;	/* current sw pos in rda ring */
    109      1.1  tsubai 	int		sc_nrda;	/* total number of RDAs */
    110      1.1  tsubai 	caddr_t		p_rda;
    111  1.4.8.1    kent 	uint32_t	v_rda;
    112      1.1  tsubai 
    113      1.1  tsubai 	caddr_t		rbuf[NRBA];
    114      1.1  tsubai 
    115      1.1  tsubai 	struct mtd	mtda[NTDA];
    116      1.1  tsubai 	int		mtd_hw;		/* idx of first mtd given to hw */
    117      1.1  tsubai 	int		mtd_prev;	/* idx of last mtd given to hardware */
    118      1.1  tsubai 	int		mtd_free;	/* next free mtd to use */
    119      1.1  tsubai 	int		mtd_tlinko;	/*
    120      1.1  tsubai 					 * offset of tlink of last txp given
    121      1.1  tsubai 					 * to SONIC. Need to clear EOL on
    122      1.1  tsubai 					 * this word to add a desc.
    123      1.1  tsubai 					 */
    124      1.1  tsubai 	int		mtd_pint;	/* Counter to set TXP_PINT */
    125      1.1  tsubai 
    126      1.1  tsubai 	void		*p_cda;
    127  1.4.8.1    kent 	uint32_t	v_cda;
    128      1.1  tsubai 
    129      1.1  tsubai 	unsigned char	*space;
    130      1.1  tsubai };
    131      1.1  tsubai 
    132      1.1  tsubai /*
    133      1.1  tsubai  * Accessing SONIC data structures and registers as 32 bit values
    134      1.1  tsubai  * makes code endianess independent.  The SONIC is however always in
    135      1.1  tsubai  * bigendian mode so it is necessary to ensure that data structures shared
    136      1.1  tsubai  * between the CPU and the SONIC are always in bigendian order.
    137      1.1  tsubai  */
    138      1.1  tsubai 
    139      1.1  tsubai /*
    140      1.1  tsubai  * Receive Resource Descriptor
    141      1.1  tsubai  * This structure describes the buffers into which packets
    142      1.1  tsubai  * will be received.  Note that more than one packet may be
    143      1.1  tsubai  * packed into a single buffer if constraints permit.
    144      1.1  tsubai  */
    145      1.1  tsubai #define	RXRSRC_PTRLO	0	/* buffer address LO */
    146      1.1  tsubai #define	RXRSRC_PTRHI	1	/* buffer address HI */
    147      1.1  tsubai #define	RXRSRC_WCLO	2	/* buffer size (16bit words) LO */
    148      1.1  tsubai #define	RXRSRC_WCHI	3	/* buffer size (16bit words) HI */
    149      1.1  tsubai 
    150      1.1  tsubai #define	RXRSRC_SIZE(sc)	(4 * 4)
    151      1.1  tsubai 
    152      1.1  tsubai /*
    153      1.1  tsubai  * Receive Descriptor
    154      1.1  tsubai  * This structure holds information about packets received.
    155      1.1  tsubai  */
    156      1.1  tsubai #define	RXPKT_STATUS	0
    157      1.1  tsubai #define	RXPKT_BYTEC	1
    158      1.1  tsubai #define	RXPKT_PTRLO	2
    159      1.1  tsubai #define	RXPKT_PTRHI	3
    160      1.1  tsubai #define	RXPKT_SEQNO	4
    161      1.1  tsubai #define	RXPKT_RLINK	5
    162      1.1  tsubai #define	RXPKT_INUSE	6
    163      1.1  tsubai #define	RXPKT_SIZE(sc)	(7 * 4)
    164      1.1  tsubai 
    165      1.1  tsubai #define RBASEQ(x) (((x) >> 8) & 0xff)
    166      1.1  tsubai #define PSNSEQ(x) ((x) & 0xff)
    167      1.1  tsubai 
    168      1.1  tsubai /*
    169      1.1  tsubai  * Transmit Descriptor
    170      1.1  tsubai  * This structure holds information about packets to be transmitted.
    171      1.1  tsubai  */
    172      1.1  tsubai #define FRAGMAX	8		/* maximum number of fragments in a packet */
    173      1.1  tsubai 
    174      1.1  tsubai #define	TXP_STATUS	0	/* + transmitted packet status */
    175      1.1  tsubai #define	TXP_CONFIG	1	/* transmission configuration */
    176      1.1  tsubai #define	TXP_PKTSIZE	2	/* entire packet size in bytes */
    177      1.1  tsubai #define	TXP_FRAGCNT	3	/* # fragments in packet */
    178      1.1  tsubai 
    179      1.1  tsubai #define	TXP_FRAGOFF	4	/* offset to first fragment */
    180      1.1  tsubai #define	TXP_FRAGSIZE	3	/* size of each fragment desc */
    181      1.1  tsubai #define	TXP_FPTRLO	0	/* ptr to packet fragment LO */
    182      1.1  tsubai #define	TXP_FPTRHI	1	/* ptr to packet fragment HI */
    183      1.1  tsubai #define	TXP_FSIZE	2	/* fragment size */
    184      1.1  tsubai 
    185  1.4.8.1    kent #define	TXP_WORDS	(TXP_FRAGOFF + (FRAGMAX * TXP_FRAGSIZE) + 1)	/* 1 for tlink */
    186      1.1  tsubai #define	TXP_SIZE(sc)	(TXP_WORDS*4)
    187      1.1  tsubai 
    188      1.1  tsubai #define EOL	0x0001		/* end of list marker for link fields */
    189      1.1  tsubai 
    190      1.1  tsubai /*
    191      1.1  tsubai  * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
    192      1.1  tsubai  * match incoming addresses against. It is programmed via DMA
    193      1.1  tsubai  * from a memory region.
    194      1.1  tsubai  */
    195      1.1  tsubai #define MAXCAM	16	/* number of user entries in CAM */
    196      1.1  tsubai #define	CDA_CAMDESC	4	/* # words i na descriptor */
    197      1.1  tsubai #define	CDA_CAMEP	0	/* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
    198      1.1  tsubai #define	CDA_CAMAP0	1	/* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
    199      1.1  tsubai #define	CDA_CAMAP1	2	/* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
    200      1.1  tsubai #define	CDA_CAMAP2	3
    201      1.1  tsubai #define	CDA_ENABLE	64	/* mask enabling CAM entries */
    202  1.4.8.1    kent #define	CDA_SIZE(sc)	((4 * 16 + 1) * ((sc->bitmode) ? 4 : 2))
    203      1.1  tsubai 
    204  1.4.8.1    kent int	snsetup(struct sn_softc *sc, uint8_t *);
    205  1.4.8.1    kent int	snintr(void *);
    206  1.4.8.1    kent void	sn_md_init(struct sn_softc *);
    207