if_snvar.h revision 1.12.26.1 1 /* $NetBSD: if_snvar.h,v 1.12.26.1 2011/03/05 20:51:24 rmind Exp $ */
2
3 /*
4 * Copyright (c) 1991 Algorithmics Ltd (http://www.algor.co.uk)
5 * You may use, copy, and modify this program so long as you retain the
6 * copyright line.
7 */
8
9 /*
10 * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/newsmips vars
11 */
12
13 /*
14 * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
15 * and 32 bit mode (everything else) using a single GENERIC kernel
16 * binary, all structures have to be accessed using macros which can
17 * adjust the offsets appropriately.
18 */
19 #define SWO(m, a, o, x) (*(uint32_t *)((uint32_t *)(a) + (o)) = (x))
20 #define SRO(m, a, o) (*(uint32_t *)((uint32_t *)(a) + (o)) & 0xffff)
21
22 /*
23 * Register access macros. We use bus_space_* to talk to the Sonic
24 * registers. A mapping table is used in case a particular configuration
25 * hooked the regs up at non-word offsets.
26 */
27 #define NIC_GET(sc, reg) ((sc)->sc_regbase[(reg) * 4 + 3])
28 #define NIC_PUT(sc, reg, val) ((sc)->sc_regbase[(reg) * 4 + 3] = val)
29
30 #define SONIC_GETDMA(p) ((uint32_t)(p))
31
32 #define SN_REGSIZE (SN_NREGS * 4)
33
34 #include <mips/locore.h>
35
36 /*
37 * buffer sizes in 32 bit mode
38 * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes
39 *
40 * 1 RxPkt is 7 words == 28 bytes
41 * 1 Rda is 4 words == 16 bytes
42 *
43 * The CDA is 17 words == 68 bytes
44 *
45 * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68
46 */
47
48 #define NRBA 4 /* # receive buffers < NRRA */
49 #define RBAMASK (NRBA - 1)
50 #define NTDA 4 /* # transmit descriptors */
51 #define NRRA 8 /* # receive resource descriptors */
52 #define RRAMASK (NRRA - 1) /* the reason why NRRA must be power of two */
53
54 #define FCSSIZE 4 /* size of FCS appended to packets */
55
56 /*
57 * maximum receive packet size plus 2 byte pad to make each
58 * one aligned. 4 byte slop (required for eobc)
59 */
60 #define RBASIZE(sc) (ETHER_HDR_LEN + ETHERMTU + FCSSIZE + 6)
61
62 /*
63 * transmit buffer area
64 */
65 #define TXBSIZE 1536 /* 6*2^8 -- the same size as the 8390 TXBUF */
66
67 #define SN_NPAGES 2 + NRBA + (NTDA / 2)
68
69 typedef struct mtd {
70 void *mtd_txp;
71 uint32_t mtd_vtxp;
72 void *mtd_buf;
73 uint32_t mtd_vbuf;
74 struct mbuf *mtd_mbuf;
75 } mtd_t;
76
77 /*
78 * The sn_softc for NEWS5000 if_sn.
79 */
80 struct sn_softc {
81 device_t sc_dev;
82 struct ethercom sc_ethercom;
83 #define sc_if sc_ethercom.ec_if /* network visible interface */
84
85 void * sc_hwbase; /* hardware base address */
86 volatile uint16_t *sc_regbase; /* register base address */
87
88 int bitmode; /* 32 bit mode == 1, 16 == 0 */
89
90 uint16_t snr_dcr; /* DCR for this instance */
91 uint16_t snr_dcr2; /* DCR2 for this instance */
92 int slotno; /* Slot number */
93
94 int sc_rramark; /* index into p_rra of wp */
95 void *p_rra[NRRA]; /* RX resource descs */
96 uint32_t v_rra[NRRA]; /* DMA addresses of p_rra */
97 uint32_t v_rea; /* ptr to the end of the rra space */
98
99 int sc_rxmark; /* current hw pos in rda ring */
100 int sc_rdamark; /* current sw pos in rda ring */
101 int sc_nrda; /* total number of RDAs */
102 void *p_rda;
103 uint32_t v_rda;
104
105 void *rbuf[NRBA];
106
107 struct mtd mtda[NTDA];
108 int mtd_hw; /* idx of first mtd given to hw */
109 int mtd_prev; /* idx of last mtd given to hardware */
110 int mtd_free; /* next free mtd to use */
111 int mtd_tlinko; /*
112 * offset of tlink of last txp given
113 * to SONIC. Need to clear EOL on
114 * this word to add a desc.
115 */
116 int mtd_pint; /* Counter to set TXP_PINT */
117
118 void *p_cda;
119 uint32_t v_cda;
120
121 unsigned char *space;
122 };
123
124 /*
125 * Accessing SONIC data structures and registers as 32 bit values
126 * makes code endianess independent. The SONIC is however always in
127 * bigendian mode so it is necessary to ensure that data structures shared
128 * between the CPU and the SONIC are always in bigendian order.
129 */
130
131 /*
132 * Receive Resource Descriptor
133 * This structure describes the buffers into which packets
134 * will be received. Note that more than one packet may be
135 * packed into a single buffer if constraints permit.
136 */
137 #define RXRSRC_PTRLO 0 /* buffer address LO */
138 #define RXRSRC_PTRHI 1 /* buffer address HI */
139 #define RXRSRC_WCLO 2 /* buffer size (16bit words) LO */
140 #define RXRSRC_WCHI 3 /* buffer size (16bit words) HI */
141
142 #define RXRSRC_SIZE(sc) (4 * 4)
143
144 /*
145 * Receive Descriptor
146 * This structure holds information about packets received.
147 */
148 #define RXPKT_STATUS 0
149 #define RXPKT_BYTEC 1
150 #define RXPKT_PTRLO 2
151 #define RXPKT_PTRHI 3
152 #define RXPKT_SEQNO 4
153 #define RXPKT_RLINK 5
154 #define RXPKT_INUSE 6
155 #define RXPKT_SIZE(sc) (7 * 4)
156
157 #define RBASEQ(x) (((x) >> 8) & 0xff)
158 #define PSNSEQ(x) ((x) & 0xff)
159
160 /*
161 * Transmit Descriptor
162 * This structure holds information about packets to be transmitted.
163 */
164 #define FRAGMAX 8 /* maximum number of fragments in a packet */
165
166 #define TXP_STATUS 0 /* + transmitted packet status */
167 #define TXP_CONFIG 1 /* transmission configuration */
168 #define TXP_PKTSIZE 2 /* entire packet size in bytes */
169 #define TXP_FRAGCNT 3 /* # fragments in packet */
170
171 #define TXP_FRAGOFF 4 /* offset to first fragment */
172 #define TXP_FRAGSIZE 3 /* size of each fragment desc */
173 #define TXP_FPTRLO 0 /* ptr to packet fragment LO */
174 #define TXP_FPTRHI 1 /* ptr to packet fragment HI */
175 #define TXP_FSIZE 2 /* fragment size */
176
177 #define TXP_WORDS (TXP_FRAGOFF + (FRAGMAX * TXP_FRAGSIZE) + 1) /* 1 for tlink */
178 #define TXP_SIZE(sc) (TXP_WORDS*4)
179
180 #define EOL 0x0001 /* end of list marker for link fields */
181
182 /*
183 * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
184 * match incoming addresses against. It is programmed via DMA
185 * from a memory region.
186 */
187 #define MAXCAM 16 /* number of user entries in CAM */
188 #define CDA_CAMDESC 4 /* # words i na descriptor */
189 #define CDA_CAMEP 0 /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
190 #define CDA_CAMAP0 1 /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
191 #define CDA_CAMAP1 2 /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
192 #define CDA_CAMAP2 3
193 #define CDA_ENABLE 64 /* mask enabling CAM entries */
194 #define CDA_SIZE(sc) ((4 * 16 + 1) * ((sc->bitmode) ? 4 : 2))
195
196 int snsetup(struct sn_softc *sc, uint8_t *);
197 int snintr(void *);
198 void sn_md_init(struct sn_softc *);
199