if_tlp_ap.c revision 1.5
1 /* $NetBSD: if_tlp_ap.c,v 1.5 2003/05/03 18:10:53 wiz Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Atsushi Onoe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/errno.h> 42 #include <sys/ioctl.h> 43 #include <sys/malloc.h> 44 #include <sys/socket.h> 45 #include <sys/syslog.h> 46 #include <sys/systm.h> 47 48 #include <net/if.h> 49 #include <net/if_dl.h> 50 #include <net/if_media.h> 51 #include <net/if_ether.h> 52 53 #include <machine/bus.h> 54 #include <machine/intr.h> 55 56 #include <mips/cache.h> 57 58 #include <dev/mii/miivar.h> 59 #include <dev/mii/mii_bitbang.h> 60 61 #include <dev/ic/tulipreg.h> 62 #include <dev/ic/tulipvar.h> 63 64 #include <newsmips/apbus/apbusvar.h> 65 66 #define TLP_AP_ROM 0x00000000 /* AProm entry address */ 67 #define TLP_AP_CFG 0x00040000 /* PCI configuration registers */ 68 #define TLP_AP_CFG_CFID 0x00 /* Identification */ 69 #define TLP_AP_CFG_CFCS 0x04 /* Command and status */ 70 #define TLP_AP_CFG_CFRV 0x08 /* Revision */ 71 #define TLP_AP_CFG_CFLT 0x0c /* Latency timer */ 72 #define TLP_AP_CFG_CBIO 0x10 /* Base I/O address */ 73 #define TLP_AP_CFG_CBMA 0x14 /* Base memory address */ 74 #define TLP_AP_CFG_CFIT 0x3c /* Interrupt */ 75 #define TLP_AP_CSR 0x00080000 /* CSR base address */ 76 #define TLP_AP_RST 0x00100000 /* Board Reset */ 77 78 79 extern void tlp_idle __P((struct tulip_softc *, u_int32_t)); 80 81 struct tulip_ap_softc { 82 struct tulip_softc sc_tulip; /* real Tulip softc */ 83 bus_space_tag_t sc_cfst; 84 bus_space_handle_t sc_cfsh; 85 }; 86 87 static int tlp_ap_match __P((struct device *, struct cfdata *, void *)); 88 static void tlp_ap_attach __P((struct device *, struct device *, void *)); 89 90 CFATTACH_DECL(tlp_ap, sizeof(struct tulip_ap_softc), 91 tlp_ap_match, tlp_ap_attach, NULL, NULL); 92 93 static void tlp_ap_preinit __P((struct tulip_softc *)); 94 static void tlp_ap_tmsw_init __P((struct tulip_softc *)); 95 static void tlp_ap_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 96 static int tlp_ap_setmedia __P((struct tulip_softc *)); 97 98 const struct tulip_mediasw tlp_ap_mediasw = { 99 tlp_ap_tmsw_init, tlp_ap_getmedia, tlp_ap_setmedia 100 }; 101 102 static int 103 tlp_ap_match(parent, cf, aux) 104 struct device *parent; 105 struct cfdata *cf; 106 void *aux; 107 { 108 struct apbus_attach_args *apa = aux; 109 110 if (strcmp(apa->apa_name, "cbasetx") != 0) 111 return 0; 112 113 return 1; 114 } 115 116 /* 117 * Install interface into kernel networking data structures 118 */ 119 static void 120 tlp_ap_attach(parent, self, aux) 121 struct device *parent, *self; 122 void *aux; 123 { 124 struct tulip_ap_softc *psc = (void *) self; 125 struct tulip_softc *sc = &psc->sc_tulip; 126 struct apbus_attach_args *apa = aux; 127 u_int8_t enaddr[ETHER_ADDR_LEN]; 128 u_int intrmask; 129 int i; 130 131 printf(" slot%d addr 0x%lx", apa->apa_slotno, apa->apa_hwbase); 132 133 /* PCI configuration register */ 134 psc->sc_cfst = 0; 135 psc->sc_cfsh = apa->apa_hwbase + TLP_AP_CFG; 136 sc->sc_devno = apa->apa_slotno; 137 sc->sc_rev = bus_space_read_4(psc->sc_cfst, psc->sc_cfsh, 138 TLP_AP_CFG_CFRV); 139 switch (bus_space_read_4(psc->sc_cfst, psc->sc_cfsh, TLP_AP_CFG_CFID)) { 140 case 0x00091011: 141 if (sc->sc_rev >= 0x20) 142 sc->sc_chip = TULIP_CHIP_21140A; 143 else 144 sc->sc_chip = TULIP_CHIP_21140; 145 break; 146 default: 147 printf(": unable to handle your board\n"); 148 return; 149 } 150 151 printf(": %s Ethernet, pass %d.%d\n", 152 tlp_chip_names[sc->sc_chip], 153 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 154 155 /* CSR */ 156 sc->sc_st = 0; 157 sc->sc_sh = apa->apa_hwbase + TLP_AP_CSR; 158 sc->sc_dmat = apbus_dmatag_init(apa); 159 if (sc->sc_dmat == NULL) { 160 printf("%s: cannot allocate memory\n", sc->sc_dev.dv_xname); 161 return; 162 } 163 164 /* 165 * Initialize bus specific parameters. 166 */ 167 if (mips_sdcache_line_size > 0) 168 sc->sc_cacheline = mips_sdcache_line_size / 4; 169 else if (mips_pdcache_line_size > 0) 170 sc->sc_cacheline = mips_pdcache_line_size / 4; 171 else 172 sc->sc_cacheline = 4; 173 sc->sc_maxburst = sc->sc_cacheline; /* XXX */ 174 sc->sc_regshift = 3; 175 sc->sc_flags |= TULIPF_DBO | TULIPF_BLE; /* Big Endian BUS */ 176 sc->sc_flags |= TULIPF_ENABLED; /* No Power Mgmt */ 177 178 /* 179 * Reset hardware. 180 */ 181 bus_space_write_4(0, apa->apa_hwbase + TLP_AP_RST, 0, 1); 182 delay(100); 183 184 /* 185 * Initialize PCI configuration register 186 */ 187 bus_space_write_4(psc->sc_cfst, psc->sc_cfsh, 188 TLP_AP_CFG_CFCS, 0x00000005); /* Master, IO */ 189 bus_space_write_4(psc->sc_cfst, psc->sc_cfsh, 190 TLP_AP_CFG_CFLT, 0x00000100); 191 bus_space_write_4(psc->sc_cfst, psc->sc_cfsh, 192 TLP_AP_CFG_CBIO, MIPS_KSEG1_TO_PHYS(sc->sc_sh)); 193 bus_space_write_4(psc->sc_cfst, psc->sc_cfsh, 194 TLP_AP_CFG_CFIT, 0x00000101); 195 196 /* 197 * Initialize general purpose port register. 198 */ 199 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xc0); /* read */ 200 TULIP_WRITE(sc, CSR_GPP, 0x40); /* dipsw port on */ 201 i = TULIP_READ(sc, CSR_GPP) & GPP_MD; /* dipsw contents */ 202 TULIP_WRITE(sc, CSR_GPP, 0xc0); /* dipsw port off */ 203 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xcf); /* read write */ 204 if (sc->sc_maxburst == 16) { 205 TULIP_WRITE(sc, CSR_GPP, 0x8f); /* 16word burst */ 206 TULIP_WRITE(sc, CSR_GPP, 0xcf); 207 } else { 208 TULIP_WRITE(sc, CSR_GPP, 0x8e); /* 8word burst */ 209 TULIP_WRITE(sc, CSR_GPP, 0xce); 210 } 211 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xcf); /* read write */ 212 TULIP_WRITE(sc, CSR_GPP, 0xc3); /* mask abort/DMA err */ 213 TULIP_WRITE(sc, CSR_GPP, 0xcf); /* mask abort/DMA err */ 214 215 if (tlp_read_srom(sc) == 0) { 216 printf("%s: srom read failed\n", sc->sc_dev.dv_xname); 217 free(sc->sc_dmat, M_DEVBUF); 218 return; 219 } 220 for (i = 0; i < ETHER_ADDR_LEN; i++) 221 enaddr[i] = sc->sc_srom[0x11 + i * 2]; 222 223 sc->sc_mediasw = &tlp_ap_mediasw; 224 225 /* 226 * Finish off the attach. 227 */ 228 tlp_attach(sc, enaddr); 229 230 intrmask = SLOTTOMASK(apa->apa_slotno); 231 apbus_intr_establish(0, /* interrupt level (0 or 1) */ 232 intrmask, 233 0, /* priority */ 234 tlp_intr, sc, apa->apa_name, apa->apa_ctlnum); 235 } 236 237 static void 238 tlp_ap_preinit(sc) 239 struct tulip_softc *sc; 240 { 241 242 sc->sc_opmode |= OPMODE_MBO | OPMODE_SCR | OPMODE_PCS | OPMODE_HBD | 243 OPMODE_PS; 244 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 245 } 246 247 static void 248 tlp_ap_tmsw_init(sc) 249 struct tulip_softc *sc; 250 { 251 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 252 253 sc->sc_preinit = tlp_ap_preinit; 254 255 sc->sc_mii.mii_ifp = ifp; 256 sc->sc_mii.mii_readreg = NULL; 257 sc->sc_mii.mii_writereg = NULL; 258 sc->sc_mii.mii_statchg = sc->sc_statchg; 259 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 260 tlp_mediastatus); 261 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX, 0, NULL); 262 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, 263 NULL); 264 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 265 } 266 267 static void 268 tlp_ap_getmedia(sc, ifmr) 269 struct tulip_softc *sc; 270 struct ifmediareq *ifmr; 271 { 272 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 273 274 ifmr->ifm_status = IFM_AVALID; 275 if (ifp->if_flags & IFF_RUNNING) 276 ifmr->ifm_status |= IFM_ACTIVE; 277 ifmr->ifm_active = sc->sc_mii.mii_media_active; 278 } 279 280 static int 281 tlp_ap_setmedia(sc) 282 struct tulip_softc *sc; 283 { 284 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 285 286 sc->sc_mii.mii_media_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 287 288 if (ifp->if_flags & IFF_UP) 289 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 290 if (sc->sc_mii.mii_media_active & IFM_FDX) 291 sc->sc_opmode |= OPMODE_FD; 292 else 293 sc->sc_opmode &= ~OPMODE_FD; 294 if (ifp->if_flags & IFF_UP) 295 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 296 return (0); 297 } 298
Indexes created Tue Oct 14 08:09:56 GMT 2025