zs_ap.c revision 1.5.2.2
1 1.5.2.2 bouyer /* $NetBSD: zs_ap.c,v 1.5.2.2 2000/11/20 20:17:17 bouyer Exp $ */ 2 1.5.2.2 bouyer 3 1.5.2.2 bouyer /*- 4 1.5.2.2 bouyer * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 1.5.2.2 bouyer * All rights reserved. 6 1.5.2.2 bouyer * 7 1.5.2.2 bouyer * This code is derived from software contributed to The NetBSD Foundation 8 1.5.2.2 bouyer * by Gordon W. Ross. 9 1.5.2.2 bouyer * 10 1.5.2.2 bouyer * Redistribution and use in source and binary forms, with or without 11 1.5.2.2 bouyer * modification, are permitted provided that the following conditions 12 1.5.2.2 bouyer * are met: 13 1.5.2.2 bouyer * 1. Redistributions of source code must retain the above copyright 14 1.5.2.2 bouyer * notice, this list of conditions and the following disclaimer. 15 1.5.2.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright 16 1.5.2.2 bouyer * notice, this list of conditions and the following disclaimer in the 17 1.5.2.2 bouyer * documentation and/or other materials provided with the distribution. 18 1.5.2.2 bouyer * 3. All advertising materials mentioning features or use of this software 19 1.5.2.2 bouyer * must display the following acknowledgement: 20 1.5.2.2 bouyer * This product includes software developed by the NetBSD 21 1.5.2.2 bouyer * Foundation, Inc. and its contributors. 22 1.5.2.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.5.2.2 bouyer * contributors may be used to endorse or promote products derived 24 1.5.2.2 bouyer * from this software without specific prior written permission. 25 1.5.2.2 bouyer * 26 1.5.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.5.2.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.5.2.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.5.2.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.5.2.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.5.2.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.5.2.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.5.2.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.5.2.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.5.2.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.5.2.2 bouyer * POSSIBILITY OF SUCH DAMAGE. 37 1.5.2.2 bouyer */ 38 1.5.2.2 bouyer 39 1.5.2.2 bouyer /* 40 1.5.2.2 bouyer * Zilog Z8530 Dual UART driver (machine-dependent part) 41 1.5.2.2 bouyer * 42 1.5.2.2 bouyer * Runs two serial lines per chip using slave drivers. 43 1.5.2.2 bouyer * Plain tty/async lines use the zs_async slave. 44 1.5.2.2 bouyer * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 1.5.2.2 bouyer */ 46 1.5.2.2 bouyer 47 1.5.2.2 bouyer #include <sys/param.h> 48 1.5.2.2 bouyer #include <sys/systm.h> 49 1.5.2.2 bouyer #include <sys/device.h> 50 1.5.2.2 bouyer #include <sys/tty.h> 51 1.5.2.2 bouyer 52 1.5.2.2 bouyer #include <machine/adrsmap.h> 53 1.5.2.2 bouyer #include <machine/cpu.h> 54 1.5.2.2 bouyer #include <machine/z8530var.h> 55 1.5.2.2 bouyer 56 1.5.2.2 bouyer #include <dev/cons.h> 57 1.5.2.2 bouyer #include <dev/ic/z8530reg.h> 58 1.5.2.2 bouyer 59 1.5.2.2 bouyer #include <newsmips/apbus/apbusvar.h> 60 1.5.2.2 bouyer 61 1.5.2.2 bouyer #include "zsc.h" /* NZSC */ 62 1.5.2.2 bouyer #define NZS NZSC 63 1.5.2.2 bouyer 64 1.5.2.2 bouyer /* Make life easier for the initialized arrays here. */ 65 1.5.2.2 bouyer #if NZS < 2 66 1.5.2.2 bouyer #undef NZS 67 1.5.2.2 bouyer #define NZS 2 68 1.5.2.2 bouyer #endif 69 1.5.2.2 bouyer 70 1.5.2.2 bouyer #define PORTB_XPORT 0x00000000 71 1.5.2.2 bouyer #define PORTB_RPORT 0x00010000 72 1.5.2.2 bouyer #define PORTA_XPORT 0x00020000 73 1.5.2.2 bouyer #define PORTA_RPORT 0x00030000 74 1.5.2.2 bouyer #define DMA_MODE_REG 3 75 1.5.2.2 bouyer #define DMA_ENABLE 0x01 /* DMA enable */ 76 1.5.2.2 bouyer #define DMA_DIR_DM 0x00 /* device to memory */ 77 1.5.2.2 bouyer #define DMA_DIR_MD 0x02 /* memory to device */ 78 1.5.2.2 bouyer #define DMA_EXTRDY 0x08 /* DMA external ready */ 79 1.5.2.2 bouyer #define PORTB_OFFSET 0x00040000 80 1.5.2.2 bouyer #define PORTA_OFFSET 0x00050000 81 1.5.2.2 bouyer #define PORT_CTL 2 82 1.5.2.2 bouyer #define PORTCTL_RI 0x01 83 1.5.2.2 bouyer #define PORTCTL_DSR 0x02 84 1.5.2.2 bouyer #define PORTCTL_DTR 0x04 85 1.5.2.2 bouyer #define PORT_SEL 3 86 1.5.2.2 bouyer #define PORTSEL_LOCALTALK 0x01 87 1.5.2.2 bouyer #define PORTSEL_RS232C 0x02 88 1.5.2.2 bouyer #define ESCC_REG 0x00060000 89 1.5.2.2 bouyer #define ESCCREG_INTSTAT 0 90 1.5.2.2 bouyer #define INTSTAT_SCC 0x01 91 1.5.2.2 bouyer #define ESCCREG_INTMASK 1 92 1.5.2.2 bouyer #define INTMASK_SCC 0x01 93 1.5.2.2 bouyer 94 1.5.2.2 bouyer extern int zs_def_cflag; 95 1.5.2.2 bouyer extern void (*zs_delay) __P((void)); 96 1.5.2.2 bouyer 97 1.5.2.2 bouyer /* 98 1.5.2.2 bouyer * The news5000 provides a 9.8304 MHz clock to the ZS chips. 99 1.5.2.2 bouyer */ 100 1.5.2.2 bouyer #define PCLK (9600 * 1024) /* PCLK pin input clock rate */ 101 1.5.2.2 bouyer 102 1.5.2.2 bouyer #define ZS_DELAY() DELAY(2) 103 1.5.2.2 bouyer 104 1.5.2.2 bouyer /* The layout of this is hardware-dependent (padding, order). */ 105 1.5.2.2 bouyer struct zschan { 106 1.5.2.2 bouyer volatile u_char pad1[3]; 107 1.5.2.2 bouyer volatile u_char zc_csr; /* ctrl,status, and indirect access */ 108 1.5.2.2 bouyer volatile u_char pad2[3]; 109 1.5.2.2 bouyer volatile u_char zc_data; /* data */ 110 1.5.2.2 bouyer }; 111 1.5.2.2 bouyer 112 1.5.2.2 bouyer static caddr_t zsaddr[NZS]; 113 1.5.2.2 bouyer 114 1.5.2.2 bouyer /* Flags from cninit() */ 115 1.5.2.2 bouyer static int zs_hwflags[NZS][2]; 116 1.5.2.2 bouyer 117 1.5.2.2 bouyer /* Default speed for all channels */ 118 1.5.2.2 bouyer static int zs_defspeed = 9600; 119 1.5.2.2 bouyer 120 1.5.2.2 bouyer static u_char zs_init_reg[16] = { 121 1.5.2.2 bouyer 0, /* 0: CMD (reset, etc.) */ 122 1.5.2.2 bouyer 0, /* 1: No interrupts yet. */ 123 1.5.2.2 bouyer 0, /* IVECT */ 124 1.5.2.2 bouyer ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 125 1.5.2.2 bouyer ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 126 1.5.2.2 bouyer ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 127 1.5.2.2 bouyer 0, /* 6: TXSYNC/SYNCLO */ 128 1.5.2.2 bouyer 0, /* 7: RXSYNC/SYNCHI */ 129 1.5.2.2 bouyer 0, /* 8: alias for data port */ 130 1.5.2.2 bouyer ZSWR9_MASTER_IE, 131 1.5.2.2 bouyer 0, /*10: Misc. TX/RX control bits */ 132 1.5.2.2 bouyer ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 133 1.5.2.2 bouyer ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 134 1.5.2.2 bouyer 0, /*13: BAUDHI (default=9600) */ 135 1.5.2.2 bouyer ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 136 1.5.2.2 bouyer ZSWR15_BREAK_IE, 137 1.5.2.2 bouyer }; 138 1.5.2.2 bouyer 139 1.5.2.2 bouyer static struct zschan * zs_get_chan_addr __P((int, int)); 140 1.5.2.2 bouyer static void zs_ap_delay __P((void)); 141 1.5.2.2 bouyer static int zshard_ap __P((void *)); 142 1.5.2.2 bouyer static int zs_getc __P((void *)); 143 1.5.2.2 bouyer static void zs_putc __P((void *, int)); 144 1.5.2.2 bouyer int zshard __P((void *)); 145 1.5.2.2 bouyer int zs_get_speed __P((struct zs_chanstate *)); 146 1.5.2.2 bouyer 147 1.5.2.2 bouyer struct zschan * 148 1.5.2.2 bouyer zs_get_chan_addr(zs_unit, channel) 149 1.5.2.2 bouyer int zs_unit, channel; 150 1.5.2.2 bouyer { 151 1.5.2.2 bouyer caddr_t addr; 152 1.5.2.2 bouyer struct zschan *zc; 153 1.5.2.2 bouyer 154 1.5.2.2 bouyer if (zs_unit >= NZS) 155 1.5.2.2 bouyer return NULL; 156 1.5.2.2 bouyer addr = zsaddr[zs_unit]; 157 1.5.2.2 bouyer if (addr == NULL) 158 1.5.2.2 bouyer return NULL; 159 1.5.2.2 bouyer if (channel == 0) { 160 1.5.2.2 bouyer zc = (void *)(addr + PORTA_OFFSET); 161 1.5.2.2 bouyer } else { 162 1.5.2.2 bouyer zc = (void *)(addr + PORTB_OFFSET); 163 1.5.2.2 bouyer } 164 1.5.2.2 bouyer return (zc); 165 1.5.2.2 bouyer } 166 1.5.2.2 bouyer 167 1.5.2.2 bouyer void 168 1.5.2.2 bouyer zs_ap_delay() 169 1.5.2.2 bouyer { 170 1.5.2.2 bouyer ZS_DELAY(); 171 1.5.2.2 bouyer } 172 1.5.2.2 bouyer 173 1.5.2.2 bouyer /**************************************************************** 174 1.5.2.2 bouyer * Autoconfig 175 1.5.2.2 bouyer ****************************************************************/ 176 1.5.2.2 bouyer 177 1.5.2.2 bouyer /* Definition of the driver for autoconfig. */ 178 1.5.2.2 bouyer int zs_ap_match __P((struct device *, struct cfdata *, void *)); 179 1.5.2.2 bouyer void zs_ap_attach __P((struct device *, struct device *, void *)); 180 1.5.2.2 bouyer int zs_print __P((void *, const char *name)); 181 1.5.2.2 bouyer 182 1.5.2.2 bouyer struct cfattach zsc_ap_ca = { 183 1.5.2.2 bouyer sizeof(struct zsc_softc), zs_ap_match, zs_ap_attach 184 1.5.2.2 bouyer }; 185 1.5.2.2 bouyer 186 1.5.2.2 bouyer /* 187 1.5.2.2 bouyer * Is the zs chip present? 188 1.5.2.2 bouyer */ 189 1.5.2.2 bouyer int 190 1.5.2.2 bouyer zs_ap_match(parent, cf, aux) 191 1.5.2.2 bouyer struct device *parent; 192 1.5.2.2 bouyer struct cfdata *cf; 193 1.5.2.2 bouyer void *aux; 194 1.5.2.2 bouyer { 195 1.5.2.2 bouyer struct apbus_attach_args *apa = aux; 196 1.5.2.2 bouyer 197 1.5.2.2 bouyer if (strcmp("esccf", apa->apa_name) != 0) 198 1.5.2.2 bouyer return 0; 199 1.5.2.2 bouyer 200 1.5.2.2 bouyer return 1; 201 1.5.2.2 bouyer } 202 1.5.2.2 bouyer 203 1.5.2.2 bouyer /* 204 1.5.2.2 bouyer * Attach a found zs. 205 1.5.2.2 bouyer * 206 1.5.2.2 bouyer * Match slave number to zs unit number, so that misconfiguration will 207 1.5.2.2 bouyer * not set up the keyboard as ttya, etc. 208 1.5.2.2 bouyer */ 209 1.5.2.2 bouyer void 210 1.5.2.2 bouyer zs_ap_attach(parent, self, aux) 211 1.5.2.2 bouyer struct device *parent; 212 1.5.2.2 bouyer struct device *self; 213 1.5.2.2 bouyer void *aux; 214 1.5.2.2 bouyer { 215 1.5.2.2 bouyer struct zsc_softc *zsc = (void *)self; 216 1.5.2.2 bouyer struct apbus_attach_args *apa = aux; 217 1.5.2.2 bouyer struct zsc_attach_args zsc_args; 218 1.5.2.2 bouyer volatile struct zschan *zc; 219 1.5.2.2 bouyer struct zs_chanstate *cs; 220 1.5.2.2 bouyer int s, zs_unit, channel; 221 1.5.2.2 bouyer volatile u_int *txBfifo = (void *)(apa->apa_hwbase + PORTB_XPORT); 222 1.5.2.2 bouyer volatile u_int *rxBfifo = (void *)(apa->apa_hwbase + PORTB_RPORT); 223 1.5.2.2 bouyer volatile u_int *txAfifo = (void *)(apa->apa_hwbase + PORTA_XPORT); 224 1.5.2.2 bouyer volatile u_int *rxAfifo = (void *)(apa->apa_hwbase + PORTA_RPORT); 225 1.5.2.2 bouyer volatile u_int *portBctl = (void *)(apa->apa_hwbase + PORTB_OFFSET); 226 1.5.2.2 bouyer volatile u_int *portActl = (void *)(apa->apa_hwbase + PORTA_OFFSET); 227 1.5.2.2 bouyer volatile u_int *esccregs = (void *)(apa->apa_hwbase + ESCC_REG); 228 1.5.2.2 bouyer static int didintr; 229 1.5.2.2 bouyer 230 1.5.2.2 bouyer zs_unit = zsc->zsc_dev.dv_unit; 231 1.5.2.2 bouyer zsaddr[zs_unit] = (caddr_t)apa->apa_hwbase; 232 1.5.2.2 bouyer 233 1.5.2.2 bouyer printf(" slot%d addr 0x%lx\n", apa->apa_slotno, apa->apa_hwbase); 234 1.5.2.2 bouyer 235 1.5.2.2 bouyer txAfifo[DMA_MODE_REG] = rxAfifo[DMA_MODE_REG] = DMA_EXTRDY; 236 1.5.2.2 bouyer txBfifo[DMA_MODE_REG] = rxBfifo[DMA_MODE_REG] = DMA_EXTRDY; 237 1.5.2.2 bouyer 238 1.5.2.2 bouyer /* assert DTR */ /* XXX */ 239 1.5.2.2 bouyer portBctl[PORT_CTL] = portActl[PORT_CTL] = PORTCTL_DTR; 240 1.5.2.2 bouyer 241 1.5.2.2 bouyer /* select RS-232C (ch1 only) */ 242 1.5.2.2 bouyer portActl[PORT_SEL] = PORTSEL_RS232C; 243 1.5.2.2 bouyer 244 1.5.2.2 bouyer /* enable SCC interrupts */ 245 1.5.2.2 bouyer esccregs[ESCCREG_INTMASK] = INTMASK_SCC; 246 1.5.2.2 bouyer 247 1.5.2.2 bouyer zs_delay = zs_ap_delay; 248 1.5.2.2 bouyer 249 1.5.2.2 bouyer /* 250 1.5.2.2 bouyer * Initialize software state for each channel. 251 1.5.2.2 bouyer */ 252 1.5.2.2 bouyer for (channel = 0; channel < 2; channel++) { 253 1.5.2.2 bouyer zsc_args.channel = channel; 254 1.5.2.2 bouyer zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 255 1.5.2.2 bouyer cs = &zsc->zsc_cs_store[channel]; 256 1.5.2.2 bouyer zsc->zsc_cs[channel] = cs; 257 1.5.2.2 bouyer 258 1.5.2.2 bouyer cs->cs_channel = channel; 259 1.5.2.2 bouyer cs->cs_private = NULL; 260 1.5.2.2 bouyer cs->cs_ops = &zsops_null; 261 1.5.2.2 bouyer cs->cs_brg_clk = PCLK / 16; 262 1.5.2.2 bouyer 263 1.5.2.2 bouyer zc = zs_get_chan_addr(zs_unit, channel); 264 1.5.2.2 bouyer cs->cs_reg_csr = &zc->zc_csr; 265 1.5.2.2 bouyer cs->cs_reg_data = &zc->zc_data; 266 1.5.2.2 bouyer 267 1.5.2.2 bouyer bcopy(zs_init_reg, cs->cs_creg, 16); 268 1.5.2.2 bouyer bcopy(zs_init_reg, cs->cs_preg, 16); 269 1.5.2.2 bouyer 270 1.5.2.2 bouyer /* XXX: Get these from the EEPROM instead? */ 271 1.5.2.2 bouyer /* XXX: See the mvme167 code. Better. */ 272 1.5.2.2 bouyer if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 273 1.5.2.2 bouyer cs->cs_defspeed = zs_get_speed(cs); 274 1.5.2.2 bouyer else 275 1.5.2.2 bouyer cs->cs_defspeed = zs_defspeed; 276 1.5.2.2 bouyer cs->cs_defcflag = zs_def_cflag; 277 1.5.2.2 bouyer 278 1.5.2.2 bouyer /* Make these correspond to cs_defcflag (-crtscts) */ 279 1.5.2.2 bouyer cs->cs_rr0_dcd = ZSRR0_DCD; 280 1.5.2.2 bouyer cs->cs_rr0_cts = 0; 281 1.5.2.2 bouyer cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 282 1.5.2.2 bouyer cs->cs_wr5_rts = 0; 283 1.5.2.2 bouyer 284 1.5.2.2 bouyer /* 285 1.5.2.2 bouyer * Clear the master interrupt enable. 286 1.5.2.2 bouyer * The INTENA is common to both channels, 287 1.5.2.2 bouyer * so just do it on the A channel. 288 1.5.2.2 bouyer */ 289 1.5.2.2 bouyer if (channel == 0) { 290 1.5.2.2 bouyer zs_write_reg(cs, 9, 0); 291 1.5.2.2 bouyer } 292 1.5.2.2 bouyer 293 1.5.2.2 bouyer /* 294 1.5.2.2 bouyer * Look for a child driver for this channel. 295 1.5.2.2 bouyer * The child attach will setup the hardware. 296 1.5.2.2 bouyer */ 297 1.5.2.2 bouyer if (!config_found(self, (void *)&zsc_args, zs_print)) { 298 1.5.2.2 bouyer /* No sub-driver. Just reset it. */ 299 1.5.2.2 bouyer u_char reset = (channel == 0) ? 300 1.5.2.2 bouyer ZSWR9_A_RESET : ZSWR9_B_RESET; 301 1.5.2.2 bouyer s = splhigh(); 302 1.5.2.2 bouyer zs_write_reg(cs, 9, reset); 303 1.5.2.2 bouyer splx(s); 304 1.5.2.2 bouyer } 305 1.5.2.2 bouyer } 306 1.5.2.2 bouyer 307 1.5.2.2 bouyer /* 308 1.5.2.2 bouyer * Now safe to install interrupt handlers. Note the arguments 309 1.5.2.2 bouyer * to the interrupt handlers aren't used. Note, we only do this 310 1.5.2.2 bouyer * once since both SCCs interrupt at the same level and vector. 311 1.5.2.2 bouyer */ 312 1.5.2.2 bouyer if (!didintr) { 313 1.5.2.2 bouyer didintr = 1; 314 1.5.2.2 bouyer 315 1.5.2.2 bouyer apbus_intr_establish(1, /* interrupt level ( 0 or 1 ) */ 316 1.5.2.2 bouyer NEWS5000_INT1_SCC, 317 1.5.2.2 bouyer 0, /* priority */ 318 1.5.2.2 bouyer zshard_ap, zsc, 319 1.5.2.2 bouyer apa->apa_name, apa->apa_ctlnum); 320 1.5.2.2 bouyer } 321 1.5.2.2 bouyer /* XXX; evcnt_attach() ? */ 322 1.5.2.2 bouyer 323 1.5.2.2 bouyer #if 0 324 1.5.2.2 bouyer { 325 1.5.2.2 bouyer u_int x; 326 1.5.2.2 bouyer 327 1.5.2.2 bouyer /* determine SCC/ESCC type */ 328 1.5.2.2 bouyer x = zs_read_reg(cs, 15); 329 1.5.2.2 bouyer zs_write_reg(cs, 15, x | ZSWR15_ENABLE_ENHANCED); 330 1.5.2.2 bouyer 331 1.5.2.2 bouyer if (zs_read_reg(cs, 15) & ZSWR15_ENABLE_ENHANCED) { /* ESCC Z85230 */ 332 1.5.2.2 bouyer zs_write_reg(cs, 7, ZSWR7P_EXTEND_READ | ZSWR7P_TX_FIFO); 333 1.5.2.2 bouyer } 334 1.5.2.2 bouyer } 335 1.5.2.2 bouyer #endif 336 1.5.2.2 bouyer 337 1.5.2.2 bouyer /* 338 1.5.2.2 bouyer * Set the master interrupt enable and interrupt vector. 339 1.5.2.2 bouyer * (common to both channels, do it on A) 340 1.5.2.2 bouyer */ 341 1.5.2.2 bouyer cs = zsc->zsc_cs[0]; 342 1.5.2.2 bouyer s = splhigh(); 343 1.5.2.2 bouyer /* interrupt vector */ 344 1.5.2.2 bouyer zs_write_reg(cs, 2, zs_init_reg[2]); 345 1.5.2.2 bouyer /* master interrupt control (enable) */ 346 1.5.2.2 bouyer zs_write_reg(cs, 9, zs_init_reg[9]); 347 1.5.2.2 bouyer splx(s); 348 1.5.2.2 bouyer } 349 1.5.2.2 bouyer 350 1.5.2.2 bouyer /* 351 1.5.2.2 bouyer * Our ZS chips all share a common, autovectored interrupt, 352 1.5.2.2 bouyer * so we have to look at all of them on each interrupt. 353 1.5.2.2 bouyer */ 354 1.5.2.2 bouyer static int 355 1.5.2.2 bouyer zshard_ap(arg) 356 1.5.2.2 bouyer void *arg; 357 1.5.2.2 bouyer { 358 1.5.2.2 bouyer zshard(arg); 359 1.5.2.2 bouyer return 1; 360 1.5.2.2 bouyer } 361 1.5.2.2 bouyer 362 1.5.2.2 bouyer /* 363 1.5.2.2 bouyer * Polled input char. 364 1.5.2.2 bouyer */ 365 1.5.2.2 bouyer int 366 1.5.2.2 bouyer zs_getc(arg) 367 1.5.2.2 bouyer void *arg; 368 1.5.2.2 bouyer { 369 1.5.2.2 bouyer register volatile struct zschan *zc = arg; 370 1.5.2.2 bouyer register int s, c, rr0; 371 1.5.2.2 bouyer 372 1.5.2.2 bouyer s = splhigh(); 373 1.5.2.2 bouyer /* Wait for a character to arrive. */ 374 1.5.2.2 bouyer do { 375 1.5.2.2 bouyer rr0 = zc->zc_csr; 376 1.5.2.2 bouyer ZS_DELAY(); 377 1.5.2.2 bouyer } while ((rr0 & ZSRR0_RX_READY) == 0); 378 1.5.2.2 bouyer 379 1.5.2.2 bouyer c = zc->zc_data; 380 1.5.2.2 bouyer ZS_DELAY(); 381 1.5.2.2 bouyer splx(s); 382 1.5.2.2 bouyer 383 1.5.2.2 bouyer /* 384 1.5.2.2 bouyer * This is used by the kd driver to read scan codes, 385 1.5.2.2 bouyer * so don't translate '\r' ==> '\n' here... 386 1.5.2.2 bouyer */ 387 1.5.2.2 bouyer return (c); 388 1.5.2.2 bouyer } 389 1.5.2.2 bouyer 390 1.5.2.2 bouyer /* 391 1.5.2.2 bouyer * Polled output char. 392 1.5.2.2 bouyer */ 393 1.5.2.2 bouyer void 394 1.5.2.2 bouyer zs_putc(arg, c) 395 1.5.2.2 bouyer void *arg; 396 1.5.2.2 bouyer int c; 397 1.5.2.2 bouyer { 398 1.5.2.2 bouyer register volatile struct zschan *zc = arg; 399 1.5.2.2 bouyer register int s, rr0; 400 1.5.2.2 bouyer 401 1.5.2.2 bouyer s = splhigh(); 402 1.5.2.2 bouyer /* Wait for transmitter to become ready. */ 403 1.5.2.2 bouyer do { 404 1.5.2.2 bouyer rr0 = zc->zc_csr; 405 1.5.2.2 bouyer ZS_DELAY(); 406 1.5.2.2 bouyer } while ((rr0 & ZSRR0_TX_READY) == 0); 407 1.5.2.2 bouyer 408 1.5.2.2 bouyer zc->zc_data = c; 409 1.5.2.2 bouyer ZS_DELAY(); 410 1.5.2.2 bouyer splx(s); 411 1.5.2.2 bouyer } 412 1.5.2.2 bouyer 413 1.5.2.2 bouyer /*****************************************************************/ 414 1.5.2.2 bouyer 415 1.5.2.2 bouyer static void zscnprobe __P((struct consdev *)); 416 1.5.2.2 bouyer static void zscninit __P((struct consdev *)); 417 1.5.2.2 bouyer static int zscngetc __P((dev_t)); 418 1.5.2.2 bouyer static void zscnputc __P((dev_t, int)); 419 1.5.2.2 bouyer static void zscnpollc __P((dev_t, int)); 420 1.5.2.2 bouyer 421 1.5.2.2 bouyer struct consdev consdev_zs_ap = { 422 1.5.2.2 bouyer zscnprobe, 423 1.5.2.2 bouyer zscninit, 424 1.5.2.2 bouyer zscngetc, 425 1.5.2.2 bouyer zscnputc, 426 1.5.2.2 bouyer zscnpollc, 427 1.5.2.2 bouyer NULL, 428 1.5.2.2 bouyer }; 429 1.5.2.2 bouyer 430 1.5.2.2 bouyer void 431 1.5.2.2 bouyer zscnprobe(cn) 432 1.5.2.2 bouyer struct consdev *cn; 433 1.5.2.2 bouyer { 434 1.5.2.2 bouyer } 435 1.5.2.2 bouyer 436 1.5.2.2 bouyer void 437 1.5.2.2 bouyer zscninit(cn) 438 1.5.2.2 bouyer struct consdev *cn; 439 1.5.2.2 bouyer { 440 1.5.2.2 bouyer cn->cn_dev = makedev(zs_major, 0); 441 1.5.2.2 bouyer cn->cn_pri = CN_REMOTE; 442 1.5.2.2 bouyer zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 443 1.5.2.2 bouyer } 444 1.5.2.2 bouyer 445 1.5.2.2 bouyer int 446 1.5.2.2 bouyer zscngetc(dev) 447 1.5.2.2 bouyer dev_t dev; 448 1.5.2.2 bouyer { 449 1.5.2.2 bouyer return zs_getc((void *)NEWS5000_SCCPORT0A); 450 1.5.2.2 bouyer } 451 1.5.2.2 bouyer 452 1.5.2.2 bouyer void 453 1.5.2.2 bouyer zscnputc(dev, c) 454 1.5.2.2 bouyer dev_t dev; 455 1.5.2.2 bouyer int c; 456 1.5.2.2 bouyer { 457 1.5.2.2 bouyer zs_putc((void *)NEWS5000_SCCPORT0A, c); 458 1.5.2.2 bouyer } 459 1.5.2.2 bouyer 460 1.5.2.2 bouyer void 461 1.5.2.2 bouyer zscnpollc(dev, on) 462 1.5.2.2 bouyer dev_t dev; 463 1.5.2.2 bouyer int on; 464 1.5.2.2 bouyer { 465 1.5.2.2 bouyer } 466
Indexes created Tue Oct 28 07:09:57 GMT 2025