zs_ap.c revision 1.16
1 /* $NetBSD: zs_ap.c,v 1.16 2003/07/15 02:59:29 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: zs_ap.c,v 1.16 2003/07/15 02:59:29 lukem Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/device.h> 53 #include <sys/tty.h> 54 #include <sys/conf.h> 55 56 #include <machine/adrsmap.h> 57 #include <machine/cpu.h> 58 #include <machine/z8530var.h> 59 60 #include <dev/cons.h> 61 #include <dev/ic/z8530reg.h> 62 63 #include <newsmips/apbus/apbusvar.h> 64 65 #include "zsc.h" /* NZSC */ 66 #define NZS NZSC 67 68 /* Make life easier for the initialized arrays here. */ 69 #if NZS < 2 70 #undef NZS 71 #define NZS 2 72 #endif 73 74 #define PORTB_XPORT 0x00000000 75 #define PORTB_RPORT 0x00010000 76 #define PORTA_XPORT 0x00020000 77 #define PORTA_RPORT 0x00030000 78 #define DMA_MODE_REG 3 79 #define DMA_ENABLE 0x01 /* DMA enable */ 80 #define DMA_DIR_DM 0x00 /* device to memory */ 81 #define DMA_DIR_MD 0x02 /* memory to device */ 82 #define DMA_EXTRDY 0x08 /* DMA external ready */ 83 #define PORTB_OFFSET 0x00040000 84 #define PORTA_OFFSET 0x00050000 85 #define PORT_CTL 2 86 #define PORTCTL_RI 0x01 87 #define PORTCTL_DSR 0x02 88 #define PORTCTL_DTR 0x04 89 #define PORT_SEL 3 90 #define PORTSEL_LOCALTALK 0x01 91 #define PORTSEL_RS232C 0x02 92 #define ESCC_REG 0x00060000 93 #define ESCCREG_INTSTAT 0 94 #define INTSTAT_SCC 0x01 95 #define ESCCREG_INTMASK 1 96 #define INTMASK_SCC 0x01 97 98 extern int zs_def_cflag; 99 extern void (*zs_delay) __P((void)); 100 101 /* 102 * The news5000 provides a 9.8304 MHz clock to the ZS chips. 103 */ 104 #define PCLK (9600 * 1024) /* PCLK pin input clock rate */ 105 106 #define ZS_DELAY() DELAY(2) 107 108 /* The layout of this is hardware-dependent (padding, order). */ 109 struct zschan { 110 volatile u_char pad1[3]; 111 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 112 volatile u_char pad2[3]; 113 volatile u_char zc_data; /* data */ 114 }; 115 116 static caddr_t zsaddr[NZS]; 117 118 /* Flags from cninit() */ 119 static int zs_hwflags[NZS][2]; 120 121 /* Default speed for all channels */ 122 static int zs_defspeed = 9600; 123 124 static u_char zs_init_reg[16] = { 125 0, /* 0: CMD (reset, etc.) */ 126 0, /* 1: No interrupts yet. */ 127 0, /* IVECT */ 128 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 129 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 130 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 131 0, /* 6: TXSYNC/SYNCLO */ 132 0, /* 7: RXSYNC/SYNCHI */ 133 0, /* 8: alias for data port */ 134 ZSWR9_MASTER_IE, 135 0, /*10: Misc. TX/RX control bits */ 136 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 137 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 138 0, /*13: BAUDHI (default=9600) */ 139 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 140 ZSWR15_BREAK_IE, 141 }; 142 143 static struct zschan * zs_get_chan_addr __P((int, int)); 144 static void zs_ap_delay __P((void)); 145 static int zshard_ap __P((void *)); 146 static int zs_getc __P((void *)); 147 static void zs_putc __P((void *, int)); 148 149 struct zschan * 150 zs_get_chan_addr(zs_unit, channel) 151 int zs_unit, channel; 152 { 153 caddr_t addr; 154 struct zschan *zc; 155 156 if (zs_unit >= NZS) 157 return NULL; 158 addr = zsaddr[zs_unit]; 159 if (addr == NULL) 160 return NULL; 161 if (channel == 0) { 162 zc = (void *)(addr + PORTA_OFFSET); 163 } else { 164 zc = (void *)(addr + PORTB_OFFSET); 165 } 166 return (zc); 167 } 168 169 void 170 zs_ap_delay() 171 { 172 173 ZS_DELAY(); 174 } 175 176 /**************************************************************** 177 * Autoconfig 178 ****************************************************************/ 179 180 /* Definition of the driver for autoconfig. */ 181 int zs_ap_match __P((struct device *, struct cfdata *, void *)); 182 void zs_ap_attach __P((struct device *, struct device *, void *)); 183 184 CFATTACH_DECL(zsc_ap, sizeof(struct zsc_softc), 185 zs_ap_match, zs_ap_attach, NULL, NULL); 186 187 /* 188 * Is the zs chip present? 189 */ 190 int 191 zs_ap_match(parent, cf, aux) 192 struct device *parent; 193 struct cfdata *cf; 194 void *aux; 195 { 196 struct apbus_attach_args *apa = aux; 197 198 if (strcmp("esccf", apa->apa_name) != 0) 199 return 0; 200 201 return 1; 202 } 203 204 /* 205 * Attach a found zs. 206 * 207 * Match slave number to zs unit number, so that misconfiguration will 208 * not set up the keyboard as ttya, etc. 209 */ 210 void 211 zs_ap_attach(parent, self, aux) 212 struct device *parent; 213 struct device *self; 214 void *aux; 215 { 216 struct zsc_softc *zsc = (void *)self; 217 struct apbus_attach_args *apa = aux; 218 struct zsc_attach_args zsc_args; 219 volatile struct zschan *zc; 220 struct zs_chanstate *cs; 221 int s, zs_unit, channel; 222 volatile u_int *txBfifo = (void *)(apa->apa_hwbase + PORTB_XPORT); 223 volatile u_int *rxBfifo = (void *)(apa->apa_hwbase + PORTB_RPORT); 224 volatile u_int *txAfifo = (void *)(apa->apa_hwbase + PORTA_XPORT); 225 volatile u_int *rxAfifo = (void *)(apa->apa_hwbase + PORTA_RPORT); 226 volatile u_int *portBctl = (void *)(apa->apa_hwbase + PORTB_OFFSET); 227 volatile u_int *portActl = (void *)(apa->apa_hwbase + PORTA_OFFSET); 228 volatile u_int *esccregs = (void *)(apa->apa_hwbase + ESCC_REG); 229 static int didintr; 230 231 zs_unit = zsc->zsc_dev.dv_unit; 232 zsaddr[zs_unit] = (caddr_t)apa->apa_hwbase; 233 234 printf(" slot%d addr 0x%lx\n", apa->apa_slotno, apa->apa_hwbase); 235 236 txAfifo[DMA_MODE_REG] = rxAfifo[DMA_MODE_REG] = DMA_EXTRDY; 237 txBfifo[DMA_MODE_REG] = rxBfifo[DMA_MODE_REG] = DMA_EXTRDY; 238 239 /* assert DTR */ /* XXX */ 240 portBctl[PORT_CTL] = portActl[PORT_CTL] = PORTCTL_DTR; 241 242 /* select RS-232C (ch1 only) */ 243 portActl[PORT_SEL] = PORTSEL_RS232C; 244 245 /* enable SCC interrupts */ 246 esccregs[ESCCREG_INTMASK] = INTMASK_SCC; 247 248 zs_delay = zs_ap_delay; 249 250 /* 251 * Initialize software state for each channel. 252 */ 253 for (channel = 0; channel < 2; channel++) { 254 zsc_args.channel = channel; 255 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 256 cs = &zsc->zsc_cs_store[channel]; 257 zsc->zsc_cs[channel] = cs; 258 259 simple_lock_init(&cs->cs_lock); 260 cs->cs_channel = channel; 261 cs->cs_private = NULL; 262 cs->cs_ops = &zsops_null; 263 cs->cs_brg_clk = PCLK / 16; 264 265 zc = zs_get_chan_addr(zs_unit, channel); 266 cs->cs_reg_csr = &zc->zc_csr; 267 cs->cs_reg_data = &zc->zc_data; 268 269 bcopy(zs_init_reg, cs->cs_creg, 16); 270 bcopy(zs_init_reg, cs->cs_preg, 16); 271 272 /* XXX: Get these from the EEPROM instead? */ 273 /* XXX: See the mvme167 code. Better. */ 274 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 275 cs->cs_defspeed = zs_get_speed(cs); 276 else 277 cs->cs_defspeed = zs_defspeed; 278 cs->cs_defcflag = zs_def_cflag; 279 280 /* Make these correspond to cs_defcflag (-crtscts) */ 281 cs->cs_rr0_dcd = ZSRR0_DCD; 282 cs->cs_rr0_cts = 0; 283 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 284 cs->cs_wr5_rts = 0; 285 286 /* 287 * Clear the master interrupt enable. 288 * The INTENA is common to both channels, 289 * so just do it on the A channel. 290 */ 291 if (channel == 0) { 292 zs_write_reg(cs, 9, 0); 293 } 294 295 /* 296 * Look for a child driver for this channel. 297 * The child attach will setup the hardware. 298 */ 299 if (!config_found(self, (void *)&zsc_args, zs_print)) { 300 /* No sub-driver. Just reset it. */ 301 u_char reset = (channel == 0) ? 302 ZSWR9_A_RESET : ZSWR9_B_RESET; 303 s = splhigh(); 304 zs_write_reg(cs, 9, reset); 305 splx(s); 306 } 307 } 308 309 /* 310 * Now safe to install interrupt handlers. Note the arguments 311 * to the interrupt handlers aren't used. Note, we only do this 312 * once since both SCCs interrupt at the same level and vector. 313 */ 314 if (!didintr) { 315 didintr = 1; 316 317 zsc->zsc_si = softintr_establish(IPL_SOFTSERIAL, zssoft, zsc); 318 apbus_intr_establish(1, /* interrupt level ( 0 or 1 ) */ 319 NEWS5000_INT1_SCC, 320 0, /* priority */ 321 zshard_ap, zsc, 322 apa->apa_name, apa->apa_ctlnum); 323 } 324 /* XXX; evcnt_attach() ? */ 325 326 #if 0 327 { 328 u_int x; 329 330 /* determine SCC/ESCC type */ 331 x = zs_read_reg(cs, 15); 332 zs_write_reg(cs, 15, x | ZSWR15_ENABLE_ENHANCED); 333 334 if (zs_read_reg(cs, 15) & ZSWR15_ENABLE_ENHANCED) { /* ESCC Z85230 */ 335 zs_write_reg(cs, 7, ZSWR7P_EXTEND_READ | ZSWR7P_TX_FIFO); 336 } 337 } 338 #endif 339 340 /* 341 * Set the master interrupt enable and interrupt vector. 342 * (common to both channels, do it on A) 343 */ 344 cs = zsc->zsc_cs[0]; 345 s = splhigh(); 346 /* interrupt vector */ 347 zs_write_reg(cs, 2, zs_init_reg[2]); 348 /* master interrupt control (enable) */ 349 zs_write_reg(cs, 9, zs_init_reg[9]); 350 splx(s); 351 } 352 353 static int 354 zshard_ap(arg) 355 void *arg; 356 { 357 358 zshard(arg); 359 return 1; 360 } 361 362 /* 363 * Polled input char. 364 */ 365 int 366 zs_getc(arg) 367 void *arg; 368 { 369 volatile struct zschan *zc = arg; 370 int s, c, rr0; 371 372 s = splhigh(); 373 /* Wait for a character to arrive. */ 374 do { 375 rr0 = zc->zc_csr; 376 ZS_DELAY(); 377 } while ((rr0 & ZSRR0_RX_READY) == 0); 378 379 c = zc->zc_data; 380 ZS_DELAY(); 381 splx(s); 382 383 /* 384 * This is used by the kd driver to read scan codes, 385 * so don't translate '\r' ==> '\n' here... 386 */ 387 return (c); 388 } 389 390 /* 391 * Polled output char. 392 */ 393 void 394 zs_putc(arg, c) 395 void *arg; 396 int c; 397 { 398 volatile struct zschan *zc = arg; 399 int s, rr0; 400 401 s = splhigh(); 402 /* Wait for transmitter to become ready. */ 403 do { 404 rr0 = zc->zc_csr; 405 ZS_DELAY(); 406 } while ((rr0 & ZSRR0_TX_READY) == 0); 407 408 zc->zc_data = c; 409 ZS_DELAY(); 410 splx(s); 411 } 412 413 /*****************************************************************/ 414 415 static void zscnprobe __P((struct consdev *)); 416 static void zscninit __P((struct consdev *)); 417 static int zscngetc __P((dev_t)); 418 static void zscnputc __P((dev_t, int)); 419 420 struct consdev consdev_zs_ap = { 421 zscnprobe, 422 zscninit, 423 zscngetc, 424 zscnputc, 425 nullcnpollc, 426 NULL, 427 NULL, 428 NULL, 429 NODEV, 430 CN_DEAD 431 }; 432 433 static void 434 zscnprobe(cn) 435 struct consdev *cn; 436 { 437 } 438 439 static void 440 zscninit(cn) 441 struct consdev *cn; 442 { 443 extern const struct cdevsw zstty_cdevsw; 444 445 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0); 446 cn->cn_pri = CN_REMOTE; 447 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 448 } 449 450 static int 451 zscngetc(dev) 452 dev_t dev; 453 { 454 455 return zs_getc((void *)NEWS5000_SCCPORT0A); 456 } 457 458 static void 459 zscnputc(dev, c) 460 dev_t dev; 461 int c; 462 { 463 464 zs_putc((void *)NEWS5000_SCCPORT0A, c); 465 } 466
Indexes created Fri Oct 03 17:10:05 GMT 2025