zs_ap.c revision 1.17
1 /* $NetBSD: zs_ap.c,v 1.17 2005/02/06 02:18:02 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: zs_ap.c,v 1.17 2005/02/06 02:18:02 tsutsui Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/device.h> 53 #include <sys/tty.h> 54 #include <sys/conf.h> 55 56 #include <machine/adrsmap.h> 57 #include <machine/cpu.h> 58 #include <machine/z8530var.h> 59 60 #include <dev/cons.h> 61 #include <dev/ic/z8530reg.h> 62 63 #include <newsmips/apbus/apbusvar.h> 64 65 #include "zsc.h" /* NZSC */ 66 #define NZS NZSC 67 68 /* Make life easier for the initialized arrays here. */ 69 #if NZS < 2 70 #undef NZS 71 #define NZS 2 72 #endif 73 74 #define PORTB_XPORT 0x00000000 75 #define PORTB_RPORT 0x00010000 76 #define PORTA_XPORT 0x00020000 77 #define PORTA_RPORT 0x00030000 78 #define DMA_MODE_REG 3 79 #define DMA_ENABLE 0x01 /* DMA enable */ 80 #define DMA_DIR_DM 0x00 /* device to memory */ 81 #define DMA_DIR_MD 0x02 /* memory to device */ 82 #define DMA_EXTRDY 0x08 /* DMA external ready */ 83 #define PORTB_OFFSET 0x00040000 84 #define PORTA_OFFSET 0x00050000 85 #define PORT_CTL 2 86 #define PORTCTL_RI 0x01 87 #define PORTCTL_DSR 0x02 88 #define PORTCTL_DTR 0x04 89 #define PORT_SEL 3 90 #define PORTSEL_LOCALTALK 0x01 91 #define PORTSEL_RS232C 0x02 92 #define ESCC_REG 0x00060000 93 #define ESCCREG_INTSTAT 0 94 #define INTSTAT_SCC 0x01 95 #define ESCCREG_INTMASK 1 96 #define INTMASK_SCC 0x01 97 98 extern int zs_def_cflag; 99 extern void (*zs_delay)(void); 100 101 /* 102 * The news5000 provides a 9.8304 MHz clock to the ZS chips. 103 */ 104 #define PCLK (9600 * 1024) /* PCLK pin input clock rate */ 105 106 #define ZS_DELAY() DELAY(2) 107 108 /* The layout of this is hardware-dependent (padding, order). */ 109 struct zschan { 110 volatile u_char pad1[3]; 111 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 112 volatile u_char pad2[3]; 113 volatile u_char zc_data; /* data */ 114 }; 115 116 static caddr_t zsaddr[NZS]; 117 118 /* Flags from cninit() */ 119 static int zs_hwflags[NZS][2]; 120 121 /* Default speed for all channels */ 122 static int zs_defspeed = 9600; 123 124 static u_char zs_init_reg[16] = { 125 0, /* 0: CMD (reset, etc.) */ 126 0, /* 1: No interrupts yet. */ 127 0, /* IVECT */ 128 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 129 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 130 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 131 0, /* 6: TXSYNC/SYNCLO */ 132 0, /* 7: RXSYNC/SYNCHI */ 133 0, /* 8: alias for data port */ 134 ZSWR9_MASTER_IE, 135 0, /*10: Misc. TX/RX control bits */ 136 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 137 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 138 0, /*13: BAUDHI (default=9600) */ 139 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 140 ZSWR15_BREAK_IE, 141 }; 142 143 static struct zschan * zs_get_chan_addr(int, int); 144 static void zs_ap_delay(void); 145 static int zshard_ap(void *); 146 static int zs_getc(void *); 147 static void zs_putc(void *, int); 148 149 struct zschan * 150 zs_get_chan_addr(int zs_unit, int channel) 151 { 152 caddr_t addr; 153 struct zschan *zc; 154 155 if (zs_unit >= NZS) 156 return NULL; 157 addr = zsaddr[zs_unit]; 158 if (addr == NULL) 159 return NULL; 160 if (channel == 0) { 161 zc = (void *)(addr + PORTA_OFFSET); 162 } else { 163 zc = (void *)(addr + PORTB_OFFSET); 164 } 165 return zc; 166 } 167 168 void 169 zs_ap_delay(void) 170 { 171 172 ZS_DELAY(); 173 } 174 175 /**************************************************************** 176 * Autoconfig 177 ****************************************************************/ 178 179 /* Definition of the driver for autoconfig. */ 180 int zs_ap_match(struct device *, struct cfdata *, void *); 181 void zs_ap_attach(struct device *, struct device *, void *); 182 183 CFATTACH_DECL(zsc_ap, sizeof(struct zsc_softc), 184 zs_ap_match, zs_ap_attach, NULL, NULL); 185 186 /* 187 * Is the zs chip present? 188 */ 189 int 190 zs_ap_match(struct device *parent, struct cfdata *cf, void *aux) 191 { 192 struct apbus_attach_args *apa = aux; 193 194 if (strcmp("esccf", apa->apa_name) != 0) 195 return 0; 196 197 return 1; 198 } 199 200 /* 201 * Attach a found zs. 202 * 203 * Match slave number to zs unit number, so that misconfiguration will 204 * not set up the keyboard as ttya, etc. 205 */ 206 void 207 zs_ap_attach(struct device *parent, struct device *self, void *aux) 208 { 209 struct zsc_softc *zsc = (void *)self; 210 struct apbus_attach_args *apa = aux; 211 struct zsc_attach_args zsc_args; 212 volatile struct zschan *zc; 213 struct zs_chanstate *cs; 214 int s, zs_unit, channel; 215 volatile u_int *txBfifo = (void *)(apa->apa_hwbase + PORTB_XPORT); 216 volatile u_int *rxBfifo = (void *)(apa->apa_hwbase + PORTB_RPORT); 217 volatile u_int *txAfifo = (void *)(apa->apa_hwbase + PORTA_XPORT); 218 volatile u_int *rxAfifo = (void *)(apa->apa_hwbase + PORTA_RPORT); 219 volatile u_int *portBctl = (void *)(apa->apa_hwbase + PORTB_OFFSET); 220 volatile u_int *portActl = (void *)(apa->apa_hwbase + PORTA_OFFSET); 221 volatile u_int *esccregs = (void *)(apa->apa_hwbase + ESCC_REG); 222 static int didintr; 223 224 zs_unit = zsc->zsc_dev.dv_unit; 225 zsaddr[zs_unit] = (caddr_t)apa->apa_hwbase; 226 227 printf(" slot%d addr 0x%lx\n", apa->apa_slotno, apa->apa_hwbase); 228 229 txAfifo[DMA_MODE_REG] = rxAfifo[DMA_MODE_REG] = DMA_EXTRDY; 230 txBfifo[DMA_MODE_REG] = rxBfifo[DMA_MODE_REG] = DMA_EXTRDY; 231 232 /* assert DTR */ /* XXX */ 233 portBctl[PORT_CTL] = portActl[PORT_CTL] = PORTCTL_DTR; 234 235 /* select RS-232C (ch1 only) */ 236 portActl[PORT_SEL] = PORTSEL_RS232C; 237 238 /* enable SCC interrupts */ 239 esccregs[ESCCREG_INTMASK] = INTMASK_SCC; 240 241 zs_delay = zs_ap_delay; 242 243 /* 244 * Initialize software state for each channel. 245 */ 246 for (channel = 0; channel < 2; channel++) { 247 zsc_args.channel = channel; 248 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 249 cs = &zsc->zsc_cs_store[channel]; 250 zsc->zsc_cs[channel] = cs; 251 252 simple_lock_init(&cs->cs_lock); 253 cs->cs_channel = channel; 254 cs->cs_private = NULL; 255 cs->cs_ops = &zsops_null; 256 cs->cs_brg_clk = PCLK / 16; 257 258 zc = zs_get_chan_addr(zs_unit, channel); 259 cs->cs_reg_csr = &zc->zc_csr; 260 cs->cs_reg_data = &zc->zc_data; 261 262 memcpy(cs->cs_creg, zs_init_reg, 16); 263 memcpy(cs->cs_preg, zs_init_reg, 16); 264 265 /* XXX: Get these from the EEPROM instead? */ 266 /* XXX: See the mvme167 code. Better. */ 267 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 268 cs->cs_defspeed = zs_get_speed(cs); 269 else 270 cs->cs_defspeed = zs_defspeed; 271 cs->cs_defcflag = zs_def_cflag; 272 273 /* Make these correspond to cs_defcflag (-crtscts) */ 274 cs->cs_rr0_dcd = ZSRR0_DCD; 275 cs->cs_rr0_cts = 0; 276 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 277 cs->cs_wr5_rts = 0; 278 279 /* 280 * Clear the master interrupt enable. 281 * The INTENA is common to both channels, 282 * so just do it on the A channel. 283 */ 284 if (channel == 0) { 285 zs_write_reg(cs, 9, 0); 286 } 287 288 /* 289 * Look for a child driver for this channel. 290 * The child attach will setup the hardware. 291 */ 292 if (!config_found(self, (void *)&zsc_args, zs_print)) { 293 /* No sub-driver. Just reset it. */ 294 u_char reset = (channel == 0) ? 295 ZSWR9_A_RESET : ZSWR9_B_RESET; 296 s = splhigh(); 297 zs_write_reg(cs, 9, reset); 298 splx(s); 299 } 300 } 301 302 /* 303 * Now safe to install interrupt handlers. Note the arguments 304 * to the interrupt handlers aren't used. Note, we only do this 305 * once since both SCCs interrupt at the same level and vector. 306 */ 307 if (!didintr) { 308 didintr = 1; 309 310 zsc->zsc_si = softintr_establish(IPL_SOFTSERIAL, zssoft, zsc); 311 apbus_intr_establish(1, /* interrupt level ( 0 or 1 ) */ 312 NEWS5000_INT1_SCC, 313 0, /* priority */ 314 zshard_ap, zsc, 315 apa->apa_name, apa->apa_ctlnum); 316 } 317 /* XXX; evcnt_attach() ? */ 318 319 #if 0 320 { 321 u_int x; 322 323 /* determine SCC/ESCC type */ 324 x = zs_read_reg(cs, 15); 325 zs_write_reg(cs, 15, x | ZSWR15_ENABLE_ENHANCED); 326 327 if (zs_read_reg(cs, 15) & ZSWR15_ENABLE_ENHANCED) { /* ESCC Z85230 */ 328 zs_write_reg(cs, 7, ZSWR7P_EXTEND_READ | ZSWR7P_TX_FIFO); 329 } 330 } 331 #endif 332 333 /* 334 * Set the master interrupt enable and interrupt vector. 335 * (common to both channels, do it on A) 336 */ 337 cs = zsc->zsc_cs[0]; 338 s = splhigh(); 339 /* interrupt vector */ 340 zs_write_reg(cs, 2, zs_init_reg[2]); 341 /* master interrupt control (enable) */ 342 zs_write_reg(cs, 9, zs_init_reg[9]); 343 splx(s); 344 } 345 346 static int 347 zshard_ap(void *arg) 348 { 349 350 zshard(arg); 351 return 1; 352 } 353 354 /* 355 * Polled input char. 356 */ 357 int 358 zs_getc(void *arg) 359 { 360 volatile struct zschan *zc = arg; 361 int s, c, rr0; 362 363 s = splhigh(); 364 /* Wait for a character to arrive. */ 365 do { 366 rr0 = zc->zc_csr; 367 ZS_DELAY(); 368 } while ((rr0 & ZSRR0_RX_READY) == 0); 369 370 c = zc->zc_data; 371 ZS_DELAY(); 372 splx(s); 373 374 /* 375 * This is used by the kd driver to read scan codes, 376 * so don't translate '\r' ==> '\n' here... 377 */ 378 return c; 379 } 380 381 /* 382 * Polled output char. 383 */ 384 void 385 zs_putc(void *arg, int c) 386 { 387 volatile struct zschan *zc = arg; 388 int s, rr0; 389 390 s = splhigh(); 391 /* Wait for transmitter to become ready. */ 392 do { 393 rr0 = zc->zc_csr; 394 ZS_DELAY(); 395 } while ((rr0 & ZSRR0_TX_READY) == 0); 396 397 zc->zc_data = c; 398 ZS_DELAY(); 399 splx(s); 400 } 401 402 /*****************************************************************/ 403 404 static void zscnprobe(struct consdev *); 405 static void zscninit(struct consdev *); 406 static int zscngetc(dev_t); 407 static void zscnputc(dev_t, int); 408 409 struct consdev consdev_zs_ap = { 410 zscnprobe, 411 zscninit, 412 zscngetc, 413 zscnputc, 414 nullcnpollc, 415 NULL, 416 NULL, 417 NULL, 418 NODEV, 419 CN_DEAD 420 }; 421 422 static void 423 zscnprobe(struct consdev *cn) 424 { 425 } 426 427 static void 428 zscninit(struct consdev *cn) 429 { 430 extern const struct cdevsw zstty_cdevsw; 431 432 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0); 433 cn->cn_pri = CN_REMOTE; 434 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 435 } 436 437 static int 438 zscngetc(dev_t dev) 439 { 440 441 return zs_getc((void *)NEWS5000_SCCPORT0A); 442 } 443 444 static void 445 zscnputc(dev_t dev, int c) 446 { 447 448 zs_putc((void *)NEWS5000_SCCPORT0A, c); 449 } 450
Indexes created Fri Oct 03 17:10:05 GMT 2025